3 Commits

Author	SHA1	Message	Date
gatecat	d3c0f945da	xilinx: Fix BRAM placement, clangformat ... Signed-off-by: gatecat <gatecat@ds0.me>	2024-09-27 16:24:47 +02:00
Adrien Prost-Boucle	fa55e93848	Himbaechel xilinx : Fix regex to parse Zynq device names	2024-08-19 21:06:45 +01:00
gatecat	5bfe0dd1b1	himbaechel: Adding a xilinx uarch for xc7 with prjxray ... Signed-off-by: gatecat <gatecat@ds0.me>	2023-11-14 17:12:09 +01:00