caiyu/nextpnr
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
3,944 Commits 22 Branches 7 Tags 17 MiB
ddb084e9a8
Commit Graph

3944 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
gatecat
ddb084e9a8 archapi: Use arbitrary rather than actual placement in predictDelay 
This makes predictDelay be based on an arbitrary belpin pair rather
than a arc of a net based on cell placement. This way 'what-if'
decisions can be evaluated without actually changing placement;
potentially useful for parallel placement.

A new helper predictArcDelay behaves like the old predictDelay to
minimise the impact on existing passes; only arches need be updated.

Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-19 17:15:15 +00:00
gatecat
56d5507333
Merge pull request #882 from YosysHQ/gatecat/router1-tmg-ripup 
router1: Experimental timing-driven ripup support
 2021-12-18 21:49:48 +00:00
gatecat
4a3847765c
Merge pull request #881 from uis246/regex 
Tidy gowin modification regex
 2021-12-18 21:38:52 +00:00
gatecat
f670de7b52 router1: Experimental timing-driven ripup support 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-18 20:58:44 +00:00
uis
9b2d6c5a67 Clean gowin modification regex 2021-12-18 22:44:08 +03:00
gatecat
673faea230
Merge pull request #880 from YosysHQ/gatecat/router1-heuristic 
router1: Improve timing heuristic
 2021-12-18 19:18:21 +00:00
gatecat
53ce8f3736 router1: Improve timing heuristic 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-18 14:30:48 +00:00
gatecat
f80f56d69f
Merge pull request #879 from YosysHQ/gatecat/nexus-867 
nexus: router1 speedup based on #867
 2021-12-18 13:25:13 +00:00
gatecat
cc603a612b
Merge pull request #878 from YosysHQ/gatecat/fix-876 
frontend: Consider net aliases when uniquifying name
 2021-12-17 15:51:45 +00:00
gatecat
a306860144 nexus: router1 speedup based on #867 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-17 15:06:19 +00:00
gatecat
4451a562ef frontend: Consider net aliases when uniquifying name 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-17 14:51:19 +00:00
gatecat
a120577773
Merge pull request #858 from cr1901/machxo2 
MachXO2 Checkpoint 2
 2021-12-17 07:11:31 +00:00
William D. Jones
064b6d808e clangformat. 2021-12-16 17:09:29 -05:00
William D. Jones
78ce9971ff README.md: Add machxo2 arch to list of (experimental) supported devices. 2021-12-16 16:59:38 -05:00
William D. Jones
4d75792257 machxo2: Remove no-iobs option. It was always enabled and should remain an implementation detail. 2021-12-16 16:59:38 -05:00
William D. Jones
be3788fa30 machxo2: Remove -noiopad option when generating miters for post-pnr verification. 2021-12-16 16:59:38 -05:00
William D. Jones
365a871908 machxo2: Add packing logic to forbid designs lacking FACADE_IO top-level ports. 2021-12-16 16:59:38 -05:00
William D. Jones
d2ac6dffbc machxo2: Correct which PIO wires get adjusted when writing text bitstream. Add verbose logging for adjustments. 2021-12-16 16:59:37 -05:00
gatecat
d04cfd5f0f
Merge pull request #874 from yrabbit/models 
gowin: Recognize models correctly
 2021-12-15 07:00:49 +00:00
YRabbit
120ed0c42d gowin: Recognize models correctly 
For example, clearly distinguish between
    GW1N-4
    GW1NR-4
    GW1NS-4
    GW1NSR-4
    GW1NSR-4

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2021-12-15 07:56:34 +10:00
gatecat
762125d3cf
Merge pull request #872 from YosysHQ/gatecat/py-loc-api 
python: Bind getBelLocation/getPipLocation
 2021-12-14 20:09:57 +00:00
gatecat
a120ae1fa7 python: Bind getBelLocation/getPipLocation 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-14 18:47:35 +00:00
gatecat
256134d615
Merge pull request #870 from YosysHQ/gatecat/ecp5-lutperm 
ecp5: LUT permutation support
 2021-12-14 09:03:50 +00:00
gatecat
73a7406211
Merge pull request #871 from yrabbit/english 
gowin: Fix spelling of messages
 2021-12-14 08:54:09 +00:00
YRabbit
fdf26e698f gowin: Fix spelling of messages 
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2021-12-14 14:09:27 +10:00
gatecat
f36188f2e1 ecp5: LUT permutation support 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-13 20:22:06 +00:00
gatecat
8720d79f21
Merge pull request #868 from mkj/mkj/chipdb-16bit 
ecp5: Reduce some chipdb fields from 32 to 16 bit
 2021-12-13 15:02:38 +00:00
Matt Johnston
90b0e90bbe ecp5: Reduce some chipdb fields sizes 
This reduces the final binary size by ~7 MB for 85k
 2021-12-13 11:48:50 +08:00
gatecat
a933f82845 clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-12 18:49:37 +00:00
gatecat
0dafcc44ff router2: Improve reservation debug logging 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-12 18:49:14 +00:00
gatecat
c76e1be397
Merge pull request #867 from mkj/mkj/routerspeed2 
Improvements to ecp5 router speed
 2021-12-12 15:37:36 +00:00
gatecat
cb362c2256
Merge pull request #869 from YosysHQ/gatecat/mistral-route-fix 
mistral: DATAIN and DATAOUT of GPIO have swapped
 2021-12-12 14:59:34 +00:00
Matt Johnston
fc5b34254f ecp5: Keep "visited" local 
Otherwise it keeps growing boundless and slows down small arcs
 2021-12-12 22:09:11 +08:00
Matt Johnston
80dd442412 ecp5: Use a vector rather than dict 
This improves router1 performance vs the default dict
Using it for wire2net, pip2net, wire_fanout
 2021-12-12 22:09:11 +08:00
gatecat
61597e14a7 mistral: Bump CI version 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-12 13:55:06 +00:00
gatecat
78905c3ecf mistral: DATAIN and DATAOUT of GPIO have swapped 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-12 13:03:28 +00:00
gatecat
1c8d4d6460 Merge branch 'master' of github.com:YosysHQ/nextpnr 2021-12-12 13:02:58 +00:00
gatecat
35feb7ebba clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-12 13:02:39 +00:00
gatecat
21fc372a9d
Merge pull request #865 from yrabbit/ALU-head-at-zero 
gowin: BUGFIX. Place the ALU head in sliсe 0 only
 2021-12-12 13:00:38 +00:00
gatecat
3c8af04ca5 router2: Error instead of hang in case of reservation conflicts 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-12 13:00:04 +00:00
YRabbit
ecf3027a4d
Merge branch 'YosysHQ:master' into ALU-head-at-zero 2021-12-12 07:43:14 +10:00
gatecat
62fcf944f9
Merge pull request #866 from YosysHQ/gatecat/mistral-include-tools 
mistral: Add 'tools' dir to include path
 2021-12-11 20:05:48 +00:00
gatecat
df061b1a9c mistral: Add 'tools' dir to include path 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-11 19:07:30 +00:00
YRabbit
e0ab7bf6c1 gowin: BUGFIX. Place the ALU head in sliсe 0 only 
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2021-12-11 19:10:02 +10:00
gatecat
fd2d4a8f99
Merge pull request #863 from antmicro/pack_lutff 
nexus: LUT and FF clustering
 2021-11-24 17:16:38 +00:00
Maciej Kurc
41accf84ce Added checking if all FFs added to an existing cluster have matching configuration 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2021-11-23 15:16:26 +01:00
Maciej Kurc
238da79e52 Fixed potential issues with carry-chain cluster expansion, added a parameter controlling the ratio of FFs that got glued to carry-chain clusters. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2021-11-22 13:13:28 +01:00
Maciej Kurc
5bc97c94ae Added appending FFs to other existing LUT cluster types (carry, widefn) 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2021-11-22 10:23:24 +01:00
Maciej Kurc
086bcf0615 Added an option to control LUT and FF packing 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2021-11-22 10:23:24 +01:00
Maciej Kurc
d97f93ee88 Added clustering free LUTs and FFs 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2021-11-22 10:23:24 +01:00