Commit Graph

894 Commits

Author SHA1 Message Date
ZipCPU
c13c15bada Set the default log to stdout 2018-06-07 09:52:32 -04:00
ZipCPU
c352f6536b Moved placer definitions to place.h, main automatically runs placer now 2018-06-07 09:49:21 -04:00
ZipCPU
f32b9622d5 Initial (random) placer capability
This commit also includes changes to jsonparse to allow it to
1) recognize ports with no connection, and set their net pointers to NULL
2) recognize designs with a ports node rather than a ports_direction

The rule checker has also been modified to accommodate possible NULL netlists

The ice40 chip now also has iterator operations ++bi and bi++.
2018-06-07 09:38:14 -04:00
David Shah
1d39924c14 ice40: More Python bindings and examples
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-07 15:04:07 +02:00
David Shah
547d4fe3ee ice40: Refactor PortPin and add Python binding
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-07 14:36:35 +02:00
ZipCPU
efd8722fd9 Connected the log file facility to stderr 2018-06-07 08:12:22 -04:00
ZipCPU
0dbfa4662f Preliminary placer changes to main 2018-06-07 07:52:05 -04:00
David Shah
024ff8fa7d cmake: Add HX1K-only builds support
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-07 13:20:16 +02:00
David Shah
c3e0252703 Reformat Python bindings and ice40 main
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-07 13:10:53 +02:00
David Shah
6236a10427 Fixing file->run renaming
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-07 13:08:18 +02:00
David Shah
9ebc879826 Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-06-07 12:59:41 +02:00
David Shah
66b36cdd45 Merge branch 'python'
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-07 12:59:27 +02:00
David Shah
b0e66d441c Global design object working
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-07 12:57:52 +02:00
Clifford Wolf
1ea8fa4881 clang-format for design and chip codebase
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-07 12:56:49 +02:00
Clifford Wolf
2edde06c07 Fix clang-format include order issues
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-07 12:48:53 +02:00
David Shah
a5249da02d Working on global Python design object
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-07 12:40:31 +02:00
Clifford Wolf
8bfeaeaced Add ICE40_HX1K_ONLY config macro
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-07 12:26:02 +02:00
Clifford Wolf
9eeecf0e62 Rename --file to --run
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-07 12:19:48 +02:00
David Shah
0f6ebd6384 Allow specifying multiple Python files on the command line
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-07 09:01:30 +02:00
David Shah
bdd9313582 Allow loading and running Python files before GUI starts
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-07 08:56:54 +02:00
ZipCPU
16b9a2f1b5 Attempt to add JSON parser--not working yet w/ build system 2018-06-06 14:44:54 -04:00
Clifford Wolf
f9bd66e7ac Add iCE40 device selection, improve iCE40 IO GraphicElements
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-06 17:23:58 +02:00
Clifford Wolf
28e2276906 Add simple SVG generator to ice40 main
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-06 17:08:31 +02:00
Clifford Wolf
72b4bba0e7 Add ice40 geometry information
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-06 16:42:42 +02:00
Clifford Wolf
f07682f515 Add ice40 --test mode
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-06 16:01:31 +02:00
Clifford Wolf
5ff9aafb20 Refactor Chip API and iCE40 database
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-06 15:13:41 +02:00
Miodrag Milanovic
7cb42f4368 Initial GUI work 2018-06-05 21:03:06 +02:00
ZipCPU
709ce3884d Initial JSON parser 2018-06-05 09:01:26 -04:00
Clifford Wolf
d13a84b687 Add iCE40 blockram bels
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-04 12:37:56 +02:00
Clifford Wolf
eb3c89bee9 Replace GuiLine with GraphicElement
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-04 12:02:58 +02:00
Clifford Wolf
6840ffd9c0 Add iCE40 SB_IO bels
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-03 16:16:59 +02:00
Clifford Wolf
20d7cd0194 Add ice40 ICESTORM_LC bels
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-02 15:00:33 +02:00
Clifford Wolf
d85f5d2285 Remove now obsolete ice40/makefile.inc
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-02 14:49:32 +02:00
David Shah
e6302bbe73 Fix race condition and optimise the build 2018-06-02 14:17:31 +02:00
David Shah
363ddd0f3c Python bindings working on both architectures
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-02 13:48:28 +02:00
David Shah
d3f74eb056 Simple Python test working
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-02 13:48:28 +02:00
David Shah
f353453a7f Add architecture specific Python defs
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-02 13:48:28 +02:00
David Shah
ee0a5374d8 Add a CMake based build system
Signed-off-by: David Shah <davey1576@gmail.com>
2018-06-02 13:48:28 +02:00
Clifford Wolf
cdb31fdafc Use singular in type names (BelRange, WireIterator)
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-06-02 12:57:19 +02:00
Clifford Wolf
90c7e3b13d Add iCE40 blinky example
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-31 18:10:36 +02:00
Clifford Wolf
3b0d1beabb Add DelayInfo struct
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-29 20:04:29 +02:00
Clifford Wolf
d56e29c47e Progress in chip.h API
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-26 16:08:20 +02:00
Clifford Wolf
757786f134 Progress in ice40 chipdb
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-26 14:56:30 +02:00
Clifford Wolf
1899833b4d Start work on iCE40 chipdb
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-26 14:27:28 +02:00