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1246 Commits

Author SHA1 Message Date
Clifford Wolf
ac67482380 Remove pool, dict, vector namespace aliases 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-11 19:56:33 +02:00
Clifford Wolf
70f322ab44 Renamed LOC attribute to BEL, fix ice40 IO bel names 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 19:52:22 +02:00
David Shah
72f5e640af Adding basic placement constraints 
Specify the attribute (* LOC="bel_name" *) on any cell to constrain its
placement to that bel.

Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-09 19:38:37 +02:00
Clifford Wolf
dfbfbf87db Add very basic router 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 18:19:20 +02:00
Clifford Wolf
208d378322 Remove writing on sell types to cout (left over debug output?) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 15:20:13 +02:00
David Shah
57cd67dbc1 Improving the Python bindings, particularly the map/pair wrappers 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-08 15:53:24 +02:00
David Shah
c16a971c0f python: Fixing builds as importable module 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-08 11:17:04 +02:00
David Shah
7f330af9f3 Reformat remaining files 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-08 11:04:02 +02:00
ZipCPU
4499864024 Applied clang-format to my own contributions 2018-06-07 15:38:24 -04:00
ZipCPU
a4f687548e Adjusted info message names for rule-checker and parser 2018-06-07 12:04:01 -04:00
Clifford Wolf
37d2fc65b1 Fix placer build for dummy arch 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-07 17:50:36 +02:00
ZipCPU
c352f6536b Moved placer definitions to place.h, main automatically runs placer now 2018-06-07 09:49:21 -04:00
ZipCPU
f32b9622d5 Initial (random) placer capability 
This commit also includes changes to jsonparse to allow it to
1) recognize ports with no connection, and set their net pointers to NULL
2) recognize designs with a ports node rather than a ports_direction

The rule checker has also been modified to accommodate possible NULL netlists

The ice40 chip now also has iterator operations ++bi and bi++.
 2018-06-07 09:38:14 -04:00
ZipCPU
1ed5c641c1 Merge branch 'master' into gqtech 2018-06-07 07:45:22 -04:00
David Shah
ed0c44891f Replacing Boost type_traits with std 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-07 13:36:42 +02:00
David Shah
c3e0252703 Reformat Python bindings and ice40 main 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-07 13:10:53 +02:00
David Shah
9ebc879826 Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-06-07 12:59:41 +02:00
David Shah
b0e66d441c Global design object working 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-07 12:57:52 +02:00
Clifford Wolf
1ea8fa4881 clang-format for design and chip codebase 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-07 12:56:49 +02:00
Clifford Wolf
2edde06c07 Fix clang-format include order issues 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-07 12:48:53 +02:00
David Shah
a5249da02d Working on global Python design object 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-07 12:40:31 +02:00
David Shah
e576f71838 Developing Python bindings for Design and related types 2018-06-07 11:41:54 +02:00
David Shah
3769b20580 Adding Python to/from string wrappers for internal IDs 2018-06-07 09:47:00 +02:00
David Shah
bdd9313582 Allow loading and running Python files before GUI starts 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-07 08:56:54 +02:00
ZipCPU
109287ee90 Removed unused set of warnings from log.cc 2018-06-06 17:17:44 -04:00
David Shah
3a6e400f44 rulecheck.cc: Add missing return 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-06 21:14:42 +02:00
ZipCPU
16b9a2f1b5 Attempt to add JSON parser--not working yet w/ build system 2018-06-06 14:44:54 -04:00
ZipCPU
5e463b8543 Merge branch 'master' into gqtech 2018-06-06 12:21:04 -04:00
ZipCPU
468ed85280 Applied Rule Check to parser results, refactored JSON parser 2018-06-06 12:20:24 -04:00
Clifford Wolf
5ff9aafb20 Refactor Chip API and iCE40 database 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-06 15:13:41 +02:00
ZipCPU
d0ee08aeb1 Merge branch 'master' into gqtech 2018-06-06 07:55:18 -04:00
ZipCPU
2e6d0b752a Removed erroneous BEL assignment in JSON parser 2018-06-06 07:49:35 -04:00
Miodrag Milanovic
7cb42f4368 Initial GUI work 2018-06-05 21:03:06 +02:00
ZipCPU
bd08f9e698 Removed the log_ dependencies from json-parser 2018-06-05 11:39:27 -04:00
ZipCPU
8b6f8382b8 Added some logging functions, borrowed from Yosys 2018-06-05 11:15:35 -04:00
ZipCPU
709ce3884d Initial JSON parser 2018-06-05 09:01:26 -04:00
David Shah
3b78eda5d3 Add 'styles' to GraphicElement 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-04 13:30:20 +02:00
Clifford Wolf
eb3c89bee9 Replace GuiLine with GraphicElement 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-04 12:02:58 +02:00
David Shah
363ddd0f3c Python bindings working on both architectures 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-02 13:48:28 +02:00
David Shah
d3f74eb056 Simple Python test working 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-02 13:48:28 +02:00
David Shah
f353453a7f Add architecture specific Python defs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-02 13:48:28 +02:00
David Shah
a7415bfbc3 Adding generic Python range and iterator bindings 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-02 13:48:28 +02:00
David Shah
d62f7abd95 Creating an empty Python module 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-02 13:48:28 +02:00
Clifford Wolf
3b0d1beabb Add DelayInfo struct 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-29 20:04:29 +02:00
Clifford Wolf
1338f0f9eb Add Makefile 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-26 11:17:50 +02:00
Clifford Wolf
5e48758b30 Directory structure 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-26 10:47:35 +02:00