David Shah
d04e5954a6
ecp5: Adding support for 36-bit wide PDP RAMs
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Signed-off-by: David Shah <dave@ds0.me>
2019-10-01 12:01:33 +01:00
David Shah
9f9920f92b
ecp5: Add full part name to bitstream header
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Signed-off-by: David Shah <dave@ds0.me>
2019-08-27 14:36:20 +01:00
David Shah
78f86ce67a
ecp5: Add GSR/SGSR support
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Signed-off-by: David Shah <dave@ds0.me>
2019-08-27 13:14:41 +01:00
David Shah
c70f87e4c5
Merge pull request #309 from YosysHQ/dsptiming
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ecp5: Conservative analysis of comb DSP timing
2019-08-09 10:27:15 +01:00
David Shah
661237eb64
ecp5: Add --out-of-context for building hard macros
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Signed-off-by: David Shah <dave@ds0.me>
2019-08-07 14:22:47 +01:00
David Shah
ec48f8f464
ecp5: New Property interface
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Signed-off-by: David Shah <dave@ds0.me>
2019-08-05 17:22:37 +01:00
David Shah
2da41a66c7
ecp5: Conservative analysis of comb DSP timing
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Signed-off-by: David Shah <dave@ds0.me>
2019-07-08 15:09:54 +01:00
Miodrag Milanovic
ec47ce2320
Merge master
2019-06-25 18:14:51 +02:00
David Shah
df8688c227
ecp5: Delay tweaking for lower speed grades
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Signed-off-by: David Shah <dave@ds0.me>
2019-06-21 10:55:23 +01:00
David Shah
7ae64b9477
ecp5: Reduce cfg.criticalityExponent for now
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Signed-off-by: David Shah <dave@ds0.me>
2019-06-21 10:20:46 +01:00
Miodrag Milanovic
36ccc22fc9
Use flags for each step
2019-06-14 09:59:04 +02:00
Miodrag Milanovic
d9b0bac248
Save top level attrs and store current step
2019-06-07 16:11:11 +02:00
Miodrag Milanovic
78e6631f76
Cleanup
2019-06-07 13:49:19 +02:00
Miodrag Milanovic
54175f9187
No need for this one
2019-06-07 13:24:16 +02:00
David Shah
15a1d4f582
ecp5: Use an attribute to store is_global
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Signed-off-by: David Shah <dave@ds0.me>
2019-06-07 11:55:20 +01:00
Miodrag Milanovic
1093d7e122
WIP saving/loading attributes
2019-06-07 11:48:15 +02:00
David Shah
02ae21d8fc
Add --placer option and refactor placer selection
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Signed-off-by: David Shah <dave@ds0.me>
2019-03-24 11:10:20 +00:00
David Shah
fcc3bb1495
ecp5: Speedup cell delay lookups
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Signed-off-by: David Shah <dave@ds0.me>
2019-03-22 10:31:54 +00:00
David Shah
bd12c0a486
HeAP: Add PlacerHeapCfg
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Signed-off-by: David Shah <dave@ds0.me>
2019-03-22 10:31:54 +00:00
David Shah
7142db28a8
HeAP: Make HeAP placer optional
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A CMake option 'BUILD_HEAP' (default on) configures building of the
HeAP placer and the associated Eigen3 dependency.
Default for the iCE40 is SA placer, with --heap-placer to use HeAP
Default for the ECP5 is HeAP placer, as SA placer can take 1hr+ for
large ECP5 designs and HeAP tends to give better QoR. --sa-placer can
be used to use SA instead, and auto-fallback to SA if HeAP not built.
Signed-off-by: David Shah <dave@ds0.me>
2019-03-22 10:31:54 +00:00
David Shah
2e2f44c82e
HeAP: tidying up
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Signed-off-by: David Shah <dave@ds0.me>
2019-03-22 10:31:54 +00:00
David Shah
8295f997ae
HeAP: Use for ECP5 as well as iCE40
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Signed-off-by: David Shah <dave@ds0.me>
2019-03-22 10:31:54 +00:00
David Shah
ea56dc9d08
HeAP: Add TAUCS wrapper and integration
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Signed-off-by: David Shah <dave@ds0.me>
2019-03-22 10:31:54 +00:00
David Shah
df79d94944
ecp5: DELAY fixes
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Signed-off-by: David Shah <dave@ds0.me>
2019-02-25 11:49:25 +00:00
David Shah
95a85c8ea7
ecp5: Improve packing density
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Signed-off-by: David Shah <dave@ds0.me>
2019-02-25 11:49:25 +00:00
David Shah
a0fa164399
ecp5: Add criticality-based LUT permutation
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Signed-off-by: David Shah <dave@ds0.me>
2019-02-25 11:49:25 +00:00
David Shah
f363dd2d3c
ecp5: Delay tuning
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Signed-off-by: David Shah <dave@ds0.me>
2019-02-25 11:49:25 +00:00
David Shah
4ec2bd1e5d
ecp5: Fix global clock routing with multiclock DPRAM
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Signed-off-by: David Shah <dave@ds0.me>
2019-02-25 11:49:25 +00:00
David Shah
55b0b60d9d
ecp5: Router performance improvements
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Signed-off-by: David Shah <dave@ds0.me>
2019-02-25 11:49:25 +00:00
David Shah
f5b11ce075
ecp5: Implement budget overrides for carry chains and SLICE muxes
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Signed-off-by: David Shah <dave@ds0.me>
2019-02-25 11:49:25 +00:00
David Shah
af3ff143be
ecp5: Improve delay model
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Signed-off-by: David Shah <dave@ds0.me>
2019-02-25 11:49:25 +00:00
David Shah
998d055ea7
ecp5: Speed up timing analysis
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Signed-off-by: David Shah <dave@ds0.me>
2019-02-25 11:49:25 +00:00
David Shah
68abcb365a
ecp5: Add ECLKSYNCB support
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Signed-off-by: David Shah <dave@ds0.me>
2019-02-24 10:28:25 +01:00
David Shah
52d1954d96
ecp5: Packing of ODDRX2F
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Signed-off-by: David Shah <dave@ds0.me>
2019-02-24 10:28:25 +01:00
David Shah
63e1f02c65
ecp5: Helper functions for DQS and ECLK
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Signed-off-by: David Shah <dave@ds0.me>
2019-02-24 10:28:25 +01:00
David Shah
db1666fc3d
ecp5: Add timing data for DQS-related cells
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Signed-off-by: David Shah <dave@ds0.me>
2019-02-24 10:28:25 +01:00
Miodrag Milanović
c52202233a
Merge branch 'master' into mmaped_chipdb
2019-02-12 18:53:20 +01:00
David Shah
565d5eed17
ecp5: Fix global routing performance
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Signed-off-by: David Shah <dave@ds0.me>
2019-02-12 10:56:17 +00:00
Miodrag Milanovic
73f200fe74
Load chipdb from filesystem as option
2019-02-09 13:34:57 +01:00
David Shah
e929d221f3
ecp5: Adding DTR, OSCG, CLKDIVF, USRMCLK, JTAGG
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Signed-off-by: David Shah <dave@ds0.me>
2019-02-08 12:34:22 +00:00
David Shah
c01bb88509
ecp5: Add IOLOGIC timing and bitstream; ODDR working
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Signed-off-by: David Shah <dave@ds0.me>
2018-12-14 16:40:38 +00:00
David Shah
4e05d09397
Improve reporting of unknown cell types
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Signed-off-by: David Shah <dave@ds0.me>
2018-11-29 19:26:23 +00:00
David Shah
3ae8b86003
ecp5: Adding mux support up to LUT6
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Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 17:27:23 +00:00
David Shah
1ae722272a
ecp5: clangformat timing changes
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Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:27:03 +00:00
David Shah
50b85da619
ecp5: Use speed-grade-specific delay estimate
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Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:26:28 +00:00
David Shah
13244e513b
ecp5: Fix db import, improve timing data debugging
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Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:26:28 +00:00
David Shah
ffe1166e33
ecp5: Post-rebase fix
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Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:26:28 +00:00
David Shah
3ecd440748
ecp5: Use new timing data
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Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:26:28 +00:00
David Shah
18813f2056
ecp5: Adding real timing data to database
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Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:26:28 +00:00
David Shah
02736d0680
ecp5: Add timing info for SERDES
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Signed-off-by: David Shah <dave@ds0.me>
2018-11-15 11:30:27 +00:00