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Author SHA1 Message Date
Clifford Wolf
d62e341d5a Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-06-12 14:25:12 +02:00
Clifford Wolf
391d49c13e Add nextpnr namespace 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-12 14:24:59 +02:00
David Shah
9ee6a6e114 ice40: Creating packer tests 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 14:19:26 +02:00
David Shah
47eeda40bc Implement the placement validity checker 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 13:45:59 +02:00
David Shah
031d8e811f ice40: Adding a placement validity checker 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 13:40:22 +02:00
David Shah
67a5cedbe3 ice40: Pack constants to LCs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 13:09:36 +02:00
David Shah
f72807f790 ice40: Debugging the packer 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 12:46:30 +02:00
David Shah
2f61a9b98a ice40: Start working on a packer, currently not tested 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 12:13:11 +02:00
David Shah
5f813410aa ice40: Adding cell utilities for packing 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 11:49:54 +02:00
David Shah
3ce32b6b1d Adding some utilities for packing 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 11:02:07 +02:00
David Shah
19aefe374c ice40: Optimising chipdb builds 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-12 10:39:33 +02:00
Miodrag Milanovic
5a5dcc52fd Made gtest work on MINGW with solution from https://github.com/google/googletest/issues/606 2018-06-12 08:06:27 +02:00
Miodrag Milanovic
102e10f2dd Clang format to ignore 3rdparty and fix one file 2018-06-11 21:36:54 +02:00
Miodrag Milanovic
599cbb12fa Fix gitignore 2018-06-11 21:30:22 +02:00
Miodrag Milanovic
9029ebde3b Added dummy tests per arch 2018-06-11 21:30:22 +02:00
Miodrag Milanovic
362af26833 added google tests to 3rdparty 2018-06-11 21:30:22 +02:00
Miodrag Milanovic
8c9ce776ec Added property editor for example 2018-06-11 21:30:22 +02:00
Miodrag Milanovic
f1cf449c09 compile QtPropertyBrowser 2018-06-11 21:30:22 +02:00
Miodrag Milanovic
eb392f649e Added QtPropertyBrowser source 2018-06-11 21:30:22 +02:00
Clifford Wolf
be73894bea Add "nextpnr.h" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-11 20:12:57 +02:00
Clifford Wolf
ac67482380 Remove pool, dict, vector namespace aliases 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-11 19:56:33 +02:00
Clifford Wolf
f63eec034f Add conflicting=false argument to bind getters 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-11 19:46:03 +02:00
Miodrag Milanovic
17fae4c9e1 Proper looking output in python console 2018-06-11 15:34:01 +02:00
Miodrag Milanovic
979a14c930 OpenGL library portable way of using 2018-06-11 10:01:25 +02:00
Miodrag Milanovic
b4b5586efd Fixed portability issue, now it works on msys2 windows build as well 2018-06-11 09:33:42 +02:00
Miodrag Milanovic
9f8bdd3c3e nice way to get main window 2018-06-10 20:48:52 +02:00
Miodrag Milanovic
d8d38cd107 Draw fpga model 2018-06-10 19:56:17 +02:00
Miodrag Milanovic
4bcbe977ab Propagate design to widget 2018-06-10 18:33:39 +02:00
Miodrag Milanovic
67227847e5 Pass design to gui, display chip name 2018-06-10 18:25:23 +02:00
David Shah
d3f1112580 Improving 5k support 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 17:20:29 +02:00
Clifford Wolf
458a13456a Fix iCE40 routing graph 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-10 17:08:14 +02:00
Clifford Wolf
602e6fab1e Add support for iCE40 global buffers (currently only for 1k devices) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-10 16:31:06 +02:00
David Shah
02b83d6db6 Debugging on icebreaker 2018-06-10 15:06:26 +02:00
Clifford Wolf
032c94d094 Add blinky post-synthesis testbench 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-10 14:31:38 +02:00
Clifford Wolf
4a79e70470 Fix ice40 pip/switch locked performance issue 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-10 14:08:00 +02:00
David Shah
8d5da98122 ice40: Set config bits for unused IO 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 13:38:34 +02:00
David Shah
4e6d6e632f ice40: Fix techmap 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 13:33:47 +02:00
David Shah
30e672313d ice40: Add IO config to bitstream 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 13:24:48 +02:00
David Shah
d0bd657551 ice40: Write logic cell config to bitstream 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 12:58:05 +02:00
David Shah
6da8f98eac ice40: Lock out mutually exclusive pips 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 12:17:55 +02:00
David Shah
827a43c88c ice40: Start adding routing to asc output 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 12:11:58 +02:00
David Shah
d0431225f1 ice40: Writing an empty ASC file 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 11:56:07 +02:00
David Shah
89d5280bf6 ice40: Adding non-routing config bits to database 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 11:14:50 +02:00
David Shah
48b72126c9 ice40: Add switch data to database 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-10 10:54:55 +02:00
Clifford Wolf
70f322ab44 Renamed LOC attribute to BEL, fix ice40 IO bel names 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 19:52:22 +02:00
David Shah
72f5e640af Adding basic placement constraints 
Specify the attribute (* LOC="bel_name" *) on any cell to constrain its
placement to that bel.

Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-09 19:38:37 +02:00
David Shah
e15620ccd4 json: Parse cell attributes 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-06-09 19:33:44 +02:00
Clifford Wolf
8cabb39d6d Getting rid of .nil() methods, compare with zero- and default-constructed objects instead 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 18:41:38 +02:00
Clifford Wolf
0bc5b1c2d9 Add dummy implementations of dummy Chip API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 18:31:35 +02:00
Clifford Wolf
dfbfbf87db Add very basic router 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-09 18:19:20 +02:00