Commit Graph

538 Commits

Author SHA1 Message Date
Gary Wong
8cc6a2fae5 Remove comment about the USRMCLK primitive being untested.
Tested and verified working: the trivial configuration:

    module USRMCLK( USRMCLKI, USRMCLKTS );
        input USRMCLKI, USRMCLKTS;
    endmodule

    module top( input clk );
        reg[ 24:0 ] count = 0;

        always @( posedge clk ) begin
            count <= count + 1'b1;
        end

        USRMCLK mspi( .USRMCLKI( count[ 20 ] ), .USRMCLKTS( count[ 24 ] ) );
    endmodule

produces the expected output (toggling at high frequency, toggling
tri-state at lower frequency) on an LFE5U-85 when fed with an appropriate
clock.  See https://bayimg.com/AAnNKAAGO for an example.  The top
(magenta) trace is the MCLK line.
2020-04-02 21:35:35 -06:00
Martin
707289c8d6 Enum/int compatibility for EHXPLLL parameters
- Lattice component EHXPLLL parameter compatibility, allowing to
  pass an int parameter for the enum (as expected by trellis tile)
  e.g. CLKOP_TRIM_DELAY : integer := 0;
2020-04-02 14:25:00 +02:00
David Shah
3b49c20f43 ecp5: Proper support for '12k' device
Signed-off-by: David Shah <dave@ds0.me>
2020-03-13 11:22:11 +00:00
David Shah
bb73580209
Merge pull request #400 from YosysHQ/dave/tri-fixes
Improve handling of unused inout port bits
2020-03-10 13:50:59 +00:00
David Shah
751f4556fd ecp5: Fix differential inputs
Signed-off-by: David Shah <dave@ds0.me>
2020-03-08 11:32:34 +00:00
Sylvain Munaut
054be6fb67 build: Default the ECP5 and iCE40 roots to the install prefix
If the user specifies a custom install prefix, chances are icestrom/trellis
are also in that prefix rather than the hardcoded /usr/local

Fixes #351

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2020-03-03 15:32:10 +01:00
David Shah
9aa22433ff Improve handling of unused inout port bits
Signed-off-by: David Shah <dave@ds0.me>
2020-02-25 14:26:47 +00:00
Sebastian Birke
2c938e0e8b Rename cmake path variable TRELLIS_ROOT to TRELLIS_INSTALL_PREFIX 2020-02-04 18:19:45 +01:00
Jared Boone
1b560ae44c CMake: Changing the definition of TRELLIS_ROOT to point to root of lib, share containing trellis libs and data
two other commit message of squashed commits:
CMake: Search for user lib inside trellis instead of libtrellis

CMake: Fix missing path component for share contents
2020-02-04 18:19:45 +01:00
David Shah
1ceffbe0bc
Merge pull request #391 from YosysHQ/router2-upstream
Upstreaming router2
2020-02-04 16:08:08 +00:00
David Shah
b4d029a55c
Merge pull request #385 from YosysHQ/router1-arc-fixes
Fixes for partial reconfig demo
2020-02-03 13:55:07 +00:00
David Shah
2248e07b66 router2: Improve flow and log output
Signed-off-by: David Shah <dave@ds0.me>
2020-02-03 13:46:05 +00:00
David Shah
7123209324 Allow selection of router algorithm
Signed-off-by: David Shah <dave@ds0.me>
2020-02-03 11:54:38 +00:00
David Shah
ad1cc12df1 router2: Make magic numbers configurable
Signed-off-by: David Shah <dave@ds0.me>
2020-02-03 11:38:31 +00:00
David Shah
5e1aac67db ecp5: Improve bounding box accuracy
Signed-off-by: David Shah <dave@ds0.me>
2020-02-03 11:38:31 +00:00
David Shah
d2c77fd9ae ecp5: router2 main rename
Signed-off-by: David Shah <dave@ds0.me>
2020-02-03 11:38:31 +00:00
David Shah
abdaa9c8a1 ecp5: Router2 test integration
Signed-off-by: David Shah <dave@ds0.me>
2020-02-03 11:38:30 +00:00
Erika
9185c85a54 python: Expose PlaceStrength enum and isValidBelForCell on ecp5
Signed-off-by: Erika <rrika9@yahoo.com>
2020-01-26 20:32:02 +00:00
David Shah
3b5e64e8c6 ecp5: Fix tieoff of unused DELAY signals
Signed-off-by: David Shah <dave@ds0.me>
2020-01-21 19:02:26 +00:00
David Shah
7c81d4e630 ecp5: Add SPICB0 IO support
Signed-off-by: David Shah <dave@ds0.me>
2020-01-20 20:30:14 +00:00
David Shah
9dc8e1e35d ecp5: Don't reroute existing globals
Signed-off-by: David Shah <dave@ds0.me>
2020-01-20 14:58:38 +00:00
Miodrag Milanovic
714769e1b8 Few more caught by clang 2020-01-18 15:58:09 +01:00
David Shah
54c1bc1538
Merge pull request #382 from YosysHQ/ecp5-psuedodiff
ecp5: Add support for top pseudo diff outputs
2020-01-16 09:38:00 +00:00
David Shah
f513d5fff4 ecp5: Add support for top pseudo diff outputs
Signed-off-by: David Shah <dave@ds0.me>
2020-01-15 11:43:12 +00:00
Larry Doolittle
eba6ea53f8 More adjustments to .bba file locations
Follows PM discussion with Marcus Comstedt.
Extend changes in .bba file location (made in commit b6a7b60) to ice40 and MSVC cases,
  so all cases become compatible with read-only access to git tree.
Only known down-side is inefficiency when building out-of-tree for multiple architectures;
  people following that use case should consider using PREGENERATED_BBA_PATH.
It would be nice if there were less copy-paste in MSVC vs. non-MSVC content in family.cmake,
  but that would have to be addressed by someone more skilled in Cmake and MSVC.
2020-01-14 12:28:40 -08:00
Larry Doolittle
b6a7b607fd Remove barrier to out-of-tree builds
With this change, nextpnr can build successfully (and run correctly) using the git tree as a read-only reference.
No change in behavior observed for in-tree builds.
2020-01-12 21:11:56 -08:00
Miodrag Milanovic
fb5480cde3 clangformat 2019-12-28 15:02:13 +01:00
Miodrag Milanovic
59f4755e8f made most of frequent numbers constants 2019-12-28 15:01:36 +01:00
Miodrag Milanovic
6cca93543b move constants to gfx.cc 2019-12-28 14:27:14 +01:00
Miodrag Milanovic
6ebe2fd034 remove synt example 2019-12-28 14:08:58 +01:00
Miodrag Milanovic
796d648995 Merge remote-tracking branch 'origin/master' into mmicko/ecp5_gui 2019-12-28 13:54:06 +01:00
Miodrag Milanovic
50f87a6024 add newline at eof 2019-12-28 13:51:02 +01:00
David Shah
0d43aff268 ecp5: Always promote IOLOGIC SCLK to global
Fixes #374

Signed-off-by: David Shah <dave@ds0.me>
2019-12-27 15:53:00 +00:00
David Shah
fe40094216 Preserve hierarchy through packing
Signed-off-by: David Shah <dave@ds0.me>
2019-12-27 10:44:30 +00:00
David Shah
b100087024 python: Add bindings for hierarchy structures
Signed-off-by: David Shah <dave@ds0.me>
2019-12-27 10:44:30 +00:00
David Shah
b6e2159cec Work around Qt MOC issue with IdString enums
Signed-off-by: David Shah <dave@ds0.me>
2019-12-27 10:32:23 +00:00
Miodrag Milanovic
a05954249a optimize and set order 2019-12-20 14:02:00 +01:00
Miodrag Milanovic
c26c5e7b8e clang format 2019-12-20 09:07:03 +01:00
Miodrag Milanovic
e4210e7fd3 Add all missing wires 2019-12-20 09:05:58 +01:00
Miodrag Milanovic
b271e59472 Add global wires 2019-12-15 17:20:48 +01:00
Miodrag Milanovic
d5174110fa more pips on connection box 2019-12-15 10:57:24 +01:00
Miodrag Milanovic
f2b8e347a9 cleanup and formating 2019-12-15 10:43:30 +01:00
Miodrag Milanovic
2872b500e3 make it more simetric 2019-12-15 10:33:12 +01:00
Miodrag Milanovic
bbc05f3113 optimize and add some missing pips 2019-12-15 10:07:55 +01:00
Miodrag Milanovic
3d42097e9d cleanup 2019-12-15 09:45:09 +01:00
Miodrag Milanovic
fa55a826b2 cleanup wire 2019-12-15 09:26:25 +01:00
Miodrag Milanovic
436260e47e move bel creation to gfx.cc 2019-12-15 09:21:58 +01:00
Miodrag Milanovic
fb27f1a031 fix formating 2019-12-14 16:40:27 +01:00
Miodrag Milanovic
cce27e72f0 lot more pips 2019-12-14 16:29:25 +01:00
Miodrag Milanovic
abf9bc3bb9 fixes and more pips 2019-12-14 16:10:41 +01:00