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Author SHA1 Message Date
gatecat
f0b2a91bda generic: Update docs 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-15 10:37:06 +00:00
gatecat
a8a5153873 generic: Add bel pin mapping test 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-15 10:22:29 +00:00
gatecat
a002ccfbc1 generic: Add APIs for controlling cell->bel pin mapping 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-15 09:58:56 +00:00
gatecat
065f46daeb
Merge pull request #578 from YosysHQ/machxo2-rebase 
machxo2, rebased and updated
 2021-02-15 09:39:56 +00:00
gatecat
1b6cdce925
Merge pull request #575 from YosysHQ/gatecat/belpin-2 
Support for cell pin to bel pin mappings
 2021-02-15 09:38:22 +00:00
gatecat
f1ccc0e205
Merge pull request #582 from litghost/add_xdc_parser 
Add XDC parser to FPGA interchange
 2021-02-12 22:40:41 +00:00
Keith Rothman
033cc6731b Add FPGA interchange tests to CI. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-12 13:48:50 -08:00
Keith Rothman
5312945757 Update tests to include XDC unit test. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-12 10:31:05 -08:00
Keith Rothman
82ab3c1aad Run "make clangformat". 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-12 10:31:05 -08:00
Keith Rothman
8a860857ea Remove capnp and libz for XDC parser PR. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-12 10:31:05 -08:00
Keith Rothman
c96d0f225c Refactor XDC parser into a little class for testing purposes. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-12 10:31:04 -08:00
Keith Rothman
d987bd2997 Add unknown handles to convert [0] to "[0]". 
Tcl reads something like "set port [get_ports x[0]]" as "invoke proc 0
with zero arguments", rather than just "[0]".  To prevent exposing
non-Tcl users this, "[<number>]" just return themselves.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-12 10:31:04 -08:00
Keith Rothman
a0bd313139 Add FPGA interchange XDC parser. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-12 10:31:04 -08:00
gatecat
cede682585
Merge pull request #579 from litghost/add_control_for_split_io 
Add control to whether GenericFrontend splits IO ports.
 2021-02-12 18:22:06 +00:00
Keith Rothman
e28dedbbe3 Update docs. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-12 08:07:09 -08:00
gatecat
9c9a02628d ci: Bump prjtrellis version 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-12 11:51:21 +00:00
gatecat
d3688982ac Fix bad rebase 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-12 11:16:59 +00:00
gatecat
6de733b38c machxo2: Misc tidying up 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-12 10:43:15 +00:00
gatecat
33eca9a3d2 machxo2: Python bindings and stub GUI 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-12 10:40:03 +00:00
gatecat
8f5133d811 machxo2: Use snake_case for non-ArchAPI functions 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-12 10:36:59 +00:00
gatecat
b539363cd0 machxo2: Use IdStringLists in earnest 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-12 10:36:59 +00:00
gatecat
3f7618283d machxo2: Update with Arch API changes 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-12 10:36:59 +00:00
William D. Jones
32433db7ae machxo2: Prepare README.md for first PR. 2021-02-12 10:36:59 +00:00
William D. Jones
3dbd5b0932 machxo2: Add prefix parameter to simtest.sh. Remove show command from 
simtest.sh. Update README.md.
 2021-02-12 10:36:59 +00:00
William D. Jones
730e543ca6 machxo2: Add prefix parameter to simple.sh. Update README.md. 2021-02-12 10:36:59 +00:00
William D. Jones
0b0faa2f1c machxo2: Fill in more about mitertest.sh in README.md and clean up a bit. 2021-02-12 10:36:59 +00:00
William D. Jones
73c851d8e0 machxo2: Add two new examples: blinky_ext and aforementioned UART. 2021-02-12 10:36:59 +00:00
William D. Jones
74b5e846a5 machxo2: auto-top does not work for smt miter either. 2021-02-12 10:36:59 +00:00
William D. Jones
77bb3e73cd machxo2: Fix unhelpful comment in mitertest.sh. 2021-02-12 10:36:59 +00:00
William D. Jones
2b54e87548 machxo2: Verilog examples using OSCH cannot be simulated in mitertest.sh. Remove show from mitertest.sh. 2021-02-12 10:36:59 +00:00
William D. Jones
a3a38b0536 machxo2: Add prefix parameter to mitertest.sh. All Verilog files top modules named "top". 2021-02-12 10:36:59 +00:00
William D. Jones
0aa472fb3a machxo2: Add prefix paramter to demo.sh. 2021-02-12 10:36:59 +00:00
mtnrbq
b9eb443e54 Add demo with RGB LED 2021-02-12 10:36:59 +00:00
William D. Jones
4948e8d914 machxo2: Fix packing when FF is driven by a constant; UART test core working on silicon, fails post-synth sim. 2021-02-12 10:36:59 +00:00
William D. Jones
086bca18b8 machxo2: Add packing logic to handle FFs fed with constant value; UART test core routes. 2021-02-12 10:36:59 +00:00
William D. Jones
3ab300a28e machxo2: Add additional packing phase to pack remaining FFs. 2021-02-12 10:36:59 +00:00
William D. Jones
f18df5ed59 machxo2: Don't write out config bits for cells without location info. 2021-02-12 10:36:59 +00:00
William D. Jones
da1b15d6f5 machxo2: Special-case left and right I/O wire names in ASCII generation. 2021-02-12 10:36:59 +00:00
William D. Jones
8629d7b692 machxo2: Add quickstart README.md. 2021-02-12 10:36:59 +00:00
William D. Jones
07bc6bac53 machxo2: Fail CMake configuration is BUILD_PYTHON is ON (not supported for now). 2021-02-12 10:36:59 +00:00
William D. Jones
c9487293e9 machxo2: Fix REGMODE identifier (per slice, not per-FF). 2021-02-12 10:36:59 +00:00
William D. Jones
d0b822c036 machxo2: Add demo.sh TinyFPGA Ax example. 2021-02-12 10:36:59 +00:00
William D. Jones
0250aaaddd machxo2: clang format. 2021-02-12 10:36:59 +00:00
William D. Jones
2c9d4ba9ae machxo2: Fix reversed interpretation of REG_SD config bits. 2021-02-12 10:36:59 +00:00
William D. Jones
0d00c10e2f machxo2: Add bitstream generation for OSCH. 2021-02-12 10:36:59 +00:00
William D. Jones
884e7d9a98 machxo2: Add basic bitstream generation for PIC tiles and I/O. 2021-02-12 10:36:59 +00:00
William D. Jones
d485dc6ef6 machxo2: Add REGMODE to bitstream output. 2021-02-12 10:36:59 +00:00
William D. Jones
5415194b39 machxo2: Checkpoint commit for slice bitstream generation. 2021-02-12 10:36:59 +00:00
William D. Jones
cf2db7a4c4 machxo2: Write out pips to bitstream. 2021-02-12 10:36:59 +00:00
William D. Jones
56656b2b24 machxo2: Emit empty bitstream file. 2021-02-12 10:36:59 +00:00