Clifford Wolf
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1ea8fa4881
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clang-format for design and chip codebase
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2018-06-07 12:56:49 +02:00 |
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ZipCPU
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5e463b8543
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Merge branch 'master' into gqtech
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2018-06-06 12:21:04 -04:00 |
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Clifford Wolf
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5ff9aafb20
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Refactor Chip API and iCE40 database
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2018-06-06 15:13:41 +02:00 |
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ZipCPU
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2e6d0b752a
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Removed erroneous BEL assignment in JSON parser
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2018-06-06 07:49:35 -04:00 |
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ZipCPU
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709ce3884d
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Initial JSON parser
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2018-06-05 09:01:26 -04:00 |
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David Shah
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3b78eda5d3
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Add 'styles' to GraphicElement
Signed-off-by: David Shah <davey1576@gmail.com>
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2018-06-04 13:30:20 +02:00 |
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Clifford Wolf
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eb3c89bee9
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Replace GuiLine with GraphicElement
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2018-06-04 12:02:58 +02:00 |
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Clifford Wolf
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3b0d1beabb
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Add DelayInfo struct
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2018-05-29 20:04:29 +02:00 |
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Clifford Wolf
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1338f0f9eb
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Add Makefile
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2018-05-26 11:17:50 +02:00 |
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Clifford Wolf
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5e48758b30
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Directory structure
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2018-05-26 10:47:35 +02:00 |
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