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f52b5b39ed
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86 Commits

Author SHA1 Message Date
Alessandro Comodi
f52b5b39ed fpga_interchange: tests: add techmap optional source file 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-03-16 15:39:02 +01:00
Alessandro Comodi
3f3cabea2d fpga_interchange: add bbasm step and archcheck 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-03-16 15:39:02 +01:00
Alessandro Comodi
0b62e540a3 fpga_interchange: address review comments 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-03-16 15:39:02 +01:00
Alessandro Comodi
bd2da27e4e fpga_interchange: tests: added comment and fixed XDC 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-03-16 15:39:02 +01:00
Alessandro Comodi
e5cc03965e fpga_interchange: chipdb: use generic patching function 
Also moved the RapidWright invocation script path under a CMake variable

Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-03-16 15:39:02 +01:00
Alessandro Comodi
490fdb0a1c fpga_interchange: cmake: generate only one device family 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-03-16 15:39:01 +01:00
Alessandro Comodi
77ffdd7fd4 fpga_interchange: tests: add cmake functions 
Also move all tests in a tests directory

Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-03-16 15:39:01 +01:00
Alessandro Comodi
d77d0ff34a fpga_intrchange: add cmake infrastructure to generate chipdbs 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-03-16 15:39:01 +01:00
Keith Rothman
351ca3b5ea Use NEXTPNR_NAMESPACE macro's now that headers are seperated. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-03-15 18:49:12 +00:00
Keith Rothman
fe4608386e Split nextpnr.h to allow for linear inclusion. 
"nextpnr.h" is no longer the god header.  Important improvements:

 - Functions in log.h can be used without including
   BaseCtx/Arch/Context. This means that log_X functions can be called
   without included "nextpnr.h"

 - NPNR_ASSERT can be used without including "nextpnr.h" by including
   "nextpnr_assertions.h".  This allows NPNR_ASSERT to be used safely in
   any header file.

 - Types defined in "archdefs.h" are now available without including
   BaseCtx/Arch/Context.  This means that utility classes that will be
   used inside of BaseCtx/Arch/Context can be defined safely in a
   self-contained header.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-03-15 09:05:23 -07:00
gatecat
fba71bd182 clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-03 10:39:47 +00:00
Keith Rothman
71b92cb813 Update FPGA interchange README. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-26 11:01:22 -08:00
Keith Rothman
78748a67be For now just return false in the site router. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-26 11:01:22 -08:00
Keith Rothman
cfa449c3f3 Initial LUT rotation logic. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-26 11:01:22 -08:00
Keith Rothman
9cbfd0b967 Add counter test. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-26 11:01:22 -08:00
gatecat
23413a4d12 Fix compiler warnings introduced by -Wextra 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-25 15:15:25 +00:00
Keith Rothman
a30043c8da Fix assorted bugs in FPGA interchange. 
Fixes:
 - Only use map constant pins during routing, and not during placement.
 - Unmapped cell ports have no BEL pins.
 - Fix SiteRouter congestion not taking into account initial expansion.
 - Fix psuedo-site pip output.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-23 14:09:28 -08:00
Keith Rothman
184665652e Finish dedicated interconnect implementation. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-23 14:09:28 -08:00
Keith Rothman
5574455d2a Working FF example now that constant merging is done. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-23 14:09:28 -08:00
Keith Rothman
2fc353d559 Add initial logic for handling dedicated interconnect situations. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-23 14:09:28 -08:00
Keith Rothman
cd8297f54d Move RapidWright git URI back to upstream. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-23 14:09:28 -08:00
Keith Rothman
5c6e231412 Remove some signedness warnings. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-23 14:09:28 -08:00
Keith Rothman
46b38f8a40 Fix reference copy. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-23 14:09:27 -08:00
Keith Rothman
3ccb164f2a Run "make clangformat". 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-23 14:09:27 -08:00
Keith Rothman
15459cae91 Initial working constant network support! 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-23 14:09:27 -08:00
Keith Rothman
cf554f9338 Add constant network test case. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-23 14:09:27 -08:00
Keith Rothman
3e5a23ed5b Add tests to confirm constant routing import. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-23 14:09:27 -08:00
Keith Rothman
761d9d9229 Correct some bugs in the create_bba Makefile. 
Also add debug_test target to debug archcheck.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-23 14:09:27 -08:00
Keith Rothman
40df4f4f65 Add initial constant network support to FPGA interchange arch. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-23 14:09:27 -08:00
Keith Rothman
423a10bc31 Change CellInfo in getBelPinsForCellPin to be const. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-23 14:08:54 -08:00
gatecat
7922b3bfc4 Replace DelayInfo with DelayPair/DelayQuad 
This replaces the arch-specific DelayInfo structure with new DelayPair
(min/max only) and DelayQuad (min/max for both rise and fall) structures
that form part of common code.

This further reduces the amount of arch-specific code; and also provides
useful data structures for timing analysis which will need to delay
with pairs/quads of delays as it is improved.

While there may be a small performance cost to arches that didn't
separate the rise/fall cases (arches that aren't currently separating
the min/max cases just need to be fixed...) in DelayInfo, my expectation
is that inlining will mean this doesn't make much difference.

Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-19 11:31:33 +00:00
Keith Rothman
c21e23b3eb Fix sign mismatch. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-18 14:08:22 -08:00
Keith Rothman
e138a6c56d Do some spell checking on site_router.cc 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-18 13:34:06 -08:00
Keith Rothman
4766e889c0 Add some utility methods for site instance access. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-18 13:26:52 -08:00
Keith Rothman
532954847a Update README's with latest instructions and features. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-18 13:01:42 -08:00
Keith Rothman
8ef5411f70 Add utility targets for getting plain text outputs. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-17 12:03:17 -08:00
Keith Rothman
b3dcc9d507 Add IOSTANDARD to ports. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-17 12:03:17 -08:00
Keith Rothman
5833c90210 Emit fixed attributes to output physical netlist. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-17 12:03:17 -08:00
Keith Rothman
558a753d3d Refactor "get only from iterator" to a utility. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-17 12:03:17 -08:00
Keith Rothman
9e0ca72827 Keep all build artifacts under create_bba/build. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-17 12:03:16 -08:00
Keith Rothman
f9bd692f75 Change how package pin IO sites are selected. 
The first site type that matches is now selected, under the premise that
the early site types are more general.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-17 12:03:16 -08:00
Keith Rothman
cc687b3b72 Change makefiles to build a FPGA interchange BBA. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-17 12:03:16 -08:00
Keith Rothman
5a7f83c705 Add examples invoking FPGA interchange nextpnr. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-17 12:03:16 -08:00
Keith Rothman
7c1544f4d8 Continue fixes. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-17 12:03:16 -08:00
Keith Rothman
6f1c835221 Disable traversal limit when reading logical netlist. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-17 12:03:16 -08:00
Keith Rothman
c385321248 Add initial site router. 
This site router likely cannot handle the full problem space.  It may
need to be replaced with a more generalize approach as testing
continues.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-17 12:03:16 -08:00
Keith Rothman
a7421399f7 Working on standing up initial constraints system. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-17 12:03:16 -08:00
gatecat
399c24c805 clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-17 10:45:23 +00:00
gatecat
da1ecf0813
Merge pull request #586 from litghost/add_cell_bel_mapping_only 
Add Cell -> BEL Pin maps to FPGA interchange arch.
 2021-02-17 10:16:45 +00:00
Keith Rothman
26a187e5eb Require --package when arch BBA contains multiple packages. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-02-16 14:00:01 -08:00