caiyu/nextpnr
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
1,772 Commits 22 Branches 7 Tags 17 MiB
f53dc8d3c9
Commit Graph

1772 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
David Shah
f53dc8d3c9 timing_opt: Improve heuristics 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:53:01 +00:00
David Shah
a990a1576c timing_opt: Fix criticality and cost calculations 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:53:01 +00:00
David Shah
f3adf5a576 timing_opt: Make an optional pass controlled by command line 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:53:01 +00:00
David Shah
0f40e5fe8c timing: Fixes to criticality calculation 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:53:01 +00:00
David Shah
254c5ea359 clangformat 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:53:01 +00:00
David Shah
e1c74ad3db timing_opt: Fixes including single-move legality 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:53:01 +00:00
David Shah
b51308708b timing_opt: Debugging and integration 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:53:01 +00:00
David Shah
1b7214a18a timing_opt: Implement the BFS-based path optimisation 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:53:01 +00:00
David Shah
51a662d37e timing_opt: Implement critical path finder 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:53:01 +00:00
David Shah
cd9a65a84c timing_opt: Neigbour bel validity checking 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:53:01 +00:00
David Shah
2de506c071 timing_opt: Functions to calculate arc delay limits 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:53:01 +00:00
David Shah
83e3277577 timing_opt: Implement neighbour Bel finder 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:53:01 +00:00
David Shah
9a42b64a68 timing: Add criticality calculation to timing analysis 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:53:01 +00:00
David Shah
88e1e6bdf4 clangformat 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:52:46 +00:00
David Shah
2fef79c276
Merge pull request #164 from YosysHQ/carry_opt 
ice40: Carry chain optimisations
 2018-12-06 10:52:06 +00:00
David Shah
dbaabae235 ice40: Put debug logging behind ctx->debug 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-06 10:51:17 +00:00
Miodrag Milanovic
fdb632f24c Fix crash exiting nextpnr gui 2018-12-06 08:31:40 +01:00
Miodrag Milanovic
a6315833d3 Renamed LogLevel members, to prevent issue with system defines on Windows 2018-12-05 19:58:38 +01:00
Miodrag Milanović
697e2ed490
Merge pull request #165 from smunaut/build_pipe 
build: Make use of the pipe option to avoid temporary files
 2018-12-05 19:05:38 +01:00
Miodrag Milanović
6ae143685a
Merge pull request #166 from ajeakins/master 
Fix crash starting the GUI on macOS where we must request a core profile
 2018-12-05 19:04:36 +01:00
David Shah
d298687dc2 ice40: Fix carry chain splitting 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-05 10:12:23 +00:00
Adrian Jeakins
92ddef9fc3 Fix crash starting the GUI on macOS where we must request a core profile. 
See http://doc.qt.io/qt-5/qabstractopenglfunctions.html
 2018-12-04 23:05:06 +00:00
Sylvain Munaut
99e1b6db47 build: Make use of the pipe option to avoid temporary files 
This is really useful when building the ice40 with the gigantic .cc
files that generate multi gigabyte .s temporary files ... this way the
assembler just processed it in streaming way.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-12-04 20:20:50 +01:00
David Shah
51cda136b1 ice40: Don't split carry chain in simple feed-out cases 
Signed-off-by: David Shah <dave@ds0.me>
 2018-12-04 12:31:32 +00:00
David Shah
0c93b55650 ice40: Include I3 connectivity in chain 
Thanks @smunaut

Signed-off-by: David Shah <dave@ds0.me>
 2018-12-04 12:02:26 +00:00
David Shah
12aca1558f
Merge pull request #162 from whitequark/reset-fanout 
ice40: add reset global promotion threshold
 2018-12-04 10:14:12 +00:00
whitequark
7fad6058bd ice40: add reset global promotion threshold. 2018-12-04 07:40:55 +00:00
David Shah
6e728c9a9b
Merge pull request #160 from dmsc/sb_ledda_ip 
ice40: Add support for placing SB_LEDDA_IP block.
 2018-12-02 08:48:58 +00:00
Daniel Serpell
d4b3c1d819 ice40: Add support for placing SB_LEDDA_IP block. 
Signed-off-by: Daniel Serpell <daniel.serpell@gmail.com>
 2018-12-01 22:27:04 -03:00
David Shah
dc549cd56b
Merge pull request #159 from YosysHQ/ecp5_pllplace 
ecp5: Pre-place PLLs and use dedicated routes into globals
 2018-12-01 09:14:34 +00:00
David Shah
5ddf99cf5d ecp5: Pre-place PLLs and use dedicated routes into globals 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-30 16:09:56 +00:00
David Shah
58e9c6f32e
Merge pull request #158 from YosysHQ/improve_error 
Error reporting improvements
 2018-11-29 19:46:05 +00:00
David Shah
8af367ad0a ice40: Add a warning for unconstrained IO 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-29 19:35:19 +00:00
David Shah
90138fc120 rulecheck: Improve message printed at start 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-29 19:28:15 +00:00
David Shah
4e05d09397 Improve reporting of unknown cell types 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-29 19:26:23 +00:00
David Shah
dbc14ea76d json: Improve reporting of multiple drivers 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-29 19:20:51 +00:00
David Shah
fc08856537
Merge pull request #157 from whitequark/fanout-thresh 
ice40: raise CE global promotion threshold
 2018-11-29 09:12:47 +00:00
David Shah
3ff3b0f6b5
Merge pull request #156 from whitequark/fanout 
ice40: print fanout of nets promoted to globals
 2018-11-29 09:08:40 +00:00
whitequark
db96b88d79 ice40: raise CE global promotion threshold. 2018-11-29 00:12:48 +00:00
whitequark
a974124a7a ice40: print fanout of nets promoted to globals. 2018-11-28 23:52:48 +00:00
David Shah
0872b63b0b
Merge pull request #155 from smunaut/issue_151 
ice40: Update the way LVDS inputs are handled during bitstream generation
 2018-11-28 16:20:36 +00:00
David Shah
48071e3650
Merge pull request #154 from smunaut/issue_141 
ice40: Complete rework of the way PLLs are placed and validity checks
 2018-11-28 16:20:26 +00:00
Sylvain Munaut
ba958d1792 ice40: Try to be helpful and suggest using PAD PLL instead of CORE 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-28 16:04:58 +01:00
Sylvain Munaut
a65b12e8d6 ice40: Revamp the whole PLL placement/validity check logic 
We do a pre-pass on all the PLLs to place them before packing.

To place them:
 - First pass with all the PADs PLLs since those can only fit at one
   specific BEL depending on the input connection
 - Second pass with all the dual outputs CORE PLLs. Those can go
   anywhere where there is no conflicts with their A & B outputs and
   used IO pins
 - Third pass with the single output CORE PLLs. Those have the least
   constrains.

 During theses passes, we also check the validity of all their connections.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-28 16:04:43 +01:00
Sylvain Munaut
5f0f2b060b ice40: Update the way LVDS inputs are handled during bitstream generation 
* Instead of "patching" input_en, we completely separate config for
   normal and LVDS pair.
   - For normal pair, nothing changes
   - For LVDS pairs, the IE/REN bits are always set as if the input buffer
     are disabled. Then if input_en was set to 1 (i.e. the input is
     actually for something), then we set the IoCtrl.LVDS bit.
   - Also for LVDS, if input is used, pullups are forcibly disabled.

 * When scanning for unused IOs, never process those part of a LVDS pair.
   They will have been configured by the complement

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2018-11-28 16:04:23 +01:00
David Shah
7a2ef27d6c
Merge pull request #153 from YosysHQ/global-options 
ice40: Finer-grained control of global promotion
 2018-11-28 07:43:00 +00:00
David Shah
80f7ef4b4b ice40: Finer-grained control of global promotion 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-27 19:06:55 +00:00
David Shah
e99e2f1570
Merge pull request #152 from YosysHQ/compile_fix 
Fix compile on GCC 5.5 or older
 2018-11-27 18:32:24 +00:00
Miodrag Milanovic
0b5748a7af Fix compile on GCC 5.5 or older 2018-11-27 19:20:15 +01:00
David Shah
cdfd35e6aa
Merge pull request #150 from YosysHQ/err_warn_count 
Print warning and error count at end of execution
 2018-11-26 19:37:03 +00:00