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3,849 Commits 22 Branches 7 Tags 17 MiB
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30 Commits

Author SHA1 Message Date
Maciej Dudek
2de1ecfabe Update python-fpga-interchange to v0.0.20 
Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
 2021-09-23 17:52:47 +02:00
Alessandro Comodi
85cf6562b6 gh: interchange: bump python-interchange tag 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-08-31 11:54:22 +02:00
gatecat
f7be385230 mistral: Include mistral generated files in include dirs 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-08-15 15:13:31 +01:00
Maciej Dudek
9190bda27d [interchange] Update chipdb and python-fpga-interchange versions 
Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
 2021-07-14 17:19:30 +02:00
Alessandro Comodi
b64642fc99 interchange: bump python-interchange version 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-07-08 16:51:23 +02:00
gatecat
9df05c4f98 interchange: Bump versions 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-06-15 16:32:02 +01:00
Alessandro Comodi
af520f0f92 interchange: ci: update python-interchange tag 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-06-11 11:19:01 +02:00
gatecat
bcc5158eab ci: Bump mistral version 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-06-05 13:01:49 +01:00
gatecat
0426ba4e87 interchange: Add LIFCL-40 EVN tests 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-06-01 09:52:40 +01:00
gatecat
ba69b35501 interchange: Bump versions 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-27 11:21:34 +01:00
gatecat
ff48ad83be interchange: Bump versions 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-21 10:00:35 +01:00
Alessandro Comodi
9dce00a4e7 gh-actions: interchange: use commit sha as cache key 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-05-20 19:57:03 +02:00
gatecat
6cef569155 ci: Use GH only for Mistral and fpga-interchange 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-15 15:53:25 +01:00
gatecat
51949d95c3 interchange: Bump version 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-07 10:28:59 +01:00
gatecat
5225550b5b interchange: Bump versions 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-04-30 11:42:43 +01:00
gatecat
0e6955a08d interchange: Bump versions 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-04-20 10:42:33 +01:00
Alessandro Comodi
ea9e12b6ae gh-actions: increase python-fpga-interchange tag version 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-04-14 14:36:47 +02:00
gatecat
7acef00443 interchange: Pin prjoxide commit 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-04-09 11:17:25 +01:00
Keith Rothman
c43ad2fab6 Don't fail-fast for GH actions to allow for easier CI debugging. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-04-06 10:42:05 -07:00
Keith Rothman
3a85088d66 [interchange] Update interchange CI for new chipdb change. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2021-04-01 15:59:48 -07:00
gatecat
9259763599 ci: Build prjoxide only for LIFCL 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-30 16:55:03 +01:00
gatecat
ecfaae7f9e interchange: Add Nexus LUT test 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-30 16:31:51 +01:00
gatecat
b6b8959397 interchange: Add Nexus to CI 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-30 16:31:51 +01:00
Alessandro Comodi
d0bc033ab8 gh-actions: better yosys caching based on version 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-03-26 15:11:03 +01:00
Alessandro Comodi
b5ba3ee9ee interchange: add archcheck tests to all-device-test target 
This increases parallelism and should make the FPGA interchange CI
faster

Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-03-26 15:11:03 +01:00
Alessandro Comodi
c4cb86efe9 gh-actions: use ccache and build tools before running tests 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-03-25 16:24:52 +01:00
Alessandro Comodi
9f28fa4e75 gh-actions: interchange: multiple jobs, one for each device 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-03-24 15:37:03 +01:00
Alessandro Comodi
2956a0ca03 gh-actions: remove multi-process arch generation 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-03-23 20:36:23 +01:00
Alessandro Comodi
c1e668f823 fpga_interchange: address review comments 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-03-16 22:02:06 +01:00
Alessandro Comodi
c68dfb09c4 github-actions: add basic CI to test FPGA interchange 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2021-03-16 15:39:02 +01:00