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lofty/bett
Author | SHA1 | Date | |
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3e739fd5f9 | ||
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ff094becab | ||
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f47ec47143 |
@ -534,6 +534,15 @@ void Arch::update_alm_input_count(uint32_t lab, uint8_t alm)
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alm_data.unique_input_count = total_inputs;
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}
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const std::array<int, 6> tdmux_set = {
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0, // A
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1, // B
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0, // C
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1, // D
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2, // E
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3, // F
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};
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bool Arch::check_lab_input_count(uint32_t lab) const
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{
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// There are only 46 TD signals available to route signals from general routing to the ALM input. Currently, we
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@ -544,10 +553,75 @@ bool Arch::check_lab_input_count(uint32_t lab) const
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// currently perfunctory place and route algorithms to achieve satisfactory runtimes.
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int count = 0;
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auto &lab_data = labs.at(lab);
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for (int i = 0; i < 10; i++) {
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count += lab_data.alms.at(i).unique_input_count;
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pool<std::pair<IdString, int>> unique_inputs;
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for (int alm = 0; alm < 10; alm++) {
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// TODO: duplication with above
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auto &alm_data = labs.at(lab).alms.at(alm);
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// Get cells into an array for fast access
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std::array<const CellInfo *, 2> luts{getBoundBelCell(alm_data.lut_bels[0]), getBoundBelCell(alm_data.lut_bels[1])};
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std::array<const CellInfo *, 4> ffs{getBoundBelCell(alm_data.ff_bels[0]), getBoundBelCell(alm_data.ff_bels[1]),
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getBoundBelCell(alm_data.ff_bels[2]), getBoundBelCell(alm_data.ff_bels[3])};
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for (int i = 0; i < 2; i++) {
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if (!luts[i])
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continue;
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for (int j = 0; j < luts[i]->combInfo.lut_input_count; j++)
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if (luts[i]->combInfo.lut_in[j]) {
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// LD routing outputs
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const pool<int> ld_set_c = {1, 2, 4, 7};
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const pool<int> ld_inputs_a = {2, 3, 4, 5, 10, 13, 14};
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const pool<int> ld_inputs_b = {0, 1, 7, 9, 12, 18};
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const pool<int> ld_inputs_c = {6, 8, 11, 16, 17};
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const pool<int> ld_inputs_d = {15, 19};
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// could this be driven by LD?
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if (luts[i]->combInfo.lut_in[j]->driver.cell->bel.pos == alm_data.lut_bels[i].pos) {
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auto dst_lut = 2 * alm + i;
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auto& data = bel_data(luts[i]->combInfo.lut_in[j]->driver.cell->bel);
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auto& src_alm_data = labs.at(data.lab_data.lab).alms.at(data.lab_data.alm);
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bool ok = false;
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int src_lut = 2 * data.lab_data.alm;
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if (data.type == id_MISTRAL_MCOMB || data.type == id_MISTRAL_COMB) {
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src_lut += data.lab_data.idx;
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ok = true;
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}
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if (data.type == id_MISTRAL_FF && data.lab_data.idx & 1 == 1) {
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src_lut += (data.lab_data.idx - 1) / 2;
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ok = true;
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}
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if (ok && dst_lut & 1 == 0 && ld_inputs_a.count(src_lut))
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continue;
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if (ok && dst_lut & 1 == 1 && ld_inputs_b.count(src_lut))
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continue;
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if (ok && ld_set_c.count(dst_lut) && ld_inputs_c.count(src_lut))
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continue;
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if (ok && !ld_set_c.count(dst_lut) && ld_inputs_d.count(src_lut))
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continue;
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}
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unique_inputs.insert(std::make_pair(luts[i]->combInfo.lut_in[j]->name, tdmux_set.at(j)));
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}
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}
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for (int i = 0; i < 4; i++) {
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const CellInfo *ff = ffs[i];
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if (!ff)
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continue;
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if (ff->ffInfo.sdata) {
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unique_inputs.insert(std::make_pair(ff->ffInfo.sdata->name, tdmux_set.at(4)));
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unique_inputs.insert(std::make_pair(ff->ffInfo.sdata->name, tdmux_set.at(5)));
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}
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// FF input doesn't consume routing resources if driven by associated LUT
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if (ff->ffInfo.datain && (!luts[i / 2] || ff->ffInfo.datain != luts[i / 2]->combInfo.comb_out)) {
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unique_inputs.insert(std::make_pair(ff->ffInfo.datain->name, tdmux_set.at(4)));
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unique_inputs.insert(std::make_pair(ff->ffInfo.datain->name, tdmux_set.at(5)));
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}
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}
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}
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return (count <= 42);
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return (unique_inputs.size() <= 42);
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}
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bool Arch::check_mlab_groups(uint32_t lab) const
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@ -690,12 +764,18 @@ bool Arch::is_lab_ctrlset_legal(uint32_t lab) const
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void Arch::lab_pre_route()
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{
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log_info("Preparing LABs for routing...\n");
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int labs_used = 0;
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for (uint32_t lab = 0; lab < labs.size(); lab++) {
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bool lab_used = false;
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assign_control_sets(lab);
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for (uint8_t alm = 0; alm < 10; alm++) {
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reassign_alm_inputs(lab, alm);
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lab_used |= labs.at(lab).alms.at(alm).unique_input_count > 0;
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}
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if (lab_used)
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labs_used++;
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}
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log_info(" %d LABs used\n", labs_used);
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}
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void Arch::assign_control_sets(uint32_t lab)
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