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nextpnr-0.1

nextpnr-0.2

nextpnr-0.3

nextpnr-0.4

nextpnr-0.5

nextpnr-0.6

nextpnr-0.7

Mono Color

• a965b91321 Enable -Wall David Shah 2018-06-18 11:45:54 +0200
• fc7490370b Improving code style and fixing dummy David Shah 2018-06-18 11:43:59 +0200
• b728cb71d1 Improve router log output Clifford Wolf 2018-06-17 19:43:07 +0200
• 0b2345996d Updates from clangformat Clifford Wolf 2018-06-17 19:28:03 +0200
• 3cfd6841dc Improve router log messages Clifford Wolf 2018-06-17 19:27:48 +0200
• 8e8838c8a7 Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into chipdbng Clifford Wolf 2018-06-17 18:22:39 +0200
• acfef6971e Refactore ice40 chipdb to use a super-large C-string as output format Clifford Wolf 2018-06-17 18:15:41 +0200
• 0af9156d7a Minor chipdb.py improvement Clifford Wolf 2018-06-17 16:28:05 +0200
• 2f9810a346 Speed up placer David Shah 2018-06-17 16:18:59 +0200
• 4fe8ba5e9a Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into chipdbng Clifford Wolf 2018-06-17 16:14:58 +0200
• 105cde328b Updates from clangformat Clifford Wolf 2018-06-17 16:14:27 +0200
• 19b665177e Move top-level ChipInfoPOD into ice40 chipdb blob Clifford Wolf 2018-06-17 16:12:52 +0200
• f66999a883 Minor performance tweaks and fixes David Shah 2018-06-17 16:03:16 +0200
• 6f4af8387e Move PackageInfoPOD to ice40 chipdb blob Clifford Wolf 2018-06-17 15:53:17 +0200
• 5d46ff54ba Move TileType array to ice40 chipdb blob Clifford Wolf 2018-06-17 15:46:39 +0200
• f38c5660cb Move BitstreamInfoPOD to ice40 chipdb blob Clifford Wolf 2018-06-17 15:39:19 +0200
• a4ad3533fe Move IerenInfoPOD to ice40 chipdb blob Clifford Wolf 2018-06-17 15:25:58 +0200
• f723aaa373 ice40: Fixing negative clock bitstream generation David Shah 2018-06-17 15:21:35 +0200
• 246fe999dd Move TileInfoPOD to chipdb blob Clifford Wolf 2018-06-17 15:15:49 +0200
• 1f9c28ba58 Move SwitchInfoPOD to chipdb blob Clifford Wolf 2018-06-17 15:05:17 +0200
• 748171dae2 place_sa: Adding seed option David Shah 2018-06-17 15:04:53 +0200
• a3e0842299 Move PipInfoPOD into ChipDB binary blob Clifford Wolf 2018-06-17 14:46:10 +0200
• 681c9654d7 place_sa: Add a rip-up feature when initial placement fails David Shah 2018-06-17 14:36:19 +0200
• c0a2f0b89f Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into chipdbng Clifford Wolf 2018-06-17 14:31:43 +0200
• 3b5c33d685 Move WireInfoPOD into ChipDB binary blob Clifford Wolf 2018-06-17 14:30:26 +0200
• 84defd3fee Minor refactoring of BinaryBlobAssembler, fix alignments Clifford Wolf 2018-06-17 13:32:38 +0200
• 153b800f6a place_sa: Make placement independant of unordered_map ordering David Shah 2018-06-17 13:24:42 +0200
• 1b077320dc General reformatting David Shah 2018-06-17 12:53:39 +0200
• 459a7a0b82 frontend/json: Look up netnames properly instead of using number David Shah 2018-06-17 12:53:29 +0200
• 12818fb694 ice40: Add symbol output to bitstream generation David Shah 2018-06-17 12:38:21 +0200
• 6a937e0b45 Updating copyrights David Shah 2018-06-17 11:49:57 +0200
• 3afce5ff5a Improving the placer output David Shah 2018-06-17 11:45:41 +0200
• c604426341 place_sa: Ignore Bels locked by manual placement for SA swaps David Shah 2018-06-17 11:33:31 +0200
• f9bfccf68e Add 'get or default' functions David Shah 2018-06-17 11:14:49 +0200
• e95f38e88e place_sa: Run a validity check at the end of placement David Shah 2018-06-17 10:55:19 +0200
• 8ab0b06f5f ice40: Fixing build David Shah 2018-06-17 10:35:37 +0200
• 69e5bc5030 Progress with chipdb refactoring Clifford Wolf 2018-06-16 19:25:37 +0200
• 0df9a11b1f Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr David Shah 2018-06-16 18:45:56 +0200
• e497575c8e place: Fix placer validity checks David Shah 2018-06-16 18:45:32 +0200
• ee06db3293 Progress with chipdb refactoring Clifford Wolf 2018-06-16 18:42:29 +0200
• 218c4cd740 Renamed place.h to place_sa.h in place_sa.cc ZipCPU 2018-06-16 12:09:51 -0400
• 41156d188e Changed place.h place_sa.h ZipCPU 2018-06-16 12:03:25 -0400
• 6d68af1e62 Renamed placer to Simulated-Annealing placer ZipCPU 2018-06-16 11:59:42 -0400
• f0edb625e3 Progress with chipdb refactoring Clifford Wolf 2018-06-16 17:53:09 +0200
• 1e6124309f ice40: Proper global promotion David Shah 2018-06-16 17:44:35 +0200
• bb92dc09a8 ice40: Promote reset signal David Shah 2018-06-16 17:09:41 +0200
• c4241db117 Tweaking placer and router David Shah 2018-06-16 16:54:57 +0200
• ad0df6cea8 Update placer for new Chip API Clifford Wolf 2018-06-16 15:38:26 +0200
• fe47e7fc2d Update clangformat Clifford Wolf 2018-06-16 15:25:33 +0200
• 4d14bc2914 Merge remote-tracking branch 'origin/master' into chipdbng Clifford Wolf 2018-06-16 15:25:03 +0200
• 6acf23cf37 Some refactoring of Chip API (prep for chipdb refactoring) Clifford Wolf 2018-06-16 15:23:04 +0200
• ef2164708b router: Fixing loop issue David Shah 2018-06-16 14:49:38 +0200
• ebad1fee65 Merge branch 'simann' David Shah 2018-06-16 14:44:43 +0200
• 7ff1b7e02f ice40: Fix RAM config in packer David Shah 2018-06-16 14:42:00 +0200
• f079e0d204 ice40: Fix BRAM initialisation David Shah 2018-06-16 12:17:36 +0200
• c0a2627179 place: Tidying up the SA placer David Shah 2018-06-16 12:04:38 +0200
• c9a784ec0c ice40: Include RAM init data in bitstream David Shah 2018-06-16 11:17:17 +0200
• 04f1d7516a ice40: Fix bitstream generation when parameters are unspecified David Shah 2018-06-15 22:08:30 +0200
• 71903e29d4 place: Reformat placer David Shah 2018-06-15 21:29:32 +0200
• 23b1fc02fb ice40: Bitstream generation for RAM David Shah 2018-06-15 21:29:15 +0200
• cabdfe3616 ice40: Only place IO at valid pins David Shah 2018-06-15 21:29:02 +0200
• 2479b4ecbf Improve placement heuristic David Shah 2018-06-15 21:16:53 +0200
• 579455d1b0 Fix router for routing to the same dest wire twice Clifford Wolf 2018-06-15 20:54:57 +0200
• 432fe52274 Remove dead code David Shah 2018-06-15 20:00:11 +0200
• 47566cf5e9 Improving SA placer performance David Shah 2018-06-15 18:26:31 +0200
• 2d993d8ee9 Very slow SA placer based on arachne-pnr David Shah 2018-06-15 13:42:21 +0200
• e7d6c4038d Create all without ui file, enables more control Miodrag Milanovic 2018-06-15 12:22:44 +0200
• b569d76996 Propagate signals Miodrag Milanovic 2018-06-15 11:10:11 +0200
• 32dcf6b3fe Experimenting with more unplacing David Shah 2018-06-15 10:14:12 +0200
• 104c2dad9b Adding randomness and changes metrics to placer David Shah 2018-06-15 09:27:02 +0200
• 828c96f80b Updating placer David Shah 2018-06-14 20:25:35 +0200
• 2f01ec5157 Update basic placer to use new API David Shah 2018-06-14 15:21:00 +0200
• 3ef45d2a27 Another heuristic experiment David Shah 2018-06-13 19:10:12 +0200
• b1e08fa064 Playing about with placement heuristics David Shah 2018-06-13 18:53:58 +0200
• 6b74d326d4 experiment: Simple heuristic-based placer David Shah 2018-06-13 17:07:42 +0200
• 5d343a168b Fix router for routing to the same dest wire twice Clifford Wolf 2018-06-15 20:54:57 +0200
• 3c6f1548d6 Create all without ui file, enables more control Miodrag Milanovic 2018-06-15 12:22:44 +0200
• fe4d56a45a Propagate signals Miodrag Milanovic 2018-06-15 11:10:11 +0200
• 355d33632c ice40: Another arch_place fix David Shah 2018-06-14 21:52:01 +0200
• 66ea22bb5c ice40: General fixes David Shah 2018-06-14 21:12:15 +0200
• 323a2aaa54 ice40: Read cells in arachne placement script David Shah 2018-06-14 20:55:39 +0200
• 0f0d9bfb00 ice40: Importer for placed ice40 designs from arachne David Shah 2018-06-14 20:46:05 +0200
• ff074e4b4c Added back some size limits for UI Miodrag Milanovic 2018-06-14 20:24:05 +0200
• 1336eb0630 Split design widget on side Miodrag Milanovic 2018-06-14 20:03:59 +0200
• 4a734d6cc7 separate clearProperties Miodrag Milanovic 2018-06-14 18:58:37 +0200
• 064dc13f3d Cleanup Miodrag Milanovic 2018-06-14 18:53:48 +0200
• 4e82ed46d2 Split to classes Miodrag Milanovic 2018-06-14 18:53:32 +0200
• 9c0640240f Split per widgets Miodrag Milanovic 2018-06-14 18:37:57 +0200
• 8c46cc2fce Add output of estimated total wire delay to router (as metric for placement quality) Clifford Wolf 2018-06-14 19:13:14 +0200
• 66ced800d7 Increase ripup penalties over time Clifford Wolf 2018-06-14 15:45:47 +0200
• 312699e590 Add route-ripup routing loop Clifford Wolf 2018-06-14 15:09:13 +0200
• 7787ce5fd9 Refactor position/delay estimation API Clifford Wolf 2018-06-14 12:43:00 +0200
• b1cbae1293 python: Clear SIGINT handler after Python loads David Shah 2018-06-14 10:08:54 +0200
• c94b8c4861 Drastically reduce number of linker symbols in chipdb Clifford Wolf 2018-06-13 23:55:18 +0200
• 342290d6bd Cleanup and preps for further ui work Miodrag Milanovic 2018-06-13 21:27:49 +0200
• 68c6239cdc Make custom types for elements in tree view Miodrag Milanovic 2018-06-13 20:57:07 +0200
• 9b3af68e44 Improve router error reporting Clifford Wolf 2018-06-13 18:28:02 +0200
• 537b0e6e94 ice40: Rename ICESTORM_RAM pins David Shah 2018-06-13 18:18:57 +0200
• 3d5954f997 Improve router error messages Clifford Wolf 2018-06-13 18:10:09 +0200
• 794fc6df60 Add support for CellInfo->pins in router Clifford Wolf 2018-06-13 17:52:18 +0200