
Add processing IO located on the sides of some chips. These are IOBUF, which are converted into IBUF and OBUF not by fuses, but by signaling to OE. Also added the creation of a Global Set / Reset for all chips, instead of a list of tile types, information from the apicula database is used, and minor fixes. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
229 lines
7.8 KiB
C++
229 lines
7.8 KiB
C++
/*
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* nextpnr -- Next Generation Place and Route
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*
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* Copyright (C) 2021 gatecat <gatecat@ds0.me>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include "log.h"
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#include "nextpnr.h"
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#include "util.h"
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#include <queue>
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#define HIMBAECHEL_CONSTIDS "uarch/gowin/constids.inc"
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#include "himbaechel_constids.h"
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#include "himbaechel_helpers.h"
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#include "globals.h"
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#include "gowin.h"
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#include "gowin_utils.h"
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NEXTPNR_NAMESPACE_BEGIN
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struct GowinGlobalRouter
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{
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Context *ctx;
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GowinUtils gwu;
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GowinGlobalRouter(Context *ctx) : ctx(ctx) { gwu.init(ctx); };
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// allow io->global, global->global and global->tile clock
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bool global_pip_filter(PipId pip) const
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{
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auto is_local = [&](IdString wire_type) {
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return !wire_type.in(id_GLOBAL_CLK, id_IO_O, id_IO_I, id_PLL_O, id_PLL_I, id_TILE_CLK);
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};
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IdString src_type = ctx->getWireType(ctx->getPipSrcWire(pip));
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IdString dst_type = ctx->getWireType(ctx->getPipDstWire(pip));
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bool src_valid = src_type.in(id_GLOBAL_CLK, id_IO_O, id_PLL_O);
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bool dst_valid = dst_type.in(id_GLOBAL_CLK, id_TILE_CLK, id_PLL_I, id_IO_I);
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if (ctx->debug && false) {
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log_info("%s <- %s [%s <- %s]\n", ctx->getWireName(ctx->getPipDstWire(pip)).str(ctx).c_str(),
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ctx->getWireName(ctx->getPipSrcWire(pip)).str(ctx).c_str(), dst_type.c_str(ctx),
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src_type.c_str(ctx));
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}
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return (src_valid && dst_valid) || (src_valid && is_local(dst_type)) || (is_local(src_type) && dst_valid);
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}
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bool is_relaxed_sink(const PortRef &sink) const { return false; }
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// Dedicated backwards BFS routing for global networks
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template <typename Tfilt>
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bool backwards_bfs_route(NetInfo *net, store_index<PortRef> user_idx, int iter_limit, bool strict, Tfilt pip_filter)
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{
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// Queue of wires to visit
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std::queue<WireId> visit;
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// Wire -> upstream pip
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dict<WireId, PipId> backtrace;
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// Lookup source and destination wires
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WireId src = ctx->getNetinfoSourceWire(net);
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WireId dst = ctx->getNetinfoSinkWire(net, net->users.at(user_idx), 0);
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if (src == WireId())
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log_error("Net '%s' has an invalid source port %s.%s\n", ctx->nameOf(net), ctx->nameOf(net->driver.cell),
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ctx->nameOf(net->driver.port));
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if (dst == WireId())
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log_error("Net '%s' has an invalid sink port %s.%s\n", ctx->nameOf(net),
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ctx->nameOf(net->users.at(user_idx).cell), ctx->nameOf(net->users.at(user_idx).port));
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if (ctx->getBoundWireNet(src) != net)
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ctx->bindWire(src, net, STRENGTH_LOCKED);
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if (src == dst) {
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// Nothing more to do
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return true;
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}
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visit.push(dst);
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backtrace[dst] = PipId();
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int iter = 0;
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while (!visit.empty() && (iter++ < iter_limit)) {
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WireId cursor = visit.front();
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visit.pop();
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// Search uphill pips
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for (PipId pip : ctx->getPipsUphill(cursor)) {
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// Skip pip if unavailable, and not because it's already used for this net
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if (!ctx->checkPipAvail(pip) && ctx->getBoundPipNet(pip) != net)
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continue;
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WireId prev = ctx->getPipSrcWire(pip);
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// Ditto for the upstream wire
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if (!ctx->checkWireAvail(prev) && ctx->getBoundWireNet(prev) != net)
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continue;
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// Skip already visited wires
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if (backtrace.count(prev))
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continue;
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// Apply our custom pip filter
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if (!pip_filter(pip))
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continue;
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// Add to the queue
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visit.push(prev);
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backtrace[prev] = pip;
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// Check if we are done yet
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if (prev == src)
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goto done;
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}
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if (false) {
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done:
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break;
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}
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}
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if (backtrace.count(src)) {
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WireId cursor = src;
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std::vector<PipId> pips;
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// Create a list of pips on the routed path
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while (true) {
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PipId pip = backtrace.at(cursor);
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if (pip == PipId())
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break;
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pips.push_back(pip);
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cursor = ctx->getPipDstWire(pip);
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}
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// Reverse that list
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std::reverse(pips.begin(), pips.end());
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// Bind pips until we hit already-bound routing
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for (PipId pip : pips) {
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WireId dst = ctx->getPipDstWire(pip);
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if (ctx->getBoundWireNet(dst) == net)
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break;
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ctx->bindPip(pip, net, STRENGTH_LOCKED);
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}
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return true;
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} else {
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if (strict)
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log_error("Failed to route net '%s' from %s to %s using dedicated routing.\n", ctx->nameOf(net),
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ctx->nameOfWire(src), ctx->nameOfWire(dst));
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return false;
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}
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}
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void route_clk_net(NetInfo *net)
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{
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bool routed = false;
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for (auto usr : net->users.enumerate()) {
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routed = backwards_bfs_route(net, usr.index, 1000000, true, [&](PipId pip) {
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return (is_relaxed_sink(usr.value) || global_pip_filter(pip));
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});
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if (!routed) {
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break;
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}
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}
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if (routed) {
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log_info(" routed net '%s' using global resources\n", ctx->nameOf(net));
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}
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}
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bool driver_is_clksrc(const PortRef &driver)
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{
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// dedicated pins
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if (CellTypePort(driver) == CellTypePort(id_IBUF, id_O)) {
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NPNR_ASSERT(driver.cell->bel != BelId());
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IdStringList pin_func = gwu.get_pin_funcs(driver.cell->bel);
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for (size_t i = 0; i < pin_func.size(); ++i) {
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if (pin_func[i].str(ctx).rfind("GCLKT", 0) == 0) {
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if (ctx->debug) {
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log_info("Clock pin:%s:%s\n", ctx->getBelName(driver.cell->bel).str(ctx).c_str(),
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pin_func[i].c_str(ctx));
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}
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return true;
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}
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}
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}
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// PLL outputs
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if (driver.cell->type.in(id_rPLL, id_PLLVR)) {
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if (driver.port.in(id_CLKOUT, id_CLKOUTD, id_CLKOUTD3, id_CLKOUTP)) {
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if (ctx->debug) {
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log_info("PLL out:%s:%s\n", ctx->getBelName(driver.cell->bel).str(ctx).c_str(),
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driver.port.c_str(ctx));
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}
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return true;
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}
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}
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return false;
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}
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void run(void)
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{
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log_info("Routing globals...\n");
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for (auto &net : ctx->nets) {
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NetInfo *ni = net.second.get();
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CellInfo *drv = ni->driver.cell;
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if (drv == nullptr)
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continue;
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if (driver_is_clksrc(ni->driver)) {
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route_clk_net(ni);
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continue;
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}
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}
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}
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};
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void gowin_route_globals(Context *ctx)
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{
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GowinGlobalRouter router(ctx);
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router.run();
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}
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NEXTPNR_NAMESPACE_END
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