Adrien Prost-Boucle 147da552ca Himbaechel xilinx : More cascaded input ports for which routing is skipped		2024-09-13 15:22:25 +02:00
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example	Make example more like other arch	2024-04-05 12:25:52 +02:00
gowin	Gowin. BUGFIX. Create all Clock Pips. (#1358)	2024-09-05 21:39:26 +01:00
xilinx	Himbaechel xilinx : More cascaded input ports for which routing is skipped	2024-09-13 15:22:25 +02:00