7dd4a8c1d5
As the board on the GW1N-1 chip becomes a rarity, its replacement is the Tangnano1k board with the GW1NZ-1 chip. This chip has a unique mechanism for turning off power to important things such as OSC, PLL, etc. Here we introduce a primitive that allows energy saving to be controlled dynamically. We also bring the names of some functions to uniformity. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
100 lines
3.6 KiB
C++
100 lines
3.6 KiB
C++
#ifndef GOWIN_UTILS_H
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#define GOWIN_UTILS_H
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#include "idstringlist.h"
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#include "nextpnr_namespaces.h"
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#include "nextpnr_types.h"
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NEXTPNR_NAMESPACE_BEGIN
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namespace BelFlags {
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static constexpr uint32_t FLAG_SIMPLE_IO = 0x100;
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}
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struct GowinUtils
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{
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Context *ctx;
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GowinUtils() {}
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void init(Context *ctx) { this->ctx = ctx; }
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// tile
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IdString get_tile_class(int x, int y);
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Loc get_tile_io16_offs(int x, int y);
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// pin functions: GCLKT_4, SSPI_CS, READY etc
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IdStringList get_pin_funcs(BelId io_bel);
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// PLL pads (type - CLKIN, FeedBack, etc)
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BelId get_pll_bel(BelId io_bel, IdString type);
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// Bels and pips
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bool is_simple_io_bel(BelId bel);
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Loc get_pair_iologic_bel(Loc loc);
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BelId get_io_bel_from_iologic(BelId bel);
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// BSRAM
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bool has_SP32(void);
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bool need_SP_fix(void);
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bool need_BSRAM_OUTREG_fix(void);
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bool need_BLKSEL_fix(void);
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// Power saving
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bool has_BANDGAP(void);
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// DSP
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inline int get_dsp_18_z(int z) const { return z & (~3); }
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inline int get_dsp_9_idx(int z) const { return z & 3; }
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inline int get_dsp_18_idx(int z) const { return z & 4; }
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inline int get_dsp_paired_9(int z) const { return (3 - get_dsp_9_idx(z)) | (z & (~3)); }
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inline int get_dsp_mult_from_padd(int padd_z) const { return padd_z + 8; }
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inline int get_dsp_padd_from_mult(int mult_z) const { return mult_z - 8; }
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inline int get_dsp_next_macro(int z) const { return z + 32; }
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inline int get_dsp(int z) const { return BelZ::DSP_Z; }
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inline int get_dsp_macro(int z) const { return (z & 0x20) + BelZ::DSP_0_Z; }
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inline int get_dsp_macro_num(int z) const { return (z & 0x20) >> 5; }
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Loc get_dsp_next_9_in_chain(Loc from) const;
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Loc get_dsp_next_macro_in_chain(Loc from) const;
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Loc get_dsp_next_in_chain(Loc from, IdString dsp_type) const;
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// check bus.
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// This is necessary to find the head in the DSP chain - these buses are
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// not switched in the hardware, but in software you can leave them
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// unconnected or connect them to VCC or VSS, which is the same - as I
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// already said, they are hard-wired and we are only discovering the fact
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// that they are not connected to another DSP in the chain.
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CellInfo *dsp_bus_src(const CellInfo *ci, const char *bus_prefix, int wire_num) const;
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CellInfo *dsp_bus_dst(const CellInfo *ci, const char *bus_prefix, int wire_num) const;
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bool is_diff_io_supported(IdString type);
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bool has_bottom_io_cnds(void);
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IdString get_bottom_io_wire_a_net(int8_t condition);
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IdString get_bottom_io_wire_b_net(int8_t condition);
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// wires
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inline bool is_wire_type_default(IdString wire_type) { return wire_type == IdString(); }
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// If wire is an important part of the global network (like SPINExx)
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inline bool is_global_wire(WireId wire) const
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{
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return ctx->getWireName(wire)[1].in(
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id_SPINE0, id_SPINE1, id_SPINE2, id_SPINE3, id_SPINE4, id_SPINE5, id_SPINE6, id_SPINE7, id_SPINE8,
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id_SPINE9, id_SPINE10, id_SPINE11, id_SPINE12, id_SPINE13, id_SPINE14, id_SPINE15, id_SPINE16,
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id_SPINE17, id_SPINE18, id_SPINE19, id_SPINE20, id_SPINE21, id_SPINE22, id_SPINE23, id_SPINE24,
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id_SPINE25, id_SPINE26, id_SPINE27, id_SPINE28, id_SPINE29, id_SPINE30, id_SPINE31);
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}
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// pips
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inline bool is_global_pip(PipId pip) const
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{
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return is_global_wire(ctx->getPipSrcWire(pip)) || is_global_wire(ctx->getPipDstWire(pip));
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}
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// make cell but do not include it in the list of chip cells.
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std::unique_ptr<CellInfo> create_cell(IdString name, IdString type);
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};
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NEXTPNR_NAMESPACE_END
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#endif
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