
Refactor in order to detect networks that will be routed in a special mode earlier. This makes it possible to mark the source of such networks as a global buffer, thereby removing their influence on element placement. In addition, timing classes are set for some cells. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
92 lines
2.7 KiB
C++
92 lines
2.7 KiB
C++
/*
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* nextpnr -- Next Generation Place and Route
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*
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* Copyright (C) 2018 gatecat <gatecat@ds0.me>
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* Copyright (C) 2022 YRabbit <rabbit@yrabbit.cyou>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#ifndef GOWIN_GLOBALS_H
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#define GOWIN_GLOBALS_H
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#include "nextpnr.h"
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NEXTPNR_NAMESPACE_BEGIN
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class GowinGlobalRouter
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{
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public:
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GowinGlobalRouter() {}
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private:
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// wire -> clock#
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dict<WireId, int> used_wires;
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// ordered nets
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struct globalnet_t
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{
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IdString name;
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int clock_ports;
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BelId clock_io_bel;
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WireId clock_io_wire; // IO wire if there is one
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int clock; // clock #
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globalnet_t()
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{
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name = IdString();
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clock_ports = 0;
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clock_io_bel = BelId();
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clock_io_wire = WireId();
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clock = -1;
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}
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globalnet_t(IdString _name)
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{
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name = _name;
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clock_ports = 0;
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clock_io_bel = BelId();
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clock_io_wire = WireId();
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clock = -1;
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}
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// sort
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bool operator<(const globalnet_t &other) const
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{
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if ((clock_io_wire != WireId()) ^ (other.clock_io_wire != WireId())) {
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return !(clock_io_wire != WireId());
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}
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return clock_ports < other.clock_ports;
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}
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// search
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bool operator==(const globalnet_t &other) const { return name == other.name; }
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};
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// discovered nets
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std::vector<globalnet_t> nets;
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bool is_clock_port(PortRef const &user);
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std::pair<WireId, BelId> clock_io(Context *ctx, PortRef const &driver);
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void gather_clock_nets(Context *ctx, std::vector<globalnet_t> &clock_nets);
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IdString route_to_non_clock_port(Context *ctx, WireId const dstWire, int clock, pool<IdString> &used_pips,
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pool<IdString> &undo_wires);
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void route_net(Context *ctx, globalnet_t const &net);
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public:
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void mark_globals(Context *ctx);
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void route_globals(Context *ctx);
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};
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NEXTPNR_NAMESPACE_END
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#endif // GOWIN_GLOBALS_H
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