2e8280a949
It seems that the internal registers on the BSRAM output pins in READ_MODE=1'b1 (pipeline) mode do not function properly because in the images generated by Gowin IDE an external register is added to each pin, and the BSRAM itself switches to READ_MODE=1'b0 (bypass) mode . This is observed on Tangnano9k and Tangnano20k boards. Here we repeat this fix. Signed-off-by: YRabbit <rabbit@yrabbit.cyou> |
||
|---|---|---|
| .. | ||
| example | ||
| gowin | ||
| xilinx | ||