130 lines
4.3 KiB
C++
130 lines
4.3 KiB
C++
/*
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* nextpnr -- Next Generation Place and Route
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*
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* Copyright (C) 2021 Symbiflow Authors
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*
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#ifndef NEXTPNR_H
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#error Include "dedicated_interconnect.h" via "nextpnr.h" only.
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#endif
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NEXTPNR_NAMESPACE_BEGIN
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struct TileTypeBelPin {
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int32_t tile_type;
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int32_t bel_index;
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IdString bel_pin;
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bool operator < (const TileTypeBelPin &other) const {
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if(tile_type >= other.tile_type) {
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return false;
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}
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if(bel_index >= other.bel_index) {
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return false;
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}
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return bel_pin < other.bel_pin;
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}
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bool operator ==(const TileTypeBelPin &other) const {
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return tile_type == other.tile_type && bel_index == other.bel_index && bel_pin == other.bel_pin;
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}
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bool operator !=(const TileTypeBelPin &other) const {
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return tile_type != other.tile_type || bel_index != other.bel_index || bel_pin != other.bel_pin;
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}
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};
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struct DeltaTileTypeBelPin {
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int32_t delta_x;
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int32_t delta_y;
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TileTypeBelPin type_bel_pin;
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bool operator ==(const DeltaTileTypeBelPin &other) const {
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return delta_x == other.delta_x && delta_y == other.delta_y && type_bel_pin == other.type_bel_pin;
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}
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bool operator !=(const DeltaTileTypeBelPin &other) const {
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return delta_x != other.delta_x || delta_y != other.delta_y || type_bel_pin != other.type_bel_pin;
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}
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};
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NEXTPNR_NAMESPACE_END
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template <> struct std::hash<NEXTPNR_NAMESPACE_PREFIX TileTypeBelPin>
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{
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std::size_t operator()(const NEXTPNR_NAMESPACE_PREFIX TileTypeBelPin &type_bel_pin) const noexcept
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{
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std::size_t seed = 0;
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boost::hash_combine(seed, std::hash<int32_t>()(type_bel_pin.tile_type));
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boost::hash_combine(seed, std::hash<int32_t>()(type_bel_pin.bel_index));
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boost::hash_combine(seed, std::hash<NEXTPNR_NAMESPACE_PREFIX IdString>()(type_bel_pin.bel_pin));
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return seed;
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}
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};
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template <> struct std::hash<NEXTPNR_NAMESPACE_PREFIX DeltaTileTypeBelPin>
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{
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std::size_t operator()(const NEXTPNR_NAMESPACE_PREFIX DeltaTileTypeBelPin &delta_bel_pin) const noexcept
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{
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std::size_t seed = 0;
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boost::hash_combine(seed, std::hash<int32_t>()(delta_bel_pin.delta_x));
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boost::hash_combine(seed, std::hash<int32_t>()(delta_bel_pin.delta_y));
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boost::hash_combine(seed, std::hash<NEXTPNR_NAMESPACE_PREFIX TileTypeBelPin>()(delta_bel_pin.type_bel_pin));
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return seed;
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}
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};
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NEXTPNR_NAMESPACE_BEGIN
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struct Context;
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// This class models dedicated interconnect present in the given fabric.
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//
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// Examples of dedicate interconnect:
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// - IBUF.O -> ISERDES.I
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// - IBUF.O -> IDELAY.I
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// - CARRY4.CO[3] -> CARRY4.CIN
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//
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// Note that CARRY4.CYINIT does not **require** dedicated interconnect, so
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// it doesn't qualify.
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//
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// This class discovers dedicated interconnect by examing the routing graph.
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// This discovery make be expensive, and require caching to accelerate
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// startup.
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struct DedicatedInterconnect {
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const Context *ctx;
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std::unordered_map<TileTypeBelPin, std::unordered_set<DeltaTileTypeBelPin>> pins_with_dedicate_interconnect;
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void init(const Context *ctx);
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// Is this BEL placed in a location that is valid based on dedicated
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// interconnect?
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//
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// Note: Only BEL pin sinks are checked.
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bool isBelLocationValid(BelId bel, const CellInfo* cell) const;
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void find_dedicated_interconnect();
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void print_dedicated_interconnect() const;
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bool check_routing(
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BelId src_bel, IdString src_bel_pin,
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BelId dst_bel, IdString dst_bel_pin) const;
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void expand_bel(BelId bel, IdString pin, WireId wire);
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};
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NEXTPNR_NAMESPACE_END
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