YRabbit 3d350c21c5 Gowin. BUGFIX. Global clock routing. (#1410) ... Adds additional restrictions on the first PIP after the clock source - only connections to SPINEs are allowed. This allowed to correct the behaviour of DQCEs since the latter can only disable/enable SPINEs. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>		2024-12-31 10:31:03 +01:00
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CMakeLists.txt	gowin: Himbaechel. Add GW1NZ-1 BSRAM.	2023-11-26 13:08:09 +01:00
constids.inc	Gowin. Add IODELAY. (#1398)	2024-11-30 09:24:59 +01:00
cst.cc	apicula: add support for magic sip pins (#1370)	2024-10-09 15:16:36 +02:00
cst.h	gowin: Himbaechel. Add constraint file processing.	2023-08-31 08:28:09 +02:00
globals.cc	Gowin. BUGFIX. Global clock routing. (#1410)	2024-12-31 10:31:03 +01:00
globals.h	gowin: Himbaechel. Add a clock router.	2023-08-31 08:28:09 +02:00
gowin_arch_gen.py	Gowin. Add Input Edge Monitor (#1396)	2024-11-27 09:57:34 +01:00
gowin_utils.cc	Gowin. FFs placement. (#1386)	2024-10-22 12:49:44 +02:00
gowin_utils.h	Gowin. FFs placement. (#1386)	2024-10-22 12:49:44 +02:00
gowin.cc	Gowin. Add IODELAY. (#1398)	2024-11-30 09:24:59 +01:00
gowin.h	Gowin. Add IODELAY. (#1398)	2024-11-30 09:24:59 +01:00
pack.cc	Gowin. Add IODELAY. (#1398)	2024-11-30 09:24:59 +01:00
pack.h	gowin: Himbaechel. Add ALU.	2023-08-31 08:28:09 +02:00