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4981ebb698
nextpnr/himbaechel/uarch/gowin
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YRabbit 4981ebb698 gowin: Himbaechel. Improve the global router 
A small improvement - do not waste time analyzing already processed
networks in the previous step (and possibly steps).

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2024-03-13 14:22:11 +01:00
..
CMakeLists.txt gowin: Himbaechel. Add GW1NZ-1 BSRAM. 2023-11-26 13:08:09 +01:00
constids.inc gowin: Himbaechel. Deal with SP BSRAM ports. 2024-01-23 14:00:29 +01:00
cst.cc gowin: Himbaechel. Extend clock router 2023-09-08 09:15:35 +02:00
cst.h gowin: Himbaechel. Add constraint file processing. 2023-08-31 08:28:09 +02:00
globals.cc gowin: Himbaechel. Improve the global router 2024-03-13 14:22:11 +01:00
globals.h gowin: Himbaechel. Add a clock router. 2023-08-31 08:28:09 +02:00
gowin_arch_gen.py gowin: Himbaechel. Add BSRAM for all chips. 2023-11-26 13:08:09 +01:00
gowin_utils.cc gowin: Himbaechel. Add BSRAM for all chips. 2023-11-26 13:08:09 +01:00
gowin_utils.h gowin: Himbaechel. Deal with SP BSRAM ports. 2024-01-23 14:00:29 +01:00
gowin.cc gowin: Himbaechel. Deal with SP BSRAM ports. 2024-01-23 14:00:29 +01:00
gowin.h gowin: Himbaechel. Add BSRAM for all chips. 2023-11-26 13:08:09 +01:00
pack.cc gowin: Himbaechel. Handle SDP OCE 2024-02-09 08:04:08 +01:00
pack.h gowin: Himbaechel. Add ALU. 2023-08-31 08:28:09 +02:00