86 lines
2.8 KiB
C++
86 lines
2.8 KiB
C++
/*
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* nextpnr -- Next Generation Place and Route
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*
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* Copyright (C) 2018 Clifford Wolf <clifford@symbioticeda.com>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#ifdef MAIN_EXECUTABLE
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#include <fstream>
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#include "command.h"
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#include "design_utils.h"
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#include "jsonwrite.h"
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#include "log.h"
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#include "timing.h"
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USING_NEXTPNR_NAMESPACE
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class FpgaInterchangeCommandHandler : public CommandHandler
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{
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public:
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FpgaInterchangeCommandHandler(int argc, char **argv);
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virtual ~FpgaInterchangeCommandHandler(){};
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std::unique_ptr<Context> createContext(std::unordered_map<std::string, Property> &values) override;
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void setupArchContext(Context *ctx) override{};
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void customBitstream(Context *ctx) override;
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void customAfterLoad(Context *ctx) override;
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protected:
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po::options_description getArchOptions() override;
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};
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FpgaInterchangeCommandHandler::FpgaInterchangeCommandHandler(int argc, char **argv) : CommandHandler(argc, argv) {}
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po::options_description FpgaInterchangeCommandHandler::getArchOptions()
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{
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po::options_description specific("Architecture specific options");
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specific.add_options()("chipdb", po::value<std::string>(), "name of chip database binary");
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specific.add_options()("xdc", po::value<std::vector<std::string>>(), "XDC-style constraints file");
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specific.add_options()("phys", po::value<std::string>(), "FPGA interchange Physical netlist to write");
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return specific;
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}
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void FpgaInterchangeCommandHandler::customBitstream(Context *ctx)
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{
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if (vm.count("phys")) {
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std::string filename = vm["phys"].as<std::string>();
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ctx->writePhysicalNetlist(filename);
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}
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}
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std::unique_ptr<Context> FpgaInterchangeCommandHandler::createContext(std::unordered_map<std::string, Property> &values)
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{
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ArchArgs chipArgs;
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if (!vm.count("chipdb")) {
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log_error("chip database binary must be provided\n");
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}
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chipArgs.chipdb = vm["chipdb"].as<std::string>();
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return std::unique_ptr<Context>(new Context(chipArgs));
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}
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void FpgaInterchangeCommandHandler::customAfterLoad(Context *ctx)
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{
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}
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int main(int argc, char *argv[])
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{
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FpgaInterchangeCommandHandler handler(argc, argv);
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return handler.exec();
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}
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#endif
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