148 lines
4.6 KiB
C++
148 lines
4.6 KiB
C++
/*
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* nextpnr -- Next Generation Place and Route
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*
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* Copyright (C) 2018 Clifford Wolf <clifford@clifford.at>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#ifndef NEXTPNR_H
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#error Include "arch.h" via "nextpnr.h" only.
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#endif
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#ifdef NEXTPNR_ARCH_TOP
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NEXTPNR_NAMESPACE_BEGIN
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typedef float delay_t;
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struct DelayInfo
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{
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delay_t delay = 0;
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delay_t raiseDelay() const { return delay; }
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delay_t fallDelay() const { return delay; }
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delay_t avgDelay() const { return delay; }
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DelayInfo operator+(const DelayInfo &other) const
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{
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DelayInfo ret;
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ret.delay = this->delay + other.delay;
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return ret;
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}
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};
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typedef IdString BelType;
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typedef IdString PortPin;
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typedef IdString BelId;
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typedef IdString WireId;
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typedef IdString PipId;
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struct BelPin
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{
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BelId bel;
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PortPin pin;
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};
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NEXTPNR_NAMESPACE_END
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#endif // NEXTPNR_ARCH_TOP
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#ifdef NEXTPNR_ARCH_BOTTOM
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NEXTPNR_NAMESPACE_BEGIN
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struct ArchArgs
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{
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};
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struct Arch : BaseCtx
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{
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Arch(ArchArgs args);
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std::string getChipName();
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virtual IdString id(const std::string &s) const { abort(); }
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virtual IdString id(const char *s) const { abort(); }
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IdString belTypeToId(BelType type) const { return type; }
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IdString portPinToId(PortPin type) const { return type; }
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BelType belTypeFromId(IdString id) const { return id; }
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PortPin portPinFromId(IdString id) const { return id; }
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BelId getBelByName(IdString name) const;
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IdString getBelName(BelId bel) const;
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void bindBel(BelId bel, IdString cell);
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void unbindBel(BelId bel);
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bool checkBelAvail(BelId bel) const;
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IdString getBelCell(BelId bel, bool conflicting = false) const;
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const std::vector<BelId> &getBels() const;
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const std::vector<BelId> &getBelsByType(BelType type) const;
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BelType getBelType(BelId bel) const;
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WireId getWireBelPin(BelId bel, PortPin pin) const;
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BelPin getBelPinUphill(WireId wire) const;
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const std::vector<BelPin> &getBelPinsDownhill(WireId wire) const;
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WireId getWireByName(IdString name) const;
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IdString getWireName(WireId wire) const;
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void bindWire(WireId wire, IdString net);
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void unbindWire(WireId wire);
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bool checkWireAvail(WireId wire) const;
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IdString getWireNet(WireId wire, bool conflicting = false) const;
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const std::vector<WireId> &getWires() const;
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PipId getPipByName(IdString name) const;
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IdString getPipName(PipId pip) const;
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void bindPip(PipId pip, IdString net);
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void unbindPip(PipId pip);
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bool checkPipAvail(PipId pip) const;
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IdString getPipNet(PipId pip, bool conflicting = false) const;
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const std::vector<PipId> &getPips() const;
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WireId getPipSrcWire(PipId pip) const;
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WireId getPipDstWire(PipId pip) const;
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DelayInfo getPipDelay(PipId pip) const;
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const std::vector<PipId> &getPipsDownhill(WireId wire) const;
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const std::vector<PipId> &getPipsUphill(WireId wire) const;
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const std::vector<PipId> &getWireAliases(WireId wire) const;
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void estimatePosition(BelId bel, int &x, int &y, bool &gb) const;
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delay_t estimateDelay(WireId src, WireId dst) const;
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delay_t getDelayEpsilon() const { return 0.01; }
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float getDelayNS(delay_t v) const { return v; }
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std::vector<GraphicElement> getFrameGraphics() const;
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std::vector<GraphicElement> getBelGraphics(BelId bel) const;
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std::vector<GraphicElement> getWireGraphics(WireId wire) const;
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std::vector<GraphicElement> getPipGraphics(PipId pip) const;
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bool allGraphicsReload = false;
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bool frameGraphicsReload = false;
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std::unordered_set<BelId> belGraphicsReload;
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std::unordered_set<WireId> wireGraphicsReload;
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std::unordered_set<PipId> pipGraphicsReload;
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bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort,
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delay_t &delay) const;
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IdString getPortClock(const CellInfo *cell, IdString port) const;
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bool isClockPort(const CellInfo *cell, IdString port) const;
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};
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NEXTPNR_NAMESPACE_END
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#endif // NEXTPNR_ARCH_BOTTOM
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