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5e763b1afc
nextpnr/ecp5
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Ross Schlaikjer 5e763b1afc
Alter MULT18X18D timing db based on register config 
If the REG_INPUTA_CLK and REG_INPUTB_CLK values are set, then we should
use the faster setup/hold timings for the 18x8 multiplier.
Similarly, check the value of REG_OUTPUT_CLK for whether or not to use
faster timings for the output.

This is based on how I currently understand the registers to work - if
anyone knows the actual rules for when each timing applies please do
chime in to correct this implementation if necessary.

Along the same lines, this PR does not address the case when the
pipeline registers are enabled, since it is not clear to me how exactly
that affects the timing.
2020-04-28 20:01:29 -04:00
..
docs Remove comment about the USRMCLK primitive being untested. 2020-04-02 21:35:35 -06:00
resource Add missing files and missing includes for MSVC 2018-08-02 14:51:05 +02:00
.gitignore ecp5: Adding complete binary blob writer to Trellis importer 2018-07-11 10:41:36 +02:00
arch_place.cc ecp5: Improve bounding box accuracy 2020-02-03 11:38:31 +00:00
arch_pybindings.cc python: Expose PlaceStrength enum and isValidBelForCell on ecp5 2020-01-26 20:32:02 +00:00
arch_pybindings.h python: Fix getWireBelPins 2019-09-15 15:59:16 +01:00
arch.cc Alter MULT18X18D timing db based on register config 2020-04-28 20:01:29 -04:00
arch.h ecp5: Proper support for '12k' device 2020-03-13 11:22:11 +00:00
archdefs.h Alter MULT18X18D timing db based on register config 2020-04-28 20:01:29 -04:00
baseconfigs.cc ecp5: Embed baseconfig 2019-02-08 13:44:15 +00:00
bitstream.cc ecp5: Fix CSDECODE bitgen 2020-04-15 20:25:56 +01:00
bitstream.h ecp5: Remove libtrellis link for bitstream gen 2018-08-01 15:58:38 +02:00
cells.cc Improve handling of unused inout port bits 2020-02-25 14:26:47 +00:00
cells.h ecp5: Add DELAYF/DELAYG support 2019-02-24 10:28:25 +01:00
config.cc ecp5: Working on BRAM initialisation 2018-10-09 13:13:16 +01:00
config.h ecp5: Working on BRAM initialisation 2018-10-09 13:13:16 +01:00
constids.inc Merge remote-tracking branch 'origin/master' into mmicko/ecp5_gui 2019-12-28 13:54:06 +01:00
dcu_bitstream.h ecp5: New Property interface 2019-08-05 17:22:37 +01:00
family.cmake Add TRELLIS_PROGRAM_PREFIX 2020-04-11 22:05:30 +02:00
gfx.cc Few more caught by clang 2020-01-18 15:58:09 +01:00
gfx.h move constants to gfx.cc 2019-12-28 14:27:14 +01:00
globals.cc ecp5: Use dedicated routing for ECLKs where possible 2020-04-14 19:20:13 +01:00
globals.h ecp5: Separate global promotion and routing 2018-10-31 16:22:34 +00:00
iotypes.inc ecp5: Add support for top pseudo diff outputs 2020-01-15 11:43:12 +00:00
lpf.cc Fix assertion failure on invalid LOCATE input. 2020-04-05 21:42:45 -06:00
main.cc ecp5: Proper support for '12k' device 2020-03-13 11:22:11 +00:00
pack.cc Alter MULT18X18D timing db based on register config 2020-04-28 20:01:29 -04:00
pio.cc ecp5: Add support for top pseudo diff outputs 2020-01-15 11:43:12 +00:00
pio.h Rename io.{h,cc} to pio.{h,cc} to avoid naming conflict with Windows-provided io.h. 2018-11-03 13:11:01 -04:00
trellis_import.py ecp5: Add SPICB0 IO support 2020-01-20 20:30:14 +00:00