nextpnr/himbaechel/uarch/gowin
YRabbit 5e9a96d358 gowin: Himbaechel. Add SERDES and differential IO
- experiment with notifyBelChange as an auxiliary cells reservation mechanism;
- since HCLK pips depend on the coordinates, and not on the tile type,
  the tile type is copied if necessary;
- information about supported types of differential IO primitives has
  been added to the extra information of the chip;

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2023-08-31 08:28:09 +02:00
..
constids.inc gowin: Himbaechel. Add SERDES and differential IO 2023-08-31 08:28:09 +02:00
cst.cc gowin: Himbaechel. Add extra chip data 2023-08-31 08:28:09 +02:00
cst.h gowin: Himbaechel. Add constraint file processing. 2023-08-31 08:28:09 +02:00
globals.cc gowin: Himbaechel. Add SERDES and differential IO 2023-08-31 08:28:09 +02:00
globals.h gowin: Himbaechel. Add a clock router. 2023-08-31 08:28:09 +02:00
gowin_arch_gen.py gowin: Himbaechel. Add SERDES and differential IO 2023-08-31 08:28:09 +02:00
gowin_utils.cc gowin: Himbaechel. Use pin functions info 2023-08-31 08:28:09 +02:00
gowin_utils.h gowin: Himbaechel. Use pin functions info 2023-08-31 08:28:09 +02:00
gowin.cc gowin: Himbaechel. Add SERDES and differential IO 2023-08-31 08:28:09 +02:00
gowin.h gowin: Himbaechel. Add SERDES and differential IO 2023-08-31 08:28:09 +02:00
pack.cc gowin: Himbaechel. Add SERDES and differential IO 2023-08-31 08:28:09 +02:00
pack.h gowin: Himbaechel. Add ALU. 2023-08-31 08:28:09 +02:00