672 lines
21 KiB
C++
672 lines
21 KiB
C++
/*
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* nextpnr -- Next Generation Place and Route
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*
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* Copyright (C) 2020 David Shah <dave@ds0.me>
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*
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include <boost/algorithm/string.hpp>
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#include "embed.h"
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#include "log.h"
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#include "nextpnr.h"
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#include "placer1.h"
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#include "placer_heap.h"
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#include "router1.h"
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#include "router2.h"
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#include "timing.h"
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#include "util.h"
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NEXTPNR_NAMESPACE_BEGIN
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namespace {
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static std::tuple<int, int, std::string> split_identifier_name(const std::string &name)
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{
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size_t first_slash = name.find('/');
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NPNR_ASSERT(first_slash != std::string::npos);
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size_t second_slash = name.find('/', first_slash + 1);
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NPNR_ASSERT(second_slash != std::string::npos);
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return std::make_tuple(std::stoi(name.substr(1, first_slash)),
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std::stoi(name.substr(first_slash + 2, second_slash - first_slash)),
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name.substr(second_slash + 1));
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};
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} // namespace
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// -----------------------------------------------------------------------
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void IdString::initialize_arch(const BaseCtx *ctx)
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{
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#define X(t) initialize_add(ctx, #t, ID_##t);
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#include "constids.inc"
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#undef X
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}
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// -----------------------------------------------------------------------
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Arch::Arch(ArchArgs args) : args(args)
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{
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// Parse device string
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if (boost::starts_with(args.device, "LIFCL")) {
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family = "LIFCL";
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} else {
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log_error("Unknown device string '%s' (expected device name like 'LIFCL-40-8SG72C')\n", args.device.c_str());
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}
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auto last_sep = args.device.rfind('-');
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if (last_sep == std::string::npos)
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log_error("Unknown device string '%s' (expected device name like 'LIFCL-40-8SG72C')\n", args.device.c_str());
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device = args.device.substr(0, last_sep);
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speed = args.device.substr(last_sep + 1, 1);
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auto package_end = args.device.find_last_of("0123456789");
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if (package_end == std::string::npos || package_end < last_sep)
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log_error("Unknown device string '%s' (expected device name like 'LIFCL-40-8SG72C')\n", args.device.c_str());
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package = args.device.substr(last_sep + 2, (package_end - (last_sep + 2)) + 1);
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rating = args.device.substr(package_end + 1);
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// Check for 'ES' part
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if (rating.size() > 1 && rating.substr(1) == "ES") {
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variant = "ES";
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} else {
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variant = "";
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}
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// Load database
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std::string chipdb = stringf("nexus/chipdb-%s.bin", family.c_str());
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auto db_ptr = reinterpret_cast<const RelPtr<DatabasePOD> *>(get_chipdb(chipdb));
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if (db_ptr == nullptr)
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log_error("Failed to load chipdb '%s'\n", chipdb.c_str());
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db = db_ptr->get();
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// Check database version and family
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if (db->version != bba_version) {
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log_error("Provided database version %d is %s than nextpnr version %d, please rebuild database/nextpnr.\n",
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int(db->version), (db->version > bba_version) ? "newer" : "older", int(bba_version));
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}
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if (db->family.get() != family) {
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log_error("Database is for family '%s' but provided device is family '%s'.\n", db->family.get(),
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family.c_str());
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}
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// Set up chip_info
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chip_info = nullptr;
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for (size_t i = 0; i < db->num_chips; i++) {
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auto &chip = db->chips[i];
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if (chip.device_name.get() == device) {
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chip_info = &chip;
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break;
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}
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}
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if (!chip_info)
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log_error("Unknown device '%s'.\n", device.c_str());
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// Set up bba IdStrings
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for (size_t i = 0; i < db->ids->num_bba_ids; i++) {
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IdString::initialize_add(this, db->ids->bba_id_strs[i].get(), uint32_t(i) + db->ids->num_file_ids);
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}
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// Set up validity structures
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tileStatus.resize(chip_info->num_tiles);
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for (size_t i = 0; i < chip_info->num_tiles; i++) {
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tileStatus[i].boundcells.resize(db->loctypes[chip_info->grid[i].loc_type].num_bels);
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}
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init_cell_pin_data();
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// Validate and set up package
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package_idx = -1;
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for (size_t i = 0; i < chip_info->num_packages; i++) {
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if (package == chip_info->packages[i].short_name.get()) {
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package_idx = i;
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break;
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}
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}
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if (package_idx == -1) {
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std::string all_packages = "";
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for (size_t i = 0; i < chip_info->num_packages; i++) {
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all_packages += " ";
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all_packages += chip_info->packages[i].short_name.get();
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}
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log_error("Unknown package '%s'. Available package options:%s\n", package.c_str(), all_packages.c_str());
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}
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}
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// -----------------------------------------------------------------------
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std::string Arch::getChipName() const { return args.device; }
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IdString Arch::archArgsToId(ArchArgs args) const { return id(args.device); }
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// -----------------------------------------------------------------------
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BelId Arch::getBelByName(IdString name) const
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{
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int x, y;
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std::string belname;
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std::tie(x, y, belname) = split_identifier_name(name.str(this));
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NPNR_ASSERT(x >= 0 && x < chip_info->width);
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NPNR_ASSERT(y >= 0 && y < chip_info->height);
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auto &tile = db->loctypes[chip_info->grid[y * chip_info->width + x].loc_type];
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IdString bn = id(belname);
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for (size_t i = 0; i < tile.num_bels; i++) {
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if (tile.bels[i].name == bn.index) {
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BelId ret;
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ret.tile = y * chip_info->width + x;
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ret.index = i;
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return ret;
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}
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}
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return BelId();
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}
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BelRange Arch::getBelsByTile(int x, int y) const
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{
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BelRange br;
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NPNR_ASSERT(x >= 0 && x < chip_info->width);
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NPNR_ASSERT(y >= 0 && y < chip_info->height);
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br.b.cursor_tile = y * chip_info->width + x;
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br.e.cursor_tile = y * chip_info->width + x;
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br.b.cursor_index = 0;
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br.e.cursor_index = db->loctypes[chip_info->grid[br.b.cursor_tile].loc_type].num_bels;
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br.b.chip = chip_info;
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br.b.db = db;
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br.e.chip = chip_info;
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br.e.db = db;
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if (br.e.cursor_index == -1)
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++br.e.cursor_index;
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else
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++br.e;
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return br;
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}
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WireId Arch::getBelPinWire(BelId bel, IdString pin) const
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{
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// Binary search on wire IdString, by ID
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int num_bel_wires = bel_data(bel).num_ports;
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const BelWirePOD *bel_ports = bel_data(bel).ports.get();
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if (num_bel_wires < 7) {
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for (int i = 0; i < num_bel_wires; i++) {
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if (int(bel_ports[i].port) == pin.index) {
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return canonical_wire(bel.tile, bel_ports[i].wire_index);
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}
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}
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} else {
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int b = 0, e = num_bel_wires - 1;
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while (b <= e) {
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int i = (b + e) / 2;
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if (int(bel_ports[i].port) == pin.index) {
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return canonical_wire(bel.tile, bel_ports[i].wire_index);
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}
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if (int(bel_ports[i].port) > pin.index)
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e = i - 1;
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else
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b = i + 1;
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}
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}
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return WireId();
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}
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PortType Arch::getBelPinType(BelId bel, IdString pin) const
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{
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// Binary search on wire IdString, by ID
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int num_bel_wires = bel_data(bel).num_ports;
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const BelWirePOD *bel_ports = bel_data(bel).ports.get();
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if (num_bel_wires < 7) {
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for (int i = 0; i < num_bel_wires; i++) {
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if (int(bel_ports[i].port) == pin.index) {
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return PortType(bel_ports[i].type);
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}
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}
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} else {
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int b = 0, e = num_bel_wires - 1;
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while (b <= e) {
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int i = (b + e) / 2;
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if (int(bel_ports[i].port) == pin.index) {
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return PortType(bel_ports[i].type);
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}
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if (int(bel_ports[i].port) > pin.index)
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e = i - 1;
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else
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b = i + 1;
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}
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}
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NPNR_ASSERT_FALSE("unknown bel pin");
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}
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std::vector<IdString> Arch::getBelPins(BelId bel) const
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{
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std::vector<IdString> ret;
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int num_bel_wires = bel_data(bel).num_ports;
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const BelWirePOD *bel_ports = bel_data(bel).ports.get();
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for (int i = 0; i < num_bel_wires; i++)
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ret.push_back(IdString(bel_ports[i].port));
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return ret;
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}
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std::vector<std::pair<IdString, std::string>> Arch::getBelAttrs(BelId bel) const
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{
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std::vector<std::pair<IdString, std::string>> ret;
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ret.emplace_back(id("INDEX"), stringf("%d", bel.index));
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ret.emplace_back(id("GRID_X"), stringf("%d", bel.tile % chip_info->width));
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ret.emplace_back(id("GRID_Y"), stringf("%d", bel.tile / chip_info->width));
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ret.emplace_back(id("BEL_Z"), stringf("%d", bel_data(bel).z));
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ret.emplace_back(id("BEL_TYPE"), nameOf(getBelType(bel)));
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return ret;
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}
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// -----------------------------------------------------------------------
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WireId Arch::getWireByName(IdString name) const
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{
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int x, y;
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std::string wirename;
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std::tie(x, y, wirename) = split_identifier_name(name.str(this));
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NPNR_ASSERT(x >= 0 && x < chip_info->width);
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NPNR_ASSERT(y >= 0 && y < chip_info->height);
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auto &tile = db->loctypes[chip_info->grid[y * chip_info->width + x].loc_type];
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IdString wn = id(wirename);
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for (size_t i = 0; i < tile.num_wires; i++) {
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if (tile.wires[i].name == wn.index) {
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WireId ret;
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ret.tile = y * chip_info->width + x;
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ret.index = i;
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return ret;
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}
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}
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return WireId();
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}
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IdString Arch::getWireType(WireId wire) const { return id("WIRE"); }
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std::vector<std::pair<IdString, std::string>> Arch::getWireAttrs(WireId wire) const
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{
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std::vector<std::pair<IdString, std::string>> ret;
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ret.emplace_back(id("INDEX"), stringf("%d", wire.index));
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ret.emplace_back(id("GRID_X"), stringf("%d", wire.tile % chip_info->width));
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ret.emplace_back(id("GRID_Y"), stringf("%d", wire.tile / chip_info->width));
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ret.emplace_back(id("FLAGS"), stringf("%u", wire_data(wire).flags));
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return ret;
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}
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// -----------------------------------------------------------------------
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PipId Arch::getPipByName(IdString name) const
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{
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int x, y;
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std::string pipname;
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std::tie(x, y, pipname) = split_identifier_name(name.str(this));
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NPNR_ASSERT(x >= 0 && x < chip_info->width);
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NPNR_ASSERT(y >= 0 && y < chip_info->height);
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PipId ret;
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ret.tile = y * chip_info->width + x;
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auto sep_pos = pipname.find(':');
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ret.index = std::stoi(pipname.substr(0, sep_pos));
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return ret;
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}
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IdString Arch::getPipName(PipId pip) const
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{
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NPNR_ASSERT(pip != PipId());
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return id(stringf("X%d/Y%d/%d:%s->%s", pip.tile % chip_info->width, pip.tile / chip_info->width, pip.index,
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nameOf(loc_data(pip).wires[pip_data(pip).from_wire].name),
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nameOf(loc_data(pip).wires[pip_data(pip).to_wire].name)));
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}
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IdString Arch::getPipType(PipId pip) const { return IdString(); }
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std::vector<std::pair<IdString, std::string>> Arch::getPipAttrs(PipId pip) const
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{
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std::vector<std::pair<IdString, std::string>> ret;
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ret.emplace_back(id("INDEX"), stringf("%d", pip.index));
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ret.emplace_back(id("GRID_X"), stringf("%d", pip.tile % chip_info->width));
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ret.emplace_back(id("GRID_Y"), stringf("%d", pip.tile / chip_info->width));
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ret.emplace_back(id("FROM_TILE_WIRE"), nameOf(loc_data(pip).wires[pip_data(pip).from_wire].name));
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ret.emplace_back(id("TO_TILE_WIRE"), nameOf(loc_data(pip).wires[pip_data(pip).to_wire].name));
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return ret;
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}
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// -----------------------------------------------------------------------
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namespace {
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const float bel_ofs_x = 0.7, bel_ofs_y = 0.0375;
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const float bel_sp_x = 0.1, bel_sp_y = 0.1;
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const float bel_width = 0.075, bel_height = 0.075;
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} // namespace
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std::vector<GraphicElement> Arch::getDecalGraphics(DecalId decal) const
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{
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std::vector<GraphicElement> ret;
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switch (decal.type) {
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case DecalId::TYPE_BEL: {
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auto style = decal.active ? GraphicElement::STYLE_ACTIVE : GraphicElement::STYLE_INACTIVE;
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if (decal.index != -1) {
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int slice = (decal.index >> 3) & 0x3;
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int bel = decal.index & 0x7;
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float x1, x2, y1, y2;
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if (bel == BEL_RAMW) {
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x1 = bel_ofs_x;
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y1 = bel_ofs_y + 2 * bel_sp_y * slice;
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x2 = x1 + bel_sp_x + bel_width;
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y2 = y1 + bel_height;
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} else {
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x1 = bel_ofs_x + bel_sp_x * (bel >> 1);
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y1 = bel_ofs_y + 2 * bel_sp_y * slice + bel_sp_y * (bel & 0x1);
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if (slice >= 2)
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y1 += bel_sp_y * 1.5;
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x2 = x1 + bel_width;
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y2 = y1 + bel_height;
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}
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ret.emplace_back(GraphicElement::TYPE_BOX, style, x1, y1, x2, y2, 1);
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}
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break;
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};
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default:
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break;
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}
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return ret;
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}
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DecalXY Arch::getBelDecal(BelId bel) const
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{
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DecalXY decalxy;
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decalxy.decal.type = DecalId::TYPE_BEL;
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if (tile_is(bel, LOC_LOGIC))
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decalxy.decal.index = bel_data(bel).z;
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else
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decalxy.decal.index = -1;
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decalxy.decal.active = (getBoundBelCell(bel) != nullptr);
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decalxy.x = bel.tile % chip_info->width;
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decalxy.y = bel.tile / chip_info->width;
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return decalxy;
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}
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DecalXY Arch::getWireDecal(WireId wire) const { return {}; }
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DecalXY Arch::getPipDecal(PipId pip) const { return {}; };
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DecalXY Arch::getGroupDecal(GroupId pip) const { return {}; };
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// -----------------------------------------------------------------------
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bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayInfo &delay) const
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{
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return false;
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}
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TimingPortClass Arch::getPortTimingClass(const CellInfo *cell, IdString port, int &clockInfoCount) const
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{
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return TMG_IGNORE;
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}
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TimingClockingInfo Arch::getPortClockingInfo(const CellInfo *cell, IdString port, int index) const { return {}; }
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// -----------------------------------------------------------------------
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delay_t Arch::estimateDelay(WireId src, WireId dst) const
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{
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int src_x = src.tile % chip_info->width, src_y = src.tile / chip_info->width;
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int dst_x = dst.tile % chip_info->width, dst_y = dst.tile / chip_info->width;
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int dist_x = std::abs(src_x - dst_x);
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int dist_y = std::abs(src_y - dst_y);
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return 100 * dist_x + 100 * dist_y;
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}
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delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const
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{
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if (net_info->driver.cell == nullptr || net_info->driver.cell->bel == BelId() || sink.cell->bel == BelId())
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return 0;
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int src_x = net_info->driver.cell->bel.tile % chip_info->width,
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src_y = net_info->driver.cell->bel.tile / chip_info->width;
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int dst_x = sink.cell->bel.tile % chip_info->width, dst_y = sink.cell->bel.tile / chip_info->width;
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int dist_x = std::abs(src_x - dst_x);
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int dist_y = std::abs(src_y - dst_y);
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return 100 * dist_x + 100 * dist_y;
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}
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bool Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay_t &budget) const { return false; }
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ArcBounds Arch::getRouteBoundingBox(WireId src, WireId dst) const
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{
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ArcBounds bb;
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int src_x = src.tile % chip_info->width, src_y = src.tile / chip_info->width;
|
|
int dst_x = dst.tile % chip_info->width, dst_y = dst.tile / chip_info->width;
|
|
|
|
bb.x0 = src_x;
|
|
bb.y0 = src_y;
|
|
bb.x1 = src_x;
|
|
bb.y1 = src_y;
|
|
|
|
auto extend = [&](int x, int y) {
|
|
bb.x0 = std::min(bb.x0, x);
|
|
bb.x1 = std::max(bb.x1, x);
|
|
bb.y0 = std::min(bb.y0, y);
|
|
bb.y1 = std::max(bb.y1, y);
|
|
};
|
|
extend(dst_x, dst_y);
|
|
|
|
return bb;
|
|
}
|
|
|
|
// -----------------------------------------------------------------------
|
|
|
|
bool Arch::place()
|
|
{
|
|
std::string placer = str_or_default(settings, id("placer"), defaultPlacer);
|
|
|
|
if (placer == "heap") {
|
|
PlacerHeapCfg cfg(getCtx());
|
|
cfg.ioBufTypes.insert(id_SEIO33_CORE);
|
|
cfg.ioBufTypes.insert(id_SEIO18_CORE);
|
|
cfg.ioBufTypes.insert(id_OSC_CORE);
|
|
cfg.cellGroups.emplace_back();
|
|
cfg.cellGroups.back().insert(id_OXIDE_COMB);
|
|
cfg.cellGroups.back().insert(id_OXIDE_FF);
|
|
|
|
cfg.beta = 0.7;
|
|
cfg.criticalityExponent = 7;
|
|
if (!placer_heap(getCtx(), cfg))
|
|
return false;
|
|
} else if (placer == "sa") {
|
|
if (!placer1(getCtx(), Placer1Cfg(getCtx())))
|
|
return false;
|
|
} else {
|
|
log_error("Nexus architecture does not support placer '%s'\n", placer.c_str());
|
|
}
|
|
getCtx()->attrs[getCtx()->id("step")] = std::string("place");
|
|
archInfoToAttributes();
|
|
return true;
|
|
}
|
|
|
|
bool Arch::route()
|
|
{
|
|
assign_budget(getCtx(), true);
|
|
|
|
route_globals();
|
|
|
|
std::string router = str_or_default(settings, id("router"), defaultRouter);
|
|
bool result;
|
|
if (router == "router1") {
|
|
result = router1(getCtx(), Router1Cfg(getCtx()));
|
|
} else if (router == "router2") {
|
|
router2(getCtx(), Router2Cfg(getCtx()));
|
|
result = true;
|
|
} else {
|
|
log_error("iCE40 architecture does not support router '%s'\n", router.c_str());
|
|
}
|
|
getCtx()->attrs[getCtx()->id("step")] = std::string("route");
|
|
archInfoToAttributes();
|
|
return result;
|
|
}
|
|
|
|
// -----------------------------------------------------------------------
|
|
|
|
CellPinMux Arch::get_cell_pinmux(const CellInfo *cell, IdString pin) const
|
|
{
|
|
IdString param = id(stringf("%sMUX", pin.c_str(this)));
|
|
auto fnd_param = cell->params.find(param);
|
|
if (fnd_param == cell->params.end())
|
|
return PINMUX_SIG;
|
|
const std::string &pm = fnd_param->second.as_string();
|
|
if (pm == "0")
|
|
return PINMUX_0;
|
|
else if (pm == "1")
|
|
return PINMUX_1;
|
|
else if (pm == "INV")
|
|
return PINMUX_INV;
|
|
else if (pm == pin.c_str(this))
|
|
return PINMUX_SIG;
|
|
else {
|
|
log_error("Invalid %s setting '%s' for cell '%s'\n", nameOf(param), pm.c_str(), nameOf(cell));
|
|
NPNR_ASSERT_FALSE("unreachable");
|
|
}
|
|
}
|
|
|
|
void Arch::set_cell_pinmux(CellInfo *cell, IdString pin, CellPinMux state)
|
|
{
|
|
IdString param = id(stringf("%sMUX", pin.c_str(this)));
|
|
switch (state) {
|
|
case PINMUX_SIG:
|
|
cell->params.erase(param);
|
|
break;
|
|
case PINMUX_0:
|
|
cell->params[param] = std::string("0");
|
|
break;
|
|
case PINMUX_1:
|
|
cell->params[param] = std::string("1");
|
|
break;
|
|
case PINMUX_INV:
|
|
cell->params[param] = std::string("INV");
|
|
break;
|
|
default:
|
|
NPNR_ASSERT_FALSE("unreachable");
|
|
}
|
|
}
|
|
|
|
// -----------------------------------------------------------------------
|
|
|
|
const PadInfoPOD *Arch::get_pkg_pin_data(const std::string &pin) const
|
|
{
|
|
for (size_t i = 0; i < chip_info->num_pads; i++) {
|
|
const PadInfoPOD *pad = &(chip_info->pads[i]);
|
|
if (pin == pad->pins[package_idx].get())
|
|
return pad;
|
|
}
|
|
return nullptr;
|
|
}
|
|
|
|
Loc Arch::get_pad_loc(const PadInfoPOD *pad) const
|
|
{
|
|
Loc loc;
|
|
switch (pad->side) {
|
|
case PIO_LEFT:
|
|
loc.x = 0;
|
|
loc.y = pad->offset;
|
|
break;
|
|
case PIO_RIGHT:
|
|
loc.x = chip_info->width - 1;
|
|
loc.y = pad->offset;
|
|
break;
|
|
case PIO_TOP:
|
|
loc.x = pad->offset;
|
|
loc.y = 0;
|
|
break;
|
|
case PIO_BOTTOM:
|
|
loc.x = pad->offset;
|
|
loc.y = chip_info->height - 1;
|
|
}
|
|
loc.z = pad->pio_index;
|
|
return loc;
|
|
}
|
|
|
|
BelId Arch::get_pad_pio_bel(const PadInfoPOD *pad) const
|
|
{
|
|
if (pad == nullptr)
|
|
return BelId();
|
|
return getBelByLocation(get_pad_loc(pad));
|
|
}
|
|
|
|
const PadInfoPOD *Arch::get_bel_pad(BelId bel) const
|
|
{
|
|
Loc loc = getBelLocation(bel);
|
|
int side = -1, offset = -1;
|
|
// Convert (x, y) to (side, offset)
|
|
if (loc.x == 0) {
|
|
side = PIO_LEFT;
|
|
offset = loc.y;
|
|
} else if (loc.x == (chip_info->width - 1)) {
|
|
side = PIO_RIGHT;
|
|
offset = loc.y;
|
|
} else if (loc.y == 0) {
|
|
side = PIO_TOP;
|
|
offset = loc.x;
|
|
} else if (loc.y == (chip_info->height - 1)) {
|
|
side = PIO_BOTTOM;
|
|
offset = loc.x;
|
|
} else {
|
|
return nullptr;
|
|
}
|
|
// Lookup in the list of pads
|
|
for (size_t i = 0; i < chip_info->num_pads; i++) {
|
|
const PadInfoPOD *pad = &(chip_info->pads[i]);
|
|
if (pad->side == side && pad->offset == offset && pad->pio_index == loc.z)
|
|
return pad;
|
|
}
|
|
return nullptr;
|
|
}
|
|
|
|
std::string Arch::get_pad_functions(const PadInfoPOD *pad) const
|
|
{
|
|
std::string s;
|
|
for (size_t i = 0; i < pad->num_funcs; i++) {
|
|
if (!s.empty())
|
|
s += '/';
|
|
s += IdString(pad->func_strs[i]).str(this);
|
|
}
|
|
return s;
|
|
}
|
|
|
|
// -----------------------------------------------------------------------
|
|
|
|
#ifdef WITH_HEAP
|
|
const std::string Arch::defaultPlacer = "heap";
|
|
#else
|
|
const std::string Arch::defaultPlacer = "sa";
|
|
#endif
|
|
|
|
const std::vector<std::string> Arch::availablePlacers = {"sa",
|
|
#ifdef WITH_HEAP
|
|
"heap"
|
|
#endif
|
|
|
|
};
|
|
|
|
const std::string Arch::defaultRouter = "router2";
|
|
const std::vector<std::string> Arch::availableRouters = {"router1", "router2"};
|
|
|
|
NEXTPNR_NAMESPACE_END
|