94 lines
2.9 KiB
Makefile
94 lines
2.9 KiB
Makefile
#
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# nextpnr -- Next Generation Place and Route
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#
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# Copyright (C) 2021 Symbiflow Authors
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#
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#
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# Permission to use, copy, modify, and/or distribute this software for any
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# purpose with or without fee is hereby granted, provided that the above
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# copyright notice and this permission notice appear in all copies.
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#
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# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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# This Makefile provides a streamlined way to create an example
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# FPGA interchange BBA suitable for placing and routing on Xilinx A35 parts.
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#
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# FPGA interchange device database is generated via RapidWright.
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#
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# Currently FPGA interchange physical netlist (e.g. place and route route) to
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# FASM support is not done, so bitstream generation relies on RapidWright to
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# convert FPGA interchange logical and physical netlist into a Vivado DCP.
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include ../common.mk
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.DELETE_ON_ERROR:
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.PHONY: all chipdb test debug_test
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all: chipdb
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build:
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mkdir build
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build/RapidWright: | build
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cd build && git clone https://github.com/Xilinx/RapidWright.git
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build/env: | build
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python3 -mvenv build/env
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build/python-fpga-interchange: | build
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cd build && git clone https://github.com/SymbiFlow/python-fpga-interchange.git
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build/fpga-interchange-schema: | build
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cd build && git clone https://github.com/SymbiFlow/fpga-interchange-schema.git
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build/.setup: | build/env build/fpga-interchange-schema build/python-fpga-interchange build/RapidWright
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source build/env/bin/activate && \
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cd build/python-fpga-interchange/ && \
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pip install -r requirements.txt
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touch build/.setup
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$(NEXTPNR_PATH)/build:
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mkdir $(NEXTPNR_PATH)/build
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$(NEXTPNR_PATH)/build/bba/bbasm: | $(NEXTPNR_PATH)/build
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cd $(NEXTPNR_PATH)/build && cmake -DARCH=fpga_interchange ..
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make -j -C $(NEXTPNR_PATH)/build
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build/nextpnr/fpga_interchange/chipdb.bba: build/.setup
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mkdir -p build/nextpnr/fpga_interchange
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source build/env/bin/activate && \
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cd build/python-fpga-interchange/ && \
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make \
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-f Makefile.rapidwright \
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NEXTPNR_PATH=$(realpath .)/build/nextpnr \
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RAPIDWRIGHT_PATH=$(RAPIDWRIGHT_PATH) \
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INTERCHANGE_PATH=$(INTERCHANGE_PATH)
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$(BBA_PATH): $(NEXTPNR_PATH)/build/bba/bbasm build/nextpnr/fpga_interchange/chipdb.bba
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$(NEXTPNR_PATH)/build/bba/bbasm -l build/nextpnr/fpga_interchange/chipdb.bba $(BBA_PATH)
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chipdb: $(BBA_PATH)
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test: chipdb
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$(NEXTPNR_PATH)/build/nextpnr-fpga_interchange \
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--chipdb $(BBA_PATH) \
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--package csg324 \
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--test
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debug_test: chipdb
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gdb --args $(NEXTPNR_PATH)/build/nextpnr-fpga_interchange \
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--chipdb $(BBA_PATH) \
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--package csg324 \
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--test
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clean:
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rm -rf build
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