nextpnr/gowin
YRabbit b8ab3116b2 gowin: improve clock wire routing
The dedicated router for clock wires now understands not only the IO
pins but also the rPLL outputs as clock sources.

This simple router sets an optimal route, so it is now the default
router. It can be disabled with the --disable-globals command line flag
if desired, but this is not recommended due to possible clock skew.

Still for GW1N-4C there is no good router for clock wires as there
external quartz resonator is connected via PLL.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2022-12-30 11:55:39 +10:00
..
arch_pybindings.cc Fixing old emails and names in copyrights 2021-06-12 13:22:38 +01:00
arch_pybindings.h Fixing old emails and names in copyrights 2021-06-12 13:22:38 +01:00
arch.cc gowin: improve clock wire routing 2022-12-30 11:55:39 +10:00
arch.h gowin: improve clock wire routing 2022-12-30 11:55:39 +10:00
archdefs.h gowin: add support for wide LUTs. 2021-10-07 18:38:33 +10:00
cells.cc gowin: use ctx->idf() a bit 2022-11-11 09:19:16 +10:00
cells.h gowin: add PLL pins processing 2022-12-04 15:06:44 +10:00
CMakeLists.txt gowin: Add GW1NZ-1 2022-02-15 14:12:16 +02:00
constids.inc gowin: add PLL pins processing 2022-12-04 15:06:44 +10:00
cst.cc gowin: Add GUI. 2022-01-29 14:45:17 +10:00
cst.h gowin: Add GUI. 2022-01-29 14:45:17 +10:00
family.cmake Gowin target (#542) 2020-12-30 14:59:55 +00:00
gfx.cc gowin: fix build for wasm 2022-12-21 16:13:08 +10:00
gfx.h gowin: fix build for wasm 2022-12-21 16:13:08 +10:00
globals.cc gowin: improve clock wire routing 2022-12-30 11:55:39 +10:00
globals.h gowin: improve clock wire routing 2022-12-30 11:55:39 +10:00
main.cc gowin: improve clock wire routing 2022-12-30 11:55:39 +10:00
pack.cc gowin: BUGFIX: Correctly handle resets 2022-12-09 12:55:22 +10:00