8d1eb0a195
Currently the lookahead is disabled by default because of the time to compute and RAM usage. However it does appear to work reasonably well in testing. Further effort is required to lower RAM usage after initial computation, and explore trade-off for cheaper time to compute. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
55 lines
2.1 KiB
CMake
55 lines
2.1 KiB
CMake
find_package(TCL)
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if(NOT ${TCL_FOUND})
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message(FATAL_ERROR "Tcl is required for FPGA interchange Arch.")
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endif()
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find_package(ZLIB REQUIRED)
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set(RAPIDWRIGHT_PATH $ENV{HOME}/RapidWright CACHE PATH "Path to RapidWright")
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set(INVOKE_RAPIDWRIGHT ${RAPIDWRIGHT_PATH}/scripts/invoke_rapidwright.sh CACHE PATH "Path to RapidWright invocation script")
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# FIXME: Make patch data available in the python package and remove this cached var
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set(PYTHON_INTERCHANGE_PATH $ENV{HOME}/python-fpga-interchange CACHE PATH "Path to the FPGA interchange python library")
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set(INTERCHANGE_SCHEMA_PATH ${PROJECT_SOURCE_DIR}/3rdparty/fpga-interchange-schema/interchange CACHE PATH "Path to the FPGA interchange schema dir")
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add_subdirectory(3rdparty/fpga-interchange-schema/cmake/cxx_static)
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include(${family}/examples/chipdb.cmake)
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include(${family}/examples/tests.cmake)
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set(chipdb_dir ${CMAKE_CURRENT_BINARY_DIR}/${family}/chipdb)
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file(MAKE_DIRECTORY ${chipdb_dir})
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add_custom_target(all-${family}-tests)
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add_custom_target(all-${family}-archcheck-tests)
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add_subdirectory(${family}/examples/devices)
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add_subdirectory(${family}/examples/tests)
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set(PROTOS lookahead.capnp)
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set(CAPNP_SRCS)
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set(CAPNP_HDRS)
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find_package(CapnProto REQUIRED)
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foreach (proto ${PROTOS})
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capnp_generate_cpp(CAPNP_SRC CAPNP_HDR fpga_interchange/${proto})
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list(APPEND CAPNP_HDRS ${CAPNP_HDR})
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list(APPEND CAPNP_SRCS ${CAPNP_SRC})
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endforeach()
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add_library(extra_capnp STATIC ${CAPNP_SRCS})
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target_link_libraries(extra_capnp PRIVATE CapnProto::capnp)
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target_include_directories(extra_capnp INTERFACE ${CMAKE_CURRENT_BINARY_DIR}/fpga_interchange)
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foreach (target ${family_targets})
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target_include_directories(${target} PRIVATE ${TCL_INCLUDE_PATH})
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target_link_libraries(${target} PRIVATE ${TCL_LIBRARY})
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target_link_libraries(${target} PRIVATE fpga_interchange_capnp)
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target_link_libraries(${target} PRIVATE extra_capnp)
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target_link_libraries(${target} PRIVATE z)
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endforeach()
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if(BUILD_GUI)
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target_link_libraries(gui_${family} fpga_interchange_capnp)
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target_link_libraries(gui_${family} extra_capnp)
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target_link_libraries(gui_${family} z)
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endif()
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