
The following primitives are implemented for the GW1NZ-1 chip: * pROM - read only memory - (bitwidth: 1, 2, 4, 8, 16, 32). * pROMX9 - read only memory - (bitwidth: 9, 18, 36). * SDPB - semidual port - (bitwidth: 1, 2, 4, 8, 16, 32). * SDPX9B - semidual port - (bitwidth: 9, 18, 36). * DPB - dual port - (bitwidth: 16). * DPX9B - dual port - (bitwidth: 18). * SP - single port - (bitwidth: 1, 2, 4, 8, 16, 32). * SPX9 - single port - (bitwidth: 9, 18, 36). Also: - The creation of databases for GW1NS-2 has been removed - this was not planned to be supported in Himbaechel from the very beginning and even examples were not created in apicula for this chip due to the lack of boards with it on sale. - It is temporarily prohibited to connect DFFs and LUTs into clusters because for some reason this prevents the creation of images on lower chips (placer cannot find the placement), although without these clusters the images are quite working. Requires further research. - Added creation of ALU with mode 0 - addition. Such an element is not generated by Yosys, but it is a favorite vendor element and its support here greatly simplifies the compilation of vendor netlists. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
46 lines
1014 B
C++
46 lines
1014 B
C++
#ifndef GOWIN_UTILS_H
|
|
#define GOWIN_UTILS_H
|
|
|
|
#include "idstringlist.h"
|
|
#include "nextpnr_namespaces.h"
|
|
#include "nextpnr_types.h"
|
|
|
|
NEXTPNR_NAMESPACE_BEGIN
|
|
|
|
namespace BelFlags {
|
|
static constexpr uint32_t FLAG_SIMPLE_IO = 0x100;
|
|
}
|
|
|
|
struct GowinUtils
|
|
{
|
|
Context *ctx;
|
|
|
|
GowinUtils() {}
|
|
|
|
void init(Context *ctx) { this->ctx = ctx; }
|
|
|
|
// tile
|
|
IdString get_tile_class(int x, int y);
|
|
Loc get_tile_io16_offs(int x, int y);
|
|
|
|
// pin functions: GCLKT_4, SSPI_CS, READY etc
|
|
IdStringList get_pin_funcs(BelId bel);
|
|
|
|
// Bels and pips
|
|
bool is_simple_io_bel(BelId bel);
|
|
Loc get_pair_iologic_bel(Loc loc);
|
|
BelId get_io_bel_from_iologic(BelId bel);
|
|
|
|
bool is_diff_io_supported(IdString type);
|
|
bool have_bottom_io_cnds(void);
|
|
IdString get_bottom_io_wire_a_net(int8_t condition);
|
|
IdString get_bottom_io_wire_b_net(int8_t condition);
|
|
|
|
// wires
|
|
inline bool is_wire_type_default(IdString wire_type) { return wire_type == IdString(); }
|
|
};
|
|
|
|
NEXTPNR_NAMESPACE_END
|
|
|
|
#endif
|