YRabbit 92694d7db7 Gowin. BUGFIX. Do not create missing wires. (#1418) ... Erroneously created wires for specific IOs on the underside of some chips. Fixes https://github.com/YosysHQ/nextpnr/issues/1417 Also cosmetic edits. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>		2025-01-12 08:12:06 +01:00
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CMakeLists.txt	gowin: Himbaechel. Add GW1NZ-1 BSRAM.	2023-11-26 13:08:09 +01:00
constids.inc	Gowin. Add the ability to place registers in IOB (#1403)	2025-01-01 13:11:57 +01:00
cst.cc	apicula: add support for magic sip pins (#1370)	2024-10-09 15:16:36 +02:00
cst.h	gowin: Himbaechel. Add constraint file processing.	2023-08-31 08:28:09 +02:00
globals.cc	Gowin. BUGFIX. Global clock routing. (#1410)	2024-12-31 10:31:03 +01:00
globals.h	gowin: Himbaechel. Add a clock router.	2023-08-31 08:28:09 +02:00
gowin_arch_gen.py	Gowin. BUGFIX. Do not create missing wires. (#1418)	2025-01-12 08:12:06 +01:00
gowin_utils.cc	Gowin. FFs placement. (#1386)	2024-10-22 12:49:44 +02:00
gowin_utils.h	Gowin. FFs placement. (#1386)	2024-10-22 12:49:44 +02:00
gowin.cc	Various fixes for clang/libc++ build (#1415)	2025-01-12 08:11:33 +01:00
gowin.h	Gowin. Add the ability to place registers in IOB (#1403)	2025-01-01 13:11:57 +01:00
pack.cc	Gowin. BUGFIX. Do not create missing wires. (#1418)	2025-01-12 08:12:06 +01:00
pack.h	gowin: Himbaechel. Add ALU.	2023-08-31 08:28:09 +02:00