200 lines
7.1 KiB
C++
200 lines
7.1 KiB
C++
/*
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* nextpnr -- Next Generation Place and Route
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*
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* Copyright (C) 2024 The Project Peppercorn Authors.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include <fstream>
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#include <boost/algorithm/string.hpp>
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#include "config.h"
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#include "gatemate.h"
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#define HIMBAECHEL_CONSTIDS "uarch/gatemate/constids.inc"
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#include "himbaechel_constids.h"
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NEXTPNR_NAMESPACE_BEGIN
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namespace {
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struct BitstreamBackend
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{
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Context *ctx;
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GateMateImpl *uarch;
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const std::string &device;
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std::ostream &out;
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BitstreamBackend(Context *ctx, GateMateImpl *uarch, const std::string &device, std::ostream &out)
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: ctx(ctx), uarch(uarch), device(device), out(out) {};
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void get_bitstream_tile(int x, int y, int &b_x, int &b_y)
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{
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// Edge blocks are bit bigger
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if (x == -2)
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x++;
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if (x == 163)
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x--;
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if (y == -2)
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y++;
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if (y == 131)
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y--;
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b_x = (x + 1) / 2;
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b_y = (y + 1) / 2;
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}
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std::vector<bool> int_to_bitvector(int val, int size)
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{
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std::vector<bool> bv;
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for (int i = 0; i < size; i++) {
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bv.push_back((val & (1 << i)) != 0);
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}
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return bv;
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}
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std::vector<bool> str_to_bitvector(std::string str, int size)
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{
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std::vector<bool> bv;
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bv.resize(size, 0);
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for (int i = 0; i < int(str.size()); i++) {
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char c = str.at((str.size() - i) - 1);
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NPNR_ASSERT(c == '0' || c == '1');
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bv.at(i) = (c == '1');
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}
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return bv;
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}
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CfgLoc getConfigLoc(Context *ctx, int tile)
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{
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int x0, y0;
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int bx, by;
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tile_xy(ctx->chip_info, tile, x0, y0);
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get_bitstream_tile(x0 - 2, y0 - 2, bx, by);
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CfgLoc loc;
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loc.die = 0;
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loc.x = bx;
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loc.y = by;
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return loc;
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}
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int getInTileIndex(Context *ctx, int tile)
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{
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int x0, y0;
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tile_xy(ctx->chip_info, tile, x0, y0);
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x0 -= 2 - 1;
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y0 -= 2 - 1;
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return (x0 % 2) * 2 + (y0 % 2) + 1;
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}
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void write_bitstream()
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{
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ChipConfig cc;
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cc.chip_name = device;
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cc.configs[0].add_word("GPIO.BANK_E1", int_to_bitvector(1, 1));
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cc.configs[0].add_word("GPIO.BANK_E2", int_to_bitvector(1, 1));
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cc.configs[0].add_word("GPIO.BANK_N1", int_to_bitvector(1, 1));
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cc.configs[0].add_word("GPIO.BANK_N2", int_to_bitvector(1, 1));
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cc.configs[0].add_word("GPIO.BANK_S1", int_to_bitvector(1, 1));
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cc.configs[0].add_word("GPIO.BANK_S2", int_to_bitvector(1, 1));
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cc.configs[0].add_word("GPIO.BANK_W1", int_to_bitvector(1, 1));
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cc.configs[0].add_word("GPIO.BANK_W2", int_to_bitvector(1, 1));
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for (auto &cell : ctx->cells) {
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CfgLoc loc = getConfigLoc(ctx, cell.second.get()->bel.tile);
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auto ¶ms = cell.second.get()->params;
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switch (cell.second->type.index) {
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case id_CC_IBUF.index:
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case id_CC_TOBUF.index:
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case id_CC_OBUF.index:
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case id_CC_IOBUF.index:
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case id_CC_LVDS_IBUF.index:
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case id_CC_LVDS_TOBUF.index:
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case id_CC_LVDS_OBUF.index:
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case id_CC_LVDS_IOBUF.index:
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for (auto &p : params) {
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cc.tiles[loc].add_word(stringf("GPIO.%s", p.first.c_str(ctx)), p.second.as_bits());
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}
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break;
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case id_CPE.index: {
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int x = getInTileIndex(ctx, cell.second.get()->bel.tile);
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for (auto &p : params) {
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cc.tiles[loc].add_word(stringf("CPE%d.%s", x, p.first.c_str(ctx)), p.second.as_bits());
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}
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} break;
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case id_BUFG.index:
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break;
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default:
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log_error("Unhandled cell %s of type %s\n", cell.second.get()->name.c_str(ctx),
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cell.second->type.c_str(ctx));
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}
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}
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for (auto &net : ctx->nets) {
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NetInfo *ni = net.second.get();
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if (ni->wires.empty())
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continue;
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std::set<std::string> nets;
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for (auto &w : ni->wires) {
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if (w.second.pip != PipId()) {
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PipId pip = w.second.pip;
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const auto extra_data = *reinterpret_cast<const GateMatePipExtraDataPOD *>(
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chip_pip_info(ctx->chip_info, pip).extra_data.get());
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if (extra_data.type == PipExtra::PIP_EXTRA_MUX && (extra_data.flags & MUX_VISIBLE)) {
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IdString name = IdString(extra_data.name);
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CfgLoc loc = getConfigLoc(ctx, pip.tile);
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std::string word = name.c_str(ctx);
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if (extra_data.flags & MUX_CONFIG) {
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cc.configs[loc.die].add_word(word, int_to_bitvector(extra_data.value, extra_data.bits));
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} else {
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int x = getInTileIndex(ctx, pip.tile);
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if (boost::starts_with(word, "IM."))
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boost::replace_all(word, "IM.", stringf("IM%d.", x));
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if (boost::starts_with(word, "OM."))
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boost::replace_all(word, "OM.", stringf("OM%d.", x));
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if (boost::starts_with(word, "IOES."))
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boost::replace_all(word, "IOES.", "IOES1.");
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if (boost::starts_with(word, "CPE."))
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boost::replace_all(word, "CPE.", stringf("CPE%d.", x));
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cc.tiles[loc].add_word(word, int_to_bitvector(extra_data.value, extra_data.bits));
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}
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}
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}
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}
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}
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out << cc;
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}
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};
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} // namespace
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void GateMateImpl::write_bitstream(const std::string &device, const std::string &filename)
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{
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std::ofstream out(filename);
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if (!out)
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log_error("failed to open file %s for writing (%s)\n", filename.c_str(), strerror(errno));
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BitstreamBackend be(ctx, this, device, out);
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be.write_bitstream();
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}
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bool GateMateImpl::read_bitstream(const std::string &device, const std::string &filename)
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{
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std::ifstream in(filename);
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if (!in)
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log_error("failed to open file %s for reading (%s)\n", filename.c_str(), strerror(errno));
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return false;
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}
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NEXTPNR_NAMESPACE_END
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