89 lines
1.9 KiB
C++
89 lines
1.9 KiB
C++
/*
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* nextpnr -- Next Generation Place and Route
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*
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* Copyright (C) 2018 Clifford Wolf <clifford@clifford.at>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#ifndef DESIGN_H
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#define DESIGN_H
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#ifndef NEXTPNR_H
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#error Include "design.h" via "nextpnr.h" only.
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#endif
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NEXTPNR_NAMESPACE_BEGIN
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struct CellInfo;
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struct PortRef
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{
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CellInfo *cell = nullptr;
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IdString port;
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};
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struct NetInfo
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{
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IdString name;
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PortRef driver;
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std::vector<PortRef> users;
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std::unordered_map<IdString, std::string> attrs;
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// wire -> uphill_pip
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std::unordered_map<WireId, PipId> wires;
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};
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enum PortType
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{
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PORT_IN = 0,
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PORT_OUT = 1,
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PORT_INOUT = 2
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};
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struct PortInfo
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{
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IdString name;
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NetInfo *net;
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PortType type;
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};
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struct CellInfo
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{
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IdString name, type;
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std::unordered_map<IdString, PortInfo> ports;
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std::unordered_map<IdString, std::string> attrs, params;
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BelId bel;
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// cell_port -> bel_pin
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std::unordered_map<IdString, IdString> pins;
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};
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struct Design
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{
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struct Chip chip;
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Design(ChipArgs args) : chip(args)
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{
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// ...
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}
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std::unordered_map<IdString, NetInfo *> nets;
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std::unordered_map<IdString, CellInfo *> cells;
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};
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NEXTPNR_NAMESPACE_END
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#endif
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