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examples
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himbaechel: Switch default back to router1 for now
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2023-11-17 09:09:59 +01:00 |
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gen
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himbaechel: Adding a xilinx uarch for xc7 with prjxray
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2023-11-14 17:12:09 +01:00 |
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meta@57de921663
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himbaechel: Adding a xilinx uarch for xc7 with prjxray
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2023-11-14 17:12:09 +01:00 |
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cells.cc
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himbaechel: Adding a xilinx uarch for xc7 with prjxray
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2023-11-14 17:12:09 +01:00 |
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CMakeLists.txt
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himbaechel: Adding a xilinx uarch for xc7 with prjxray
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2023-11-14 17:12:09 +01:00 |
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constids.inc
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himbaechel: Adding a xilinx uarch for xc7 with prjxray
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2023-11-14 17:12:09 +01:00 |
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extra_data.h
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himbaechel: Adding a xilinx uarch for xc7 with prjxray
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2023-11-14 17:12:09 +01:00 |
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fasm.cc
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himbaechel: Adding a xilinx uarch for xc7 with prjxray
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2023-11-14 17:12:09 +01:00 |
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pack_carry.cc
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himbaechel: Adding a xilinx uarch for xc7 with prjxray
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2023-11-14 17:12:09 +01:00 |
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pack_clocking.cc
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himbaechel: Adding a xilinx uarch for xc7 with prjxray
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2023-11-14 17:12:09 +01:00 |
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pack_dram.cc
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himbaechel: Adding a xilinx uarch for xc7 with prjxray
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2023-11-14 17:12:09 +01:00 |
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pack_dsp_xc7.cc
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Himbaechel xilinx : More cascaded input ports for which routing is skipped
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2024-09-24 12:06:56 +02:00 |
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pack_io.cc
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himbaechel: Adding a xilinx uarch for xc7 with prjxray
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2023-11-14 17:12:09 +01:00 |
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pack.cc
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Himbaechel xilinx : Add support of DSP packing for 7-series
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2024-09-24 12:06:56 +02:00 |
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pack.h
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himbaechel: Adding a xilinx uarch for xc7 with prjxray
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2023-11-14 17:12:09 +01:00 |
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pins.cc
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himbaechel: Adding a xilinx uarch for xc7 with prjxray
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2023-11-14 17:12:09 +01:00 |
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pins.h
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himbaechel: Adding a xilinx uarch for xc7 with prjxray
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2023-11-14 17:12:09 +01:00 |
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xdc.cc
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himbaechel: Adding a xilinx uarch for xc7 with prjxray
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2023-11-14 17:12:09 +01:00 |
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xilinx_place.cc
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himbaechel: Adding a xilinx uarch for xc7 with prjxray
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2023-11-14 17:12:09 +01:00 |
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xilinx.cc
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Himbaechel xilinx : Fix regex to parse Zynq device names
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2024-08-19 21:06:45 +01:00 |
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xilinx.h
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himbaechel: Adding a xilinx uarch for xc7 with prjxray
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2023-11-14 17:12:09 +01:00 |
