.. |
synth
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ecp5: Adding bitstream gen for pips and LUT init
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2018-07-11 10:42:09 +02:00 |
.gitignore
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ecp5: Adding complete binary blob writer to Trellis importer
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2018-07-11 10:41:36 +02:00 |
arch_pybindings.cc
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ecp5: Implementing core arch.h functions
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2018-07-11 10:41:36 +02:00 |
arch_pybindings.h
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ecp5: Implementing (at least stubs) most of arch.cc
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2018-07-11 10:41:36 +02:00 |
arch.cc
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ecp5: Adding bitstream gen for pips and LUT init
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2018-07-11 10:42:09 +02:00 |
arch.h
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ecp5: Adding bitstream gen for pips and LUT init
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2018-07-11 10:42:09 +02:00 |
archdefs.h
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ecp5: Fixing arch bugs
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2018-07-11 10:42:09 +02:00 |
bitstream.cc
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ecp5: Adding bitstream gen for slice config
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2018-07-11 10:42:09 +02:00 |
bitstream.h
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ecp5: Adding bitstream gen for pips and LUT init
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2018-07-11 10:42:09 +02:00 |
family.cmake
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ecp5: Make target device 45k on account of current hardware access
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2018-07-11 10:42:09 +02:00 |
main.cc
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ecp5: Adding bitstream gen for pips and LUT init
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2018-07-11 10:42:09 +02:00 |
pack.cc
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ecp5: Place design working, router now segfaults due to db issue
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2018-07-11 10:42:09 +02:00 |
pack.h
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ecp5: Place design working, router now segfaults due to db issue
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2018-07-11 10:42:09 +02:00 |
place_legaliser.cc
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ecp5: Implementing (at least stubs) most of arch.cc
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2018-07-11 10:41:36 +02:00 |
place_legaliser.h
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ecp5: Implementing (at least stubs) most of arch.cc
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2018-07-11 10:41:36 +02:00 |
portpins.inc
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ecp5: Begin planning data structures
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2018-07-11 10:40:16 +02:00 |
trellis_import.py
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ecp5: Adding tiletypes to database
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2018-07-11 10:42:09 +02:00 |