YRabbit d3b53d8e1a Gowin. PLL Pads. Fix the condition. ... Do not search for pads if the signal source for the PLL is something other than the IO pin - these are guaranteed to already be placed and have a bound Bel. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>		2024-04-09 10:15:42 +02:00
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CMakeLists.txt	gowin: Himbaechel. Add GW1NZ-1 BSRAM.	2023-11-26 13:08:09 +01:00
constids.inc	Gowin. Add PLL pads.	2024-04-09 10:15:42 +02:00
cst.cc	gowin: Himbaechel. Extend clock router	2023-09-08 09:15:35 +02:00
cst.h	gowin: Himbaechel. Add constraint file processing.	2023-08-31 08:28:09 +02:00
globals.cc	gowin: Add support for DSP primitives.	2024-03-22 09:47:10 +00:00
globals.h	gowin: Himbaechel. Add a clock router.	2023-08-31 08:28:09 +02:00
gowin_arch_gen.py	Gowin. Add PLL pads.	2024-04-09 10:15:42 +02:00
gowin_utils.cc	Gowin. Add PLL pads.	2024-04-09 10:15:42 +02:00
gowin_utils.h	Gowin. Add PLL pads.	2024-04-09 10:15:42 +02:00
gowin.cc	gowin: BUGFIX fix typo	2024-03-22 09:49:01 +00:00
gowin.h	Gowin. Add PLL pads.	2024-04-09 10:15:42 +02:00
pack.cc	Gowin. PLL Pads. Fix the condition.	2024-04-09 10:15:42 +02:00
pack.h	gowin: Himbaechel. Add ALU.	2023-08-31 08:28:09 +02:00