745 lines
8.6 KiB
C++
745 lines
8.6 KiB
C++
X(SLICE_LUTX)
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X(SLICE_FFX)
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X(F7MUX)
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X(F8MUX)
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X(F9MUX)
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X(CARRY4)
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X(CARRY8)
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X(CLEL_L)
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X(CLEL_R)
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X(CLEM)
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X(CLEM_R)
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X(CLBLL_L)
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X(CLBLL_R)
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X(CLBLM_L)
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X(CLBLM_R)
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X(A1)
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X(A2)
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X(A3)
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X(A4)
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X(A5)
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X(A6)
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X(CLK)
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X(DI1)
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X(DI2)
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X(SIN)
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X(WA1)
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X(WA2)
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X(WA3)
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X(WA4)
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X(WA5)
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X(WA6)
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X(WA7)
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X(WA8)
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X(WA9)
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X(WE)
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X(MC31)
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X(O5)
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X(O6)
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X(CE)
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X(CK)
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X(D)
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X(SR)
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X(Q)
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X(AX)
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X(BX)
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X(CIN)
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X(CX)
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X(DI0)
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X(DI3)
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X(DI4)
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X(DI5)
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X(DI6)
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X(DI7)
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X(DX)
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X(EX)
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X(FX)
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X(HX)
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X(S0)
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X(S1)
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X(S2)
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X(S3)
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X(S4)
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X(S5)
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X(S6)
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X(S7)
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X(CO0)
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X(CO1)
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X(CO2)
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X(CO3)
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X(CO4)
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X(CO5)
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X(CO6)
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X(CO7)
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X(O0)
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X(O1)
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X(O2)
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X(O3)
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X(O4)
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X(O7)
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X(OUT)
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X(PSEUDO_GND)
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X(PSEUDO_VCC)
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X(HARD0)
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X(Y)
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X(BRAM)
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X(RAMBFIFO36)
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X(RAMBFIFO18)
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X(RAMBFIFO18E2_RAMBFIFO18E2)
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X(RAMB18E2_RAMB18E2)
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X(FIFO18E2_FIFO18E2)
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X(RAMBFIFO36E2_RAMBFIFO36E2)
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X(RAMB36E2_RAMB36E2)
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X(FIFO36E2_FIFO36E2)
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X(BRAM_L)
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X(BRAM_R)
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X(RAMB18E1_RAMB18E1)
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X(FIFO18E1_FIFO18E1)
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X(RAMBFIFO36E1_RAMBFIFO36E1)
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X(RAMB36E1_RAMB36E1)
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X(FIFO36E1_FIFO36E1)
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X(URAM288)
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X(BEL_URAM288)
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X(URAM_URAM_FT)
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X(URAM_URAM_DELAY_FT)
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X(DSP)
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X(DSP48E2)
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X(DSP_PREADD)
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X(DSP_PREADD_DATA)
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X(DSP_A_B_DATA)
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X(DSP_MULTIPLIER)
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X(DSP_M_DATA)
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X(DSP_ALU)
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X(DSP_OUTPUT)
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X(DSP_C_DATA)
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X(DSP_L)
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X(DSP_R)
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X(DSP48E1)
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X(DSP48E1_DSP48E1)
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X(HPIO_L)
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X(XIPHY_BYTE_L)
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X(BITSLICE_COMPONENT_RX_TX)
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X(OUT_FF)
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X(ODELAYE3)
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X(OSERDESE3)
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X(IDELAYE3)
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X(ISERDESE3)
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X(IN_FF)
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X(LIOB33)
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X(RIOB33)
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X(IOB33M)
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X(IOB33S)
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X(IOB33)
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X(IPAD)
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X(PAD)
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X(IOB33M_OUTBUF)
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X(IOB33S_OUTBUF)
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X(IOB33_OUTBUF)
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X(IOB33M_INBUF_EN)
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X(IOB33S_INBUF_EN)
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X(IOB33_INBUF_EN)
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X(IOB33M_TERM_OVERRIDE)
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X(IOB33S_TERM_OVERRIDE)
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X(IOB33_TERM_OVERRIDE)
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X(PULL_OR_KEEP1)
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X(IDELAYE2)
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X(IDELAYE2_IDELAYE2)
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X(OLOGICE3)
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X(OLOGICE3_TFF)
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X(OLOGICE3_OUTFF)
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X(OLOGICE3_MISR)
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X(OSERDESE2)
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X(OSERDESE2_OSERDESE2)
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X(ILOGICE3)
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X(ILOGICE3_IFF)
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X(ILOGICE3_ZHOLD_DELAY)
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X(ISERDESE2)
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X(ISERDESE2_ISERDESE2)
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X(BUFR_BUFR)
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X(BUFIO_BUFIO)
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X(IDELAYCTRL_IDELAYCTRL)
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X(PLL_SELECT_BEL)
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X(PLL)
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X(PLL_PLL_TOP)
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X(MMCM)
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X(MMCM_MMCM_TOP)
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X(BUFGCE)
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X(BUFGCE_DIV)
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X(BUFCE_BUFG_PS)
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X(CMT_L)
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X(INTENT_DEFAULT)
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X(NODE_OUTPUT)
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X(NODE_DEDICATED)
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X(NODE_GLOBAL_VDISTR)
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X(NODE_GLOBAL_HROUTE)
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X(NODE_GLOBAL_HDISTR)
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X(NODE_PINFEED)
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X(NODE_PINBOUNCE)
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X(NODE_LOCAL)
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X(NODE_HLONG)
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X(NODE_SINGLE)
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X(NODE_DOUBLE)
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X(NODE_HQUAD)
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X(NODE_VLONG)
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X(NODE_VQUAD)
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X(NODE_OPTDELAY)
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X(NODE_GLOBAL_VROUTE)
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X(NODE_GLOBAL_LEAF)
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X(NODE_GLOBAL_BUFG)
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X(NODE_LAGUNA_DATA)
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X(NODE_CLE_OUTPUT)
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X(NODE_INT_INTERFACE)
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X(NODE_LAGUNA_OUTPUT)
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X(BENTQUAD)
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X(BOUNCEACROSS)
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X(BOUNCEIN)
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X(BUFGROUT)
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X(BUFINP2OUT)
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X(CLKPIN)
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X(DOUBLE)
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X(GENERIC)
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X(GLOBAL)
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X(HLONG)
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X(HQUAD)
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X(HVCCGNDOUT)
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X(INPUT)
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X(IOBIN2OUT)
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X(IOBINPUT)
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X(IOBOUTPUT)
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X(LUTINPUT)
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X(OPTDELAY)
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X(OUTBOUND)
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X(OUTPUT)
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X(PADINPUT)
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X(PADOUTPUT)
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X(PINBOUNCE)
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X(PINFEED)
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X(PINFEEDR)
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X(REFCLK)
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X(SINGLE)
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X(SLOWSINGLE)
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X(SVLONG)
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X(VLONG)
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X(VLONG12)
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X(VQUAD)
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X(INTENT_SITE_WIRE)
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X(INTENT_SITE_GND)
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X(IOB_IBUFCTRL)
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X(IOB_INBUF)
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X(IOB_OUTBUF)
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X(IOB_PAD)
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X(TRIBUF)
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X(BUFGCTRL)
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X(BUFGCE_DIV_BUFGCE_DIV)
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X(BUFCE_BUFCE)
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X(PS7)
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X(PS7_PS7)
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X(0)
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X(1)
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X(A)
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X(A0)
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X(ADDRARDADDRL15)
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X(ADDRATIEHIGH0)
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X(ADDRATIEHIGH1)
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X(ADDRBTIEHIGH0)
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X(ADDRBTIEHIGH1)
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X(ADDRBWRADDRL15)
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X(AREG)
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X(BEL)
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X(BITSLICE_CONTROL_BEL)
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X(BREG)
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X(BUFG)
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X(BUFG_BUFG)
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X(BUFG_PS)
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X(BUFHCE)
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X(BUFMRCE)
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X(C)
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X(CARRYIN)
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X(CARRY_TYPE)
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X(CARRYCASCIN)
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X(CARRYCASCOUT)
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X(CB)
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X(CDDCREQ)
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X(CE0)
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X(CE1)
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X(CEA1)
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X(CEA2)
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X(CEAD)
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X(CEALUMODE)
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X(CEB1)
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X(CEB2)
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X(CEC)
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X(CECARRYIN)
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X(CECTRL)
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X(CED)
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X(CEINMODE)
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X(CEM)
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X(CEP)
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X(CFGLUT5)
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X(CI)
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X(CINVCTRL)
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X(CINVCTRL_SEL)
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X(CKB)
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X(CK_C)
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X(CLKARDCLK)
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X(CLKB)
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X(CLKBWRCLK)
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X(CLKDIV)
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X(CLKDIVP)
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X(CLKFBIN)
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X(CLKIN)
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X(CLKIN1)
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X(CLKIN2)
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X(CLKINSEL)
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X(CLKRSVD0)
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X(CLKRSVD1)
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X(CLK_B)
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X(CLK_EXT)
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X(CLR)
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X(COMPENSATION)
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X(CONVSTCLK)
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X(CPLLLOCKDETCLK)
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X(CYINIT)
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X(D1)
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X(D2)
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X(D3)
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X(D4)
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X(D5)
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X(D6)
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X(D7)
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X(D8)
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X(DATAOUT)
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X(DATA_RATE)
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X(DATA_RATE_OQ)
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X(DATA_RATE_TQ)
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X(DATA_WIDTH)
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X(DCITERMDISABLE)
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X(DCLK)
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X(DDLY)
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X(DDR_CLK_EDGE)
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X(DELAY_SRC)
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X(DEN)
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X(DI)
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X(DIADI0)
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X(DIADI1)
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X(DIBDI0)
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X(DIBDI1)
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X(DIFFINBUF)
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X(DIFFI_IN)
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X(DIFF_IN_N)
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X(DIFF_IN_P)
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X(DIPADIP0)
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X(DIPADIP1)
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X(DIPBDIP0)
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X(DIPBDIP1)
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X(DLY_TEST_IN)
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X(DMONITORCLK)
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X(DOA_REG)
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X(DOB_REG)
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X(DPO)
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X(DRIVE)
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X(DRPCLK)
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X(DWE)
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X(E)
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X(ECCPIPECE)
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X(ECCPIPECEL)
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X(ENARDEN)
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X(ENBWREN)
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X(EN_A)
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X(EN_B)
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X(EN_VTC)
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X(FDCE)
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X(FDCE_1)
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X(FDPE)
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X(FDPE_1)
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X(FDRE)
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X(FDRE_1)
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X(FDSE)
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X(FDSE_1)
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X(FIFO18E1)
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X(FIFO18E2)
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X(FIFO36E1)
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X(FIFO36E2)
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X(G)
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X(GND)
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X(GTGREFCLK)
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X(GTGREFCLK0)
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X(GTGREFCLK1)
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X(GTHE2_CHANNEL)
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X(GTHE2_COMMON)
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X(GTPE2_CHANNEL)
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X(GTPE2_COMMON)
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X(GTXE2_CHANNEL)
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X(GTXE2_COMMON)
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X(HARD_SYNC)
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X(HCLK_IOI)
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X(HCLK_IOI3)
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X(HIGH_PERFORMANCE_MODE)
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X(HPIO_OUTINV)
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X(HPIO_RIGHT)
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X(HPIO_VREF)
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X(I)
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X(I0)
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X(I1)
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X(I2)
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X(I3)
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X(I4)
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X(I5)
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X(IB)
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X(IBUF)
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X(IBUFCTRL)
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X(IBUFDISABLE)
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X(IBUFDS)
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X(IBUFDSE3)
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X(IBUFDS_DIFF_OUT)
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X(IBUFDS_DIFF_OUT_IBUFDISABLE)
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X(IBUFDS_DIFF_OUT_INTERMDISABLE)
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X(IBUFDS_GTE3)
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X(IBUFDS_GTE4)
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X(IBUFDS_INTERMDISABLE)
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X(IBUFDS_INTERMDISABLE_INT)
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X(IBUFE3)
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X(IBUF_ANALOG)
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X(IBUF_IBUFDISABLE)
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X(IBUF_INTERMDISABLE)
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X(IDATAIN)
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X(IDDR)
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X(IDDRE1)
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X(IDDR_2CLK)
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X(IDELAYCTRL)
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X(IDELAY_TYPE)
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X(IDELAY_VALUE)
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X(IFD_CE)
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X(IGNORE0)
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X(IGNORE1)
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X(IN)
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X(INBUF)
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X(INIT)
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X(INIT_OQ)
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X(INIT_OUT)
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X(INIT_Q1)
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X(INIT_Q2)
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X(INIT_TQ)
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X(INJECTDBITERR)
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X(INJECTSBITERR)
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X(INTENT)
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X(INTERFACE_TYPE)
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X(INTERMDISABLE)
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X(INV)
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X(INVERTER)
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X(IN_TERM)
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X(IO)
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X(IOB)
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X(IOB18M_OUTBUF_DCIEN)
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X(IOB18_INBUF_DCIEN)
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X(IOB18_OUTBUF_DCIEN)
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X(IOBDELAY)
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X(IOBUF)
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X(IOBUFDS)
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X(IOBUFDSE3)
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X(IOBUFDS_DCIEN)
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X(IOBUFDS_DIFF_OUT)
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X(IOBUFDS_DIFF_OUT_DCIEN)
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X(IOBUFDS_DIFF_OUT_INTERMDISABLE)
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X(IOBUFE3)
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X(IOBUF_DCIEN)
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X(IOBUF_INTERMDISABLE)
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X(IOB_DIFFINBUF)
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X(IOB_DIFFI_IN0)
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X(IOB_O0)
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X(IOB_O_IN1)
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X(IOB_O_OUT0)
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X(IOB_PADOUT1)
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X(IOB_T0)
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X(IOB_T_IN1)
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X(IOB_T_OUT0)
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X(IOL_IDDR)
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X(IOL_OPTFF)
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X(IOSTANDARD)
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X(IS_CARRYIN_INVERTED)
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X(IS_CE0_INVERTED)
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X(IS_CE1_INVERTED)
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X(IS_CLKINSEL_INVERTED)
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X(IS_CLK_INVERTED)
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X(IS_CLR_INVERTED)
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X(IS_C_INVERTED)
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X(IS_DATAIN_INVERTED)
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X(IS_D_INVERTED)
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X(IS_IDATAIN_INVERTED)
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X(IS_IGNORE0_INVERTED)
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X(IS_IGNORE1_INVERTED)
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X(IS_OCLK_INVERTED)
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X(IS_ODATAIN_INVERTED)
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X(IS_PRE_INVERTED)
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X(IS_PWRDWN_INVERTED)
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X(IS_RST_INVERTED)
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X(IS_R_INVERTED)
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X(IS_S0_INVERTED)
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X(IS_S1_INVERTED)
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X(IS_SR_INVERTED)
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X(IS_S_INVERTED)
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X(IS_WCLK_INVERTED)
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X(LDCE)
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X(LDPE)
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X(LDPIPEEN)
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X(LI)
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X(LOAD)
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X(LOC)
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X(LUT1)
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X(LUT2)
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X(LUT3)
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X(LUT4)
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X(LUT5)
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X(LUT6)
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X(LUT6_2)
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X(LUT_OR_MEM5LRAM)
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X(LUT_OR_MEM6LRAM)
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X(MMCME2_ADV)
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X(MMCME2_ADV_MMCME2_ADV)
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X(MMCME2_BASE)
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X(MMCME3_ADV)
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X(MMCME3_BASE)
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X(MMCME4_ADV)
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X(MMCME4_BASIC)
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X(MULTSIGNIN)
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X(MULTSIGNOUT)
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X(MUXCY)
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X(MUXF7)
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X(MUXF8)
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X(MUXF9)
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X(MUX_TREE_ROOT)
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X(NUM_CE)
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X(O)
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X(OB)
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X(OBUF)
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|
X(OBUFDS)
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|
X(OBUFDS_GTE3)
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|
X(OBUFDS_GTE3_ADV)
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|
X(OBUFDS_GTE4)
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|
X(OBUFDS_GTE4_ADV)
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|
X(OBUFT)
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|
X(OBUFTDS)
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|
X(OBUFT_DCIEN)
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|
X(OCE)
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|
X(OCLK)
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|
X(OCLKB)
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|
X(ODATAIN)
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|
X(ODDR)
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|
X(ODDRE1)
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|
X(ODDR_MODE)
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|
X(ODELAYE2)
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|
X(ODELAYE2_ODELAYE2)
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|
X(ODELAY_TYPE)
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|
X(ODELAY_VALUE)
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|
X(OFB)
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|
X(OFD_CE)
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|
X(OLOGICE2_TFF)
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|
X(OLOGICE2_OUTFF)
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|
X(OQ)
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|
X(OR2L)
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|
X(OSC_EN)
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|
X(OSERDES_T_BYPASS)
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|
X(O_B)
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|
X(PACKAGE_PIN)
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|
X(PHASER_IN)
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|
X(PHASER_IN_PHY)
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|
X(PHASER_OUT)
|
|
X(PHASER_OUT_PHY)
|
|
X(PHASER_REF)
|
|
X(PIP)
|
|
X(PIPE_SEL)
|
|
X(PLL0LOCKDETCLK)
|
|
X(PLL1LOCKDETCLK)
|
|
X(PLLE2_ADV)
|
|
X(PLLE2_ADV_PLLE2_ADV)
|
|
X(PLLE2_BASE)
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|
X(PLLE3_ADV)
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|
X(PLLE3_BASE)
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|
X(PLLE4_ADV)
|
|
X(PLLE4_BASIC)
|
|
X(PRE)
|
|
X(PS8)
|
|
X(PSCLK)
|
|
X(PSEN)
|
|
X(PSEUDO_GND_WIRE_GLBL)
|
|
X(PSEUDO_GND_WIRE_ROW)
|
|
X(PSEUDO_VCC_WIRE_GLBL)
|
|
X(PSEUDO_VCC_WIRE_ROW)
|
|
X(PSINCDEC)
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|
X(PSS_ALTO_CORE)
|
|
X(PULLTYPE)
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|
X(PWRDWN)
|
|
X(Q0)
|
|
X(Q1)
|
|
X(Q2)
|
|
X(QPLLLOCKDETCLK)
|
|
X(R)
|
|
X(RADR0)
|
|
X(RADR1)
|
|
X(RADR2)
|
|
X(RADR3)
|
|
X(RADR4)
|
|
X(RADR5)
|
|
X(RAM128X1D)
|
|
X(RAM128X1S)
|
|
X(RAM256X1D)
|
|
X(RAM256X1S)
|
|
X(RAM32M)
|
|
X(RAM32M16)
|
|
X(RAM32X1D)
|
|
X(RAM32X1S)
|
|
X(RAM32X2S)
|
|
X(RAM512X1D)
|
|
X(RAM512X1S)
|
|
X(RAM64M)
|
|
X(RAM64M8)
|
|
X(RAM64X1D)
|
|
X(RAM64X1S)
|
|
X(RAM64X8SW)
|
|
X(RAMB18E1)
|
|
X(RAMB18E2)
|
|
X(RAMB36E1)
|
|
X(RAMB36E2)
|
|
X(RAMD32)
|
|
X(RAMD64E)
|
|
X(RDB_WR_A)
|
|
X(RDB_WR_B)
|
|
X(RDCLK)
|
|
X(RDEN)
|
|
X(RDY)
|
|
X(REGCEAREGCE)
|
|
X(REGCEB)
|
|
X(REGRST)
|
|
X(RIU_NIBBLE_SEL)
|
|
X(RST)
|
|
X(RSTA)
|
|
X(RSTALLCARRYIN)
|
|
X(RSTALUMODE)
|
|
X(RSTB)
|
|
X(RSTC)
|
|
X(RSTCTRL)
|
|
X(RSTD)
|
|
X(RSTINMODE)
|
|
X(RSTM)
|
|
X(RSTP)
|
|
X(RSTRAMARSTRAM)
|
|
X(RSTRAMB)
|
|
X(RSTREG)
|
|
X(RSTREGARSTREG)
|
|
X(RSTREGB)
|
|
X(RST_A)
|
|
X(RST_B)
|
|
X(RST_DLY)
|
|
X(RST_DLY_EXT)
|
|
X(RXTX_BITSLICE)
|
|
X(RXUSRCLK)
|
|
X(RXUSRCLK2)
|
|
X(RX_BITSLICE)
|
|
X(RX_CLK)
|
|
X(RX_RST)
|
|
X(RX_RST_DLY)
|
|
X(S)
|
|
X(SELMUX2_1)
|
|
X(SERDES_MODE)
|
|
X(SIGVALIDCLK)
|
|
X(SLEEP)
|
|
X(SLEW)
|
|
X(SPO)
|
|
X(SRI)
|
|
X(SRL16E)
|
|
X(SRLC32E)
|
|
X(SRTYPE)
|
|
X(SRVAL_OQ)
|
|
X(SRVAL_TQ)
|
|
X(SYSMONE1)
|
|
X(SYSMONE4)
|
|
X(T)
|
|
X(T1)
|
|
X(T2)
|
|
X(T3)
|
|
X(T4)
|
|
X(TBYTE_IN0)
|
|
X(TBYTE_IN1)
|
|
X(TBYTE_IN2)
|
|
X(TBYTE_IN3)
|
|
X(TCE)
|
|
X(TQ)
|
|
X(TRI)
|
|
X(TXPHDLYTSTCLK)
|
|
X(TXUSRCLK)
|
|
X(TXUSRCLK2)
|
|
X(TX_BITSLICE)
|
|
X(TX_BITSLICE_TRI)
|
|
X(TX_BIT_CTRL_OUT0)
|
|
X(TX_CLK)
|
|
X(TX_RST)
|
|
X(TX_RST_DLY)
|
|
X(T_OUT)
|
|
X(URAM288_BASE)
|
|
X(USE_DPORT)
|
|
X(VCC)
|
|
X(VREF)
|
|
X(VTC_RDY)
|
|
X(WCLK)
|
|
X(WEA0)
|
|
X(WEA1)
|
|
X(WEA2)
|
|
X(WEA3)
|
|
X(WRCLK)
|
|
X(WREN)
|
|
X(WRITE_WIDTH_A)
|
|
X(WRITE_WIDTH_B)
|
|
X(XADC)
|
|
X(XORCY)
|
|
X(X_FFSYNC)
|
|
X(X_FF_AS_LATCH)
|
|
X(X_IOB_SITE_TYPE)
|
|
X(X_IO_BEL)
|
|
X(X_IO_DIR)
|
|
X(X_LUT_AS_DRAM)
|
|
X(X_LUT_AS_SRL)
|
|
X(X_ORIG_MACRO_PRIM)
|
|
X(X_ORIG_PORT_DIADI1)
|
|
X(X_ORIG_PORT_DIBDI1)
|
|
X(X_ORIG_PORT_O5)
|
|
X(X_ORIG_PORT_O6)
|
|
X(X_ORIG_PORT_SR)
|
|
X(X_ORIG_TYPE)
|
|
X(placer)
|
|
X(route)
|
|
X(router)
|
|
X(step)
|
|
X(xilinx)
|