836 lines
26 KiB
C++
836 lines
26 KiB
C++
/*
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* nextpnr -- Next Generation Place and Route
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*
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* Copyright (C) 2021 Symbiflow Authors
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*
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#ifndef SITE_ARCH_H
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#define SITE_ARCH_H
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#include <cstdint>
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#include <unordered_set>
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#include <vector>
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#include "PhysicalNetlist.capnp.h"
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#include "arch_iterators.h"
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#include "chipdb.h"
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#include "hash_table.h"
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#include "log.h"
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#include "nextpnr_namespaces.h"
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#include "nextpnr_types.h"
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NEXTPNR_NAMESPACE_BEGIN
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struct Context;
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struct SiteInformation
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{
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const Context *ctx;
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const int32_t tile;
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const int32_t tile_type;
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const int32_t site;
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const std::unordered_set<CellInfo *> &cells_in_site;
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SiteInformation(const Context *ctx, int32_t tile, int32_t site,
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const std::unordered_set<CellInfo *> &cells_in_site);
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inline const ChipInfoPOD &chip_info() const NPNR_ALWAYS_INLINE;
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inline bool is_wire_in_site(WireId wire) const NPNR_ALWAYS_INLINE;
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inline bool is_bel_in_site(BelId bel) const NPNR_ALWAYS_INLINE;
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inline bool is_pip_part_of_site(PipId pip) const NPNR_ALWAYS_INLINE;
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inline bool is_site_port(PipId pip) const NPNR_ALWAYS_INLINE;
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};
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// Site routing needs a modification of the routing graph. Within the site,
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// the arch can be consulted for edges. However the rest of the routing graph
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// needs to be reduced for analysis purposes. Wires within the site are
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// SITE_WIRE's. 4 additional nodes are introduced to model out of site
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// routing:
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// - OUT_OF_SITE_SOURCE / OUT_OF_SITE_SINK
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// - These represent net sources and sinks that are only reachable via the
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// routing graph (e.g. outside of the site).
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// - SITE_PORT_SOURCE / SITE_PORT_SINK
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// - These represent the routing resources connected to other side of site
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// ports.
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//
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// The non-site wire graph is connected like:
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//
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// ┌─────────────────┐ ┌────────────────────┐
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// │ │ │ │
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// │ OUT_OF_SITE_SRC │ │ OUT_OF_SITE_SINK │◄────┐
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// │ │ │ │ │
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// └┬────────────────┘ └────────────────────┘ │
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// │ │
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// │ ┌─────────────────────────────────────────────────────┤
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// │ │ │
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// │ │ │
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// │ │ │
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// │ │ │
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// │ ▼ │
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// │ ┌─────────────────┐ ┌─────────────┐ ┌────────────────┐ │
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// │ │ │ │ │ │ │ │
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// └─────►│ SITE_PORT_SRC ├──►│ Site ├──────►│ SITE_PORT_SINK ├──┘
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// │ │ │ │ │ │
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// └─────────────────┘ └─────────────┘ └────────────────┘
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//
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struct SiteWire
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{
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enum Type
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{
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// This wire is just a plain site wire.
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SITE_WIRE = 0,
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// This wire is a source that is from outside of the site.
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OUT_OF_SITE_SOURCE = 1,
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// This wire is a sink that is from outside of the site.
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OUT_OF_SITE_SINK = 2,
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// This wire is the routing graph wire on the dst side of a site port.
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SITE_PORT_SINK = 3,
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// This wire is the routing graph wire on the src side of a site port.
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SITE_PORT_SOURCE = 4,
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NUMBER_SITE_WIRE_TYPES = 5,
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};
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static inline SiteWire make(const SiteInformation *site_info, WireId site_wire) NPNR_ALWAYS_INLINE;
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static SiteWire make(const SiteInformation *site_info, PortType port_type, NetInfo *net) NPNR_ALWAYS_INLINE
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{
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SiteWire out;
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if (port_type == PORT_OUT) {
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out.type = OUT_OF_SITE_SOURCE;
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out.net = net;
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} else {
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out.type = OUT_OF_SITE_SINK;
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out.net = net;
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}
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return out;
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}
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static inline SiteWire make_site_port(const SiteInformation *site_info, PipId pip, bool dst_wire);
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bool operator==(const SiteWire &other) const
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{
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return wire == other.wire && type == other.type && pip == other.pip && net == other.net;
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}
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bool operator!=(const SiteWire &other) const
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{
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return wire != other.wire || type != other.type || pip != other.pip || net != other.net;
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}
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bool operator<(const SiteWire &other) const
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{
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return std::make_tuple(type, wire, pip, net) < std::make_tuple(other.type, other.wire, other.pip, other.net);
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}
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Type type = NUMBER_SITE_WIRE_TYPES;
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WireId wire;
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PipId pip;
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NetInfo *net = nullptr;
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};
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struct SitePip
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{
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enum Type
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{
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// This is a plain regular site pip.
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SITE_PIP = 0,
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// This pip is a site port, and connects a SITE_WIRE to a SITE_PORT_SINK/SITE_PORT_SRC
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SITE_PORT = 1,
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// This pip connects a OUT_OF_SITE_SOURCE to a SITE_PORT_SRC
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SOURCE_TO_SITE_PORT = 2,
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// This pip connects a SITE_PORT_SINK to a OUT_OF_SITE_SINK
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SITE_PORT_TO_SINK = 3,
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// This pip connects a SITE_PORT_SINK to a SITE_PORT_SRC.
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SITE_PORT_TO_SITE_PORT = 4,
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INVALID_TYPE = 5,
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};
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static inline SitePip make(const SiteInformation *site_info, PipId pip);
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static SitePip make(const SiteInformation *site_info, SiteWire src, PipId dst)
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{
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NPNR_ASSERT(src.type == SiteWire::OUT_OF_SITE_SOURCE);
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SitePip out;
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out.type = SOURCE_TO_SITE_PORT;
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out.pip = dst;
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out.wire = src;
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return out;
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}
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static SitePip make(const SiteInformation *site_info, PipId src, SiteWire dst)
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{
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NPNR_ASSERT(dst.type == SiteWire::OUT_OF_SITE_SINK);
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SitePip out;
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out.type = SITE_PORT_TO_SINK;
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out.pip = src;
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out.wire = dst;
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return out;
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}
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static SitePip make(const SiteInformation *site_info, PipId src_pip, PipId dst_pip)
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{
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SitePip out;
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out.type = SITE_PORT_TO_SITE_PORT;
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out.pip = src_pip;
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out.other_pip = dst_pip;
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return out;
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}
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Type type = INVALID_TYPE;
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// For SITE_PORT_TO_SITE_PORT connections, pip is the site -> routing pip.
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PipId pip;
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SiteWire wire;
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// For SITE_PORT_TO_SITE_PORT connections, other_pip is the routing ->
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// site pip.
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PipId other_pip;
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bool operator==(const SitePip &other) const
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{
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return type == other.type && pip == other.pip && wire == other.wire && other_pip == other.other_pip;
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}
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bool operator!=(const SitePip &other) const
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{
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return type != other.type || pip != other.pip || wire != other.wire || other_pip != other.other_pip;
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}
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};
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NEXTPNR_NAMESPACE_END
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template <> struct std::hash<NEXTPNR_NAMESPACE_PREFIX SiteWire>
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{
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std::size_t operator()(const NEXTPNR_NAMESPACE_PREFIX SiteWire &site_wire) const noexcept
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{
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std::size_t seed = 0;
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boost::hash_combine(seed, std::hash<NEXTPNR_NAMESPACE_PREFIX SiteWire::Type>()(site_wire.type));
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boost::hash_combine(seed, std::hash<NEXTPNR_NAMESPACE_PREFIX WireId>()(site_wire.wire));
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boost::hash_combine(seed, std::hash<NEXTPNR_NAMESPACE_PREFIX PipId>()(site_wire.pip));
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boost::hash_combine(seed, std::hash<NEXTPNR_NAMESPACE_PREFIX NetInfo *>()(site_wire.net));
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return seed;
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}
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};
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template <> struct std::hash<NEXTPNR_NAMESPACE_PREFIX SitePip>
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{
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std::size_t operator()(const NEXTPNR_NAMESPACE_PREFIX SitePip &site_pip) const noexcept
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{
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std::size_t seed = 0;
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boost::hash_combine(seed, std::hash<NEXTPNR_NAMESPACE_PREFIX SitePip::Type>()(site_pip.type));
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boost::hash_combine(seed, std::hash<NEXTPNR_NAMESPACE_PREFIX PipId>()(site_pip.pip));
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boost::hash_combine(seed, std::hash<NEXTPNR_NAMESPACE_PREFIX SiteWire>()(site_pip.wire));
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boost::hash_combine(seed, std::hash<NEXTPNR_NAMESPACE_PREFIX PipId>()(site_pip.other_pip));
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return seed;
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}
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};
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NEXTPNR_NAMESPACE_BEGIN
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struct SitePipDownhillRange;
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struct SitePipUphillRange;
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struct SiteWireRange;
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struct SiteNetInfo;
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struct SitePipMap
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{
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SitePip pip;
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size_t count;
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};
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struct SiteNetMap
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{
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SiteNetInfo *net;
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size_t count;
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};
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struct SiteNetInfo
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{
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NetInfo *net;
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SiteWire driver;
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HashTables::HashSet<SiteWire> users;
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HashTables::HashMap<SiteWire, SitePipMap> wires;
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};
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struct SiteArch
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{
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const Context *const ctx;
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const SiteInformation *const site_info;
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HashTables::HashMap<NetInfo *, SiteNetInfo> nets;
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HashTables::HashMap<SiteWire, SiteNetMap> wire_to_nets;
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NetInfo blocking_net;
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SiteNetInfo blocking_site_net;
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std::vector<PipId> input_site_ports;
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std::vector<PipId> output_site_ports;
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std::vector<SiteWire> out_of_site_sources;
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std::vector<SiteWire> out_of_site_sinks;
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SiteArch(const SiteInformation *site_info);
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inline SiteWire getPipSrcWire(const SitePip &site_pip) const NPNR_ALWAYS_INLINE;
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inline SiteWire getPipDstWire(const SitePip &site_pip) const NPNR_ALWAYS_INLINE;
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// Does this site pip always invert its signal?
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inline bool isInverting(const SitePip &site_pip) const NPNR_ALWAYS_INLINE;
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// Can this site pip optional invert its signal?
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inline bool canInvert(const SitePip &site_pip) const NPNR_ALWAYS_INLINE;
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// For a site port, returns the preferred constant net type.
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//
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// If no preference, then NetType is SIGNAL.
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inline PhysicalNetlist::PhysNetlist::NetType prefered_constant_net_type(const SitePip &site_pip) const;
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inline SitePipDownhillRange getPipsDownhill(const SiteWire &site_wire) const NPNR_ALWAYS_INLINE;
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inline SitePipUphillRange getPipsUphill(const SiteWire &site_wire) const NPNR_ALWAYS_INLINE;
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SiteWireRange getWires() const;
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inline SiteWire getBelPinWire(BelId bel, IdString pin) const NPNR_ALWAYS_INLINE;
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inline PortType getBelPinType(BelId bel, IdString pin) const NPNR_ALWAYS_INLINE;
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const char *nameOfWire(const SiteWire &wire) const;
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const char *nameOfPip(const SitePip &pip) const;
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const char *nameOfNet(const SiteNetInfo *net) const;
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bool debug() const;
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bool bindWire(const SiteWire &wire, SiteNetInfo *net)
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{
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auto result = wire_to_nets.emplace(wire, SiteNetMap{net, 1});
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if (result.first->second.net != net) {
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if (debug()) {
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log_info("Net conflict binding wire %s to net %s, conflicts with net %s\n", nameOfWire(wire),
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nameOfNet(net), nameOfNet(result.first->second.net));
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}
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return false;
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}
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if (!result.second) {
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result.first->second.count += 1;
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}
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return true;
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}
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SiteNetInfo *unbindWire(const SiteWire &wire)
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{
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auto iter = wire_to_nets.find(wire);
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NPNR_ASSERT(iter != wire_to_nets.end());
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NPNR_ASSERT(iter->second.count >= 1);
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SiteNetInfo *net = iter->second.net;
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iter->second.count -= 1;
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if (iter->second.count == 0) {
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wire_to_nets.erase(iter);
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}
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return net;
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}
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bool bindPip(const SitePip &pip, SiteNetInfo *net);
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void unbindPip(const SitePip &pip);
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void archcheck();
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bool is_pip_synthetic(const SitePip &pip) const NPNR_ALWAYS_INLINE;
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SyntheticType pip_synthetic_type(const SitePip &pip) const NPNR_ALWAYS_INLINE;
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};
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struct SitePipDownhillIterator
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{
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enum DownhillIteratorState
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{
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// Initial state
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BEGIN = 0,
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// Iterating over normal pips.
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NORMAL_PIPS = 1,
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// Iterating off all site port sources.
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PORT_SINK_TO_PORT_SRC = 2,
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// Iterating over out of site sinks.
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OUT_OF_SITE_SINKS = 3,
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// Iterating off all site port sources.
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OUT_OF_SITE_SOURCE_TO_PORT_SRC = 4,
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SITE_PORT = 5,
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END = 6,
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NUMBER_STATES = 7,
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};
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DownhillIteratorState state = BEGIN;
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const SiteArch *site_arch;
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SiteWire site_wire;
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const RelSlice<int32_t> *pips_downhill;
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size_t cursor;
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bool advance_in_state() NPNR_ALWAYS_INLINE
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{
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switch (state) {
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case BEGIN:
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return false;
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case NORMAL_PIPS:
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++cursor;
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return (cursor < pips_downhill->size());
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case PORT_SINK_TO_PORT_SRC:
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++cursor;
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return (cursor < site_arch->input_site_ports.size());
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case OUT_OF_SITE_SINKS:
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++cursor;
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return (cursor < site_arch->out_of_site_sinks.size());
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case OUT_OF_SITE_SOURCE_TO_PORT_SRC:
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++cursor;
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return (cursor < site_arch->input_site_ports.size());
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case SITE_PORT:
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++cursor;
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return false;
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default:
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// Unreachable!
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NPNR_ASSERT(false);
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}
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}
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bool check_first() const NPNR_ALWAYS_INLINE
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{
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switch (state) {
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case BEGIN:
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return false;
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case NORMAL_PIPS:
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return (cursor < pips_downhill->size());
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case PORT_SINK_TO_PORT_SRC:
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return (cursor < site_arch->input_site_ports.size());
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case OUT_OF_SITE_SINKS:
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return (cursor < site_arch->out_of_site_sinks.size());
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case OUT_OF_SITE_SOURCE_TO_PORT_SRC:
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return (cursor < site_arch->input_site_ports.size());
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case SITE_PORT:
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return true;
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case END:
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return true;
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default:
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// Unreachable!
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NPNR_ASSERT(false);
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}
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}
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const std::array<std::array<DownhillIteratorState, NUMBER_STATES>, SiteWire::NUMBER_SITE_WIRE_TYPES>
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get_state_table() const
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{
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std::array<std::array<DownhillIteratorState, NUMBER_STATES>, SiteWire::NUMBER_SITE_WIRE_TYPES> state_table;
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for (size_t j = 0; j < SiteWire::NUMBER_SITE_WIRE_TYPES; ++j) {
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for (size_t i = 0; i < NUMBER_STATES; ++i) {
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state_table[j][i] = NUMBER_STATES;
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}
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}
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state_table[SiteWire::SITE_WIRE][BEGIN] = NORMAL_PIPS;
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state_table[SiteWire::SITE_WIRE][NORMAL_PIPS] = END;
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state_table[SiteWire::OUT_OF_SITE_SOURCE][BEGIN] = OUT_OF_SITE_SOURCE_TO_PORT_SRC;
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state_table[SiteWire::OUT_OF_SITE_SOURCE][OUT_OF_SITE_SOURCE_TO_PORT_SRC] = END;
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state_table[SiteWire::OUT_OF_SITE_SINK][BEGIN] = END;
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state_table[SiteWire::SITE_PORT_SINK][BEGIN] = PORT_SINK_TO_PORT_SRC;
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state_table[SiteWire::SITE_PORT_SINK][PORT_SINK_TO_PORT_SRC] = OUT_OF_SITE_SINKS;
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state_table[SiteWire::SITE_PORT_SINK][OUT_OF_SITE_SINKS] = END;
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state_table[SiteWire::SITE_PORT_SOURCE][BEGIN] = SITE_PORT;
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state_table[SiteWire::SITE_PORT_SOURCE][SITE_PORT] = END;
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return state_table;
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}
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|
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void advance_state() NPNR_ALWAYS_INLINE
|
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{
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state = get_state_table().at(site_wire.type).at(state);
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cursor = 0;
|
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NPNR_ASSERT(state >= BEGIN && state <= END);
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}
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|
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void operator++() NPNR_ALWAYS_INLINE
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{
|
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NPNR_ASSERT(state != END);
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while (state != END) {
|
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if (advance_in_state()) {
|
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break;
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} else {
|
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advance_state();
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if (check_first()) {
|
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break;
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}
|
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}
|
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}
|
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}
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|
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bool operator!=(const SitePipDownhillIterator &other) const
|
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{
|
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return state != other.state || cursor != other.cursor;
|
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}
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|
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inline SitePip operator*() const NPNR_ALWAYS_INLINE;
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};
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|
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struct SitePipDownhillRange
|
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{
|
|
const SiteArch *site_arch;
|
|
SiteWire site_wire;
|
|
|
|
SitePipDownhillRange(const SiteArch *site_arch, const SiteWire &site_wire)
|
|
: site_arch(site_arch), site_wire(site_wire)
|
|
{
|
|
}
|
|
|
|
inline const RelSlice<int32_t> *init_pip_range() const NPNR_ALWAYS_INLINE;
|
|
|
|
inline SitePipDownhillIterator begin() const NPNR_ALWAYS_INLINE;
|
|
|
|
SitePipDownhillIterator end() const NPNR_ALWAYS_INLINE
|
|
{
|
|
SitePipDownhillIterator e;
|
|
e.state = SitePipDownhillIterator::END;
|
|
e.cursor = 0;
|
|
|
|
return e;
|
|
}
|
|
};
|
|
|
|
struct SitePipUphillIterator
|
|
{
|
|
enum UphillIteratorState
|
|
{
|
|
// Initial state
|
|
BEGIN = 0,
|
|
// Iterating over normal pips.
|
|
NORMAL_PIPS = 1,
|
|
// Iterating off all site port sources.
|
|
PORT_SRC_TO_PORT_SINK = 2,
|
|
// Iterating over out of site sinks.
|
|
OUT_OF_SITE_SOURCES = 3,
|
|
// Iterating off all site port sources.
|
|
OUT_OF_SITE_SINK_TO_PORT_SINK = 4,
|
|
SITE_PORT = 5,
|
|
END = 6,
|
|
NUMBER_STATES = 7,
|
|
};
|
|
|
|
UphillIteratorState state = BEGIN;
|
|
const SiteArch *site_arch;
|
|
SiteWire site_wire;
|
|
size_t cursor;
|
|
UphillPipIterator iter;
|
|
UphillPipIterator uphill_end;
|
|
|
|
bool advance_in_state()
|
|
{
|
|
switch (state) {
|
|
case BEGIN:
|
|
return false;
|
|
case NORMAL_PIPS:
|
|
while (iter != uphill_end) {
|
|
++iter;
|
|
if (!(iter != uphill_end)) {
|
|
break;
|
|
}
|
|
}
|
|
|
|
return false;
|
|
case PORT_SRC_TO_PORT_SINK:
|
|
++cursor;
|
|
return (cursor < site_arch->output_site_ports.size());
|
|
case OUT_OF_SITE_SOURCES:
|
|
++cursor;
|
|
return (cursor < site_arch->out_of_site_sources.size());
|
|
case OUT_OF_SITE_SINK_TO_PORT_SINK:
|
|
++cursor;
|
|
return (cursor < site_arch->output_site_ports.size());
|
|
case SITE_PORT:
|
|
++cursor;
|
|
return false;
|
|
default:
|
|
// Unreachable!
|
|
NPNR_ASSERT(false);
|
|
}
|
|
}
|
|
|
|
bool check_first() const
|
|
{
|
|
switch (state) {
|
|
case BEGIN:
|
|
return false;
|
|
case NORMAL_PIPS:
|
|
if (!(iter != uphill_end)) {
|
|
return false;
|
|
} else {
|
|
return true;
|
|
}
|
|
case PORT_SRC_TO_PORT_SINK:
|
|
return (cursor < site_arch->output_site_ports.size());
|
|
case OUT_OF_SITE_SOURCES:
|
|
return (cursor < site_arch->out_of_site_sources.size());
|
|
case OUT_OF_SITE_SINK_TO_PORT_SINK:
|
|
return (cursor < site_arch->output_site_ports.size());
|
|
case SITE_PORT:
|
|
return true;
|
|
case END:
|
|
return true;
|
|
default:
|
|
// Unreachable!
|
|
NPNR_ASSERT(false);
|
|
}
|
|
}
|
|
|
|
const std::array<std::array<UphillIteratorState, NUMBER_STATES>, SiteWire::NUMBER_SITE_WIRE_TYPES>
|
|
get_state_table() const
|
|
{
|
|
std::array<std::array<UphillIteratorState, NUMBER_STATES>, SiteWire::NUMBER_SITE_WIRE_TYPES> state_table;
|
|
for (size_t j = 0; j < SiteWire::NUMBER_SITE_WIRE_TYPES; ++j) {
|
|
for (size_t i = 0; i < NUMBER_STATES; ++i) {
|
|
state_table[j][i] = NUMBER_STATES;
|
|
}
|
|
}
|
|
|
|
state_table[SiteWire::SITE_WIRE][BEGIN] = NORMAL_PIPS;
|
|
state_table[SiteWire::SITE_WIRE][NORMAL_PIPS] = END;
|
|
|
|
state_table[SiteWire::OUT_OF_SITE_SOURCE][BEGIN] = END;
|
|
|
|
state_table[SiteWire::OUT_OF_SITE_SINK][BEGIN] = OUT_OF_SITE_SINK_TO_PORT_SINK;
|
|
state_table[SiteWire::OUT_OF_SITE_SINK][OUT_OF_SITE_SINK_TO_PORT_SINK] = END;
|
|
|
|
state_table[SiteWire::SITE_PORT_SINK][BEGIN] = SITE_PORT;
|
|
state_table[SiteWire::SITE_PORT_SINK][SITE_PORT] = END;
|
|
|
|
state_table[SiteWire::SITE_PORT_SOURCE][BEGIN] = PORT_SRC_TO_PORT_SINK;
|
|
state_table[SiteWire::SITE_PORT_SOURCE][PORT_SRC_TO_PORT_SINK] = OUT_OF_SITE_SOURCES;
|
|
state_table[SiteWire::SITE_PORT_SOURCE][OUT_OF_SITE_SOURCES] = END;
|
|
|
|
return state_table;
|
|
}
|
|
|
|
void advance_state()
|
|
{
|
|
state = get_state_table().at(site_wire.type).at(state);
|
|
cursor = 0;
|
|
NPNR_ASSERT(state >= BEGIN && state <= END);
|
|
}
|
|
|
|
void operator++()
|
|
{
|
|
NPNR_ASSERT(state != END);
|
|
while (state != END) {
|
|
if (advance_in_state()) {
|
|
break;
|
|
} else {
|
|
advance_state();
|
|
if (check_first()) {
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
bool operator!=(const SitePipUphillIterator &other) const
|
|
{
|
|
return state != other.state || cursor != other.cursor || iter != other.iter;
|
|
}
|
|
|
|
SitePip operator*() const;
|
|
};
|
|
|
|
struct SitePipUphillRange
|
|
{
|
|
const SiteArch *site_arch;
|
|
SiteWire site_wire;
|
|
UphillPipRange pip_range;
|
|
|
|
SitePipUphillRange(const SiteArch *site_arch, SiteWire site_wire);
|
|
|
|
SitePipUphillIterator begin() const
|
|
{
|
|
SitePipUphillIterator b;
|
|
b.state = SitePipUphillIterator::BEGIN;
|
|
b.site_arch = site_arch;
|
|
b.site_wire = site_wire;
|
|
b.cursor = 0;
|
|
b.iter = pip_range.b;
|
|
b.uphill_end = pip_range.e;
|
|
|
|
++b;
|
|
|
|
return b;
|
|
}
|
|
|
|
SitePipUphillIterator end() const
|
|
{
|
|
SitePipUphillIterator e;
|
|
e.state = SitePipUphillIterator::END;
|
|
e.site_arch = site_arch;
|
|
e.site_wire = site_wire;
|
|
e.cursor = 0;
|
|
e.iter = pip_range.e;
|
|
e.uphill_end = pip_range.e;
|
|
|
|
return e;
|
|
}
|
|
};
|
|
|
|
inline SitePipDownhillRange SiteArch::getPipsDownhill(const SiteWire &site_wire) const
|
|
{
|
|
return SitePipDownhillRange(this, site_wire);
|
|
}
|
|
|
|
inline SitePipUphillRange SiteArch::getPipsUphill(const SiteWire &site_wire) const
|
|
{
|
|
return SitePipUphillRange(this, site_wire);
|
|
}
|
|
|
|
struct SiteWireIterator
|
|
{
|
|
enum SiteWireIteratorState
|
|
{
|
|
// Initial state
|
|
BEGIN = 0,
|
|
NORMAL_WIRES = 1,
|
|
INPUT_SITE_PORTS = 2,
|
|
OUTPUT_SITE_PORTS = 3,
|
|
OUT_OF_SITE_SOURCES = 4,
|
|
OUT_OF_SITE_SINKS = 5,
|
|
END = 6,
|
|
};
|
|
|
|
SiteWireIteratorState state = BEGIN;
|
|
const SiteArch *site_arch;
|
|
const TileTypeInfoPOD *tile_type;
|
|
size_t cursor = 0;
|
|
|
|
bool advance_in_state()
|
|
{
|
|
switch (state) {
|
|
case BEGIN:
|
|
return false;
|
|
case NORMAL_WIRES:
|
|
while (true) {
|
|
++cursor;
|
|
if (cursor >= tile_type->wire_data.size()) {
|
|
return false;
|
|
}
|
|
if (tile_type->wire_data[cursor].site == site_arch->site_info->site) {
|
|
return true;
|
|
}
|
|
}
|
|
case INPUT_SITE_PORTS:
|
|
++cursor;
|
|
return (cursor < site_arch->input_site_ports.size());
|
|
case OUTPUT_SITE_PORTS:
|
|
++cursor;
|
|
return (cursor < site_arch->output_site_ports.size());
|
|
case OUT_OF_SITE_SOURCES:
|
|
++cursor;
|
|
return (cursor < site_arch->out_of_site_sources.size());
|
|
case OUT_OF_SITE_SINKS:
|
|
++cursor;
|
|
return (cursor < site_arch->out_of_site_sinks.size());
|
|
default:
|
|
// Unreachable!
|
|
NPNR_ASSERT(false);
|
|
}
|
|
}
|
|
|
|
// See if initial value in state is good.
|
|
bool check_first() const
|
|
{
|
|
switch (state) {
|
|
case BEGIN:
|
|
return false;
|
|
case NORMAL_WIRES:
|
|
if (cursor >= tile_type->wire_data.size()) {
|
|
return false;
|
|
}
|
|
return tile_type->wire_data[cursor].site == site_arch->site_info->site;
|
|
case INPUT_SITE_PORTS:
|
|
return (cursor < site_arch->input_site_ports.size());
|
|
case OUTPUT_SITE_PORTS:
|
|
return (cursor < site_arch->output_site_ports.size());
|
|
case OUT_OF_SITE_SOURCES:
|
|
return (cursor < site_arch->out_of_site_sources.size());
|
|
case OUT_OF_SITE_SINKS:
|
|
return (cursor < site_arch->out_of_site_sinks.size());
|
|
case END:
|
|
return true;
|
|
default:
|
|
// Unreachable!
|
|
NPNR_ASSERT(false);
|
|
}
|
|
}
|
|
|
|
void advance_state()
|
|
{
|
|
NPNR_ASSERT(state >= BEGIN && state < END);
|
|
state = static_cast<SiteWireIteratorState>(state + 1);
|
|
cursor = 0;
|
|
NPNR_ASSERT(state >= BEGIN && state <= END);
|
|
}
|
|
|
|
void operator++()
|
|
{
|
|
NPNR_ASSERT(state != END);
|
|
while (state != END) {
|
|
if (advance_in_state()) {
|
|
break;
|
|
} else {
|
|
advance_state();
|
|
if (check_first()) {
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
bool operator!=(const SiteWireIterator &other) const { return state != other.state || cursor != other.cursor; }
|
|
|
|
SiteWire operator*() const;
|
|
};
|
|
|
|
struct SiteWireRange
|
|
{
|
|
const SiteArch *site_arch;
|
|
SiteWireRange(const SiteArch *site_arch) : site_arch(site_arch) {}
|
|
SiteWireIterator begin() const;
|
|
|
|
SiteWireIterator end() const
|
|
{
|
|
SiteWireIterator e;
|
|
|
|
e.state = SiteWireIterator::END;
|
|
|
|
return e;
|
|
}
|
|
};
|
|
|
|
inline SiteWireRange SiteArch::getWires() const { return SiteWireRange(this); }
|
|
|
|
NEXTPNR_NAMESPACE_END
|
|
|
|
#endif /* SITE_ARCH_H */
|