nextpnr/himbaechel/uarch
YRabbit eb099a9244 Gowin. Bugfix.
The statement in the Gowin documentation that in the reading mode
"READ_MODE=0" the output register is not used and the OCE signal is
ignored is not confirmed by practice - if the OCE was left unconnected
or connected to the constant network, then a change in output data was
observed even with CE=0, as well as the absence of such at CE=1.

Synchronizing CE and OCE helps and the memory works properly in complex
systems such as RISC-V emulation and i8080 emulation (with 32K RAM and
16K BSRAM based ROM), but there is no theoretical basis for this fix, so
it is a hack.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2024-07-09 14:18:35 +02:00
..
example Make example more like other arch 2024-04-05 12:25:52 +02:00
gowin Gowin. Bugfix. 2024-07-09 14:18:35 +02:00
xilinx himbaechel: Switch default back to router1 for now 2023-11-17 09:09:59 +01:00