nextpnr/fpga_interchange/examples/tests/counter/remap.v
Alessandro Comodi f52b5b39ed fpga_interchange: tests: add techmap optional source file
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2021-03-16 15:39:02 +01:00

12 lines
199 B
Verilog

module INV(input I, output O);
LUT1 #(.INIT(2'b01)) _TECHMAP_REPLACE_ (.I0(I), .O(O));
endmodule
module BUF(input I, output O);
LUT1 #(.INIT(2'b10)) _TECHMAP_REPLACE_ (.I0(I), .O(O));
endmodule