YRabbit fddacb3dc1 gowin: implement IDES16 and OSER16 primitives ... These are very cumbersome primitives that take up two cells and consequently 4 IOLOGIC bels. The primitives are implemented for the chips that contain them and are supported by apicula GW1NSR-4C, GW1NR-9 and GW1NR-9C. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>		2023-04-12 14:35:17 +02:00
..
arch_pybindings.cc	Fixing old emails and names in copyrights	2021-06-12 13:22:38 +01:00
arch_pybindings.h	Fixing old emails and names in copyrights	2021-06-12 13:22:38 +01:00
arch.cc	gowin: implement IDES16 and OSER16 primitives	2023-04-12 14:35:17 +02:00
arch.h	gowin: implement IDES16 and OSER16 primitives	2023-04-12 14:35:17 +02:00
archdefs.h	gowin: add support for wide LUTs.	2021-10-07 18:38:33 +10:00
cells.cc	gowin: implement IDES16 and OSER16 primitives	2023-04-12 14:35:17 +02:00
cells.h	gowin: Add support for OSER primitives	2023-03-23 12:37:53 +01:00
CMakeLists.txt	gowin: Add GW1NZ-1	2022-02-15 14:12:16 +02:00
constids.inc	gowin: implement IDES16 and OSER16 primitives	2023-04-12 14:35:17 +02:00
cst.cc	gowin: Add GUI.	2022-01-29 14:45:17 +10:00
cst.h	gowin: Add GUI.	2022-01-29 14:45:17 +10:00
family.cmake	Gowin target (#542)	2020-12-30 14:59:55 +00:00
gfx.cc	gowin: fix build for wasm	2022-12-21 16:13:08 +10:00
gfx.h	gowin: fix build for wasm	2022-12-21 16:13:08 +10:00
globals.cc	gowin: Add PLL support for the GW1NR-9C chip	2023-01-26 20:26:05 +10:00
globals.h	gowin: improve clock wire routing	2022-12-30 11:55:39 +10:00
main.cc	gowin: improve clock wire routing	2022-12-30 11:55:39 +10:00
pack.cc	gowin: implement IDES16 and OSER16 primitives	2023-04-12 14:35:17 +02:00