143 lines
3.2 KiB
C++
143 lines
3.2 KiB
C++
// Copyright (c) 2011, NetEase Inc. All rights reserved.
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//
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// Author: rl
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// Date: 2011/6/6
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//
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// cpu description
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/*
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*
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* Author rl
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* Date 2011-06-06
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* Copyright Hangzhou, Netease Inc.
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* Brief cpu description
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*
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*/
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#include "cpu.h"
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#include <string.h>
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#if defined(ARCH_CPU_X86_FAMILY)
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#if defined(COMPILER_MSVC)
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#include <intrin.h>
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#endif
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#endif
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namespace nbase
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{
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CPU::CPU()
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: type_(0),
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family_(0),
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model_(0),
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stepping_(0),
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ext_model_(0),
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ext_family_(0),
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has_mmx_(false),
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has_sse_(false),
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has_sse2_(false),
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has_sse3_(false),
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has_ssse3_(false),
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has_sse41_(false),
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has_sse42_(false),
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cpu_vendor_("unknown")
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{
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Initialize();
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}
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#if defined(ARCH_CPU_X86_FAMILY)
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#ifndef COMPILER_MSVC
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#if defined(__pic__) && defined(__i386__)
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void __cpuid(int cpu_info[4], int info_type)
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{
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__asm__ volatile (
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"mov %%ebx, %%edi\n"
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"cpuid\n"
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"xchg %%edi, %%ebx\n"
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: "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3])
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: "a"(info_type)
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);
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}
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void __cpuidex(int cpu_info[4], int info_type, int info_index)
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{
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__asm__ volatile (
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"mov %%ebx, %%edi\n"
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"cpuid\n"
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"xchg %%edi, %%ebx\n"
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: "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3])
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: "a"(info_type), "c"(info_index)
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);
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}
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#else
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void __cpuid(int cpu_info[4], int info_type)
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{
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__asm__ volatile (
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"cpuid \n\t"
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: "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3])
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: "a"(info_type)
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);
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}
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void __cpuidex(int cpu_info[4], int info_type, int info_index)
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{
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__asm__ volatile (
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"cpuid \n\t"
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: "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3])
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: "a"(info_type), "c"(info_index)
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);
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}
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#endif
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#endif // COMPILER_MSVC
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#endif // ARCH_CPU_X86_FAMILY
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void CPU::Initialize()
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{
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#if defined(ARCH_CPU_X86_FAMILY)
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int cpu_info[4] = {-1};
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char cpu_string[0x20];
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// __cpuid with an InfoType argument of 0 returns the number of
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// valid Ids in CPUInfo[0] and the CPU identification string in
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// the other three array elements. The CPU identification string is
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// not in linear order. The code below arranges the information
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// in a human readable form.
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//
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// More info can be found here:
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// http://msdn.microsoft.com/en-us/library/hskdteyh.aspx
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__cpuid(cpu_info, 0);
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int num_ids = cpu_info[0];
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memset(cpu_string, 0, sizeof(cpu_string));
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*(reinterpret_cast<int*>(cpu_string)) = cpu_info[1];
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*(reinterpret_cast<int*>(cpu_string+4)) = cpu_info[3];
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*(reinterpret_cast<int*>(cpu_string+8)) = cpu_info[2];
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// Interpret CPU feature information.
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if (num_ids > 0)
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{
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__cpuid(cpu_info, 1);
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stepping_ = cpu_info[0] & 0xf;
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model_ = ((cpu_info[0] >> 4) & 0xf) + ((cpu_info[0] >> 12) & 0xf0);
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family_ = (cpu_info[0] >> 8) & 0xf;
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type_ = (cpu_info[0] >> 12) & 0x3;
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ext_model_ = (cpu_info[0] >> 16) & 0xf;
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ext_family_ = (cpu_info[0] >> 20) & 0xff;
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cpu_vendor_ = cpu_string;
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has_mmx_ = (cpu_info[3] & 0x00800000) != 0;
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has_sse_ = (cpu_info[3] & 0x02000000) != 0;
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has_sse2_ = (cpu_info[3] & 0x04000000) != 0;
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has_sse3_ = (cpu_info[2] & 0x00000001) != 0;
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has_ssse3_ = (cpu_info[2] & 0x00000200) != 0;
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has_sse41_ = (cpu_info[2] & 0x00080000) != 0;
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has_sse42_ = (cpu_info[2] & 0x00100000) != 0;
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}
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#endif
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}
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} // namespace nbase
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