195 lines
5.1 KiB
ArmAsm
195 lines
5.1 KiB
ArmAsm
/******************************************************************************
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*
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* Copyright (c) 2012 - 2021 Xilinx, Inc. All rights reserved.
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* SPDX-License-Identifier: MIT
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file handoff.S
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*
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* Contains the code that does the handoff to the loaded application. This
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* code lives high in the ROM.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date.word Changes
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* ----- ---- -------- -------------------------------------------------------
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* 1.00a ecm 03/01/10 Initial release
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* 7.00a kc 10/23/13 Added support for armcc compiler
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* </pre>
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*
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* @note
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* Assumes that the starting address of the FSBL is provided by the calling routine
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* in R0.
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*
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******************************************************************************/
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#ifdef __GNUC__
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.globl FsblHandoffJtagExit
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.globl FsblHandoffExit
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.section .handoff,"axS"
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/***************************** Include Files *********************************/
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/************************** Constant Definitions *****************************/
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/**************************** Type Definitions *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************** Function Prototypes ******************************/
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/************************** Variable Definitions *****************************/
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FsblHandoffJtagExit:
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mcr 15,0,r0,cr7,cr5,0 /* Invalidate Instruction cache */
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mcr 15,0,r0,cr7,cr5,6 /* Invalidate branch predictor array */
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dsb
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isb /* make sure it completes */
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ldr r4, =0
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mcr 15,0,r4,cr1,cr0,0 /* disable the ICache and MMU */
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isb /* make sure it completes */
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Loop:
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wfe
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b Loop
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FsblHandoffExit:
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mov lr, r0 /* move the destination address into link register */
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mcr 15,0,r0,cr7,cr5,0 /* Invalidate Instruction cache */
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mcr 15,0,r0,cr7,cr5,6 /* Invalidate branch predictor array */
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dsb
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isb /* make sure it completes */
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ldr r4, =0
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mcr 15,0,r4,cr1,cr0,0 /* disable the ICache and MMU */
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isb /* make sure it completes */
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bx lr /* force the switch, destination should have been in r0 */
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.Ldone: b .Ldone /* Paranoia: we should never get here */
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.end
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#elif defined (__IASMARM__)
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PUBLIC FsblHandoffJtagExit
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PUBLIC FsblHandoffExit
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SECTION .handoff:CODE:NOROOT(2)
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/***************************** Include Files *********************************/
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/************************** Constant Definitions *****************************/
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/**************************** Type Definitions *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************** Function Prototypes ******************************/
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/************************** Variable Definitions *****************************/
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FsblHandoffJtagExit
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mcr p15,0,r0,c7,c5,0 ;/* Invalidate Instruction cache */
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mcr p15,0,r0,c7,c5,6 ;/* Invalidate branch predictor array */
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dsb
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isb ;/* make sure it completes */
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ldr r4, =0
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mcr p15,0,r4,c1,c0,0 ;/* disable the ICache and MMU */
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isb ;/* make sure it completes */
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Loop
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wfe
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b Loop
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FsblHandoffExit
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mov lr, r0 ;/* move the destination address into link register */
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mcr p15,0,r0,c7,c5,0 ;/* Invalidate Instruction cache */
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mcr p15,0,r0,c7,c5,6 ;/* Invalidate branch predictor array */
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dsb
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isb ;/* make sure it completes */
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ldr r4, =0
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mcr p15,0,r4,c1,c0,0 ;/* disable the ICache and MMU */
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isb ;/* make sure it completes */
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bx lr ;/* force the switch, destination should have been in r0 */
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.Ldone
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b .Ldone ;/* Paranoia: we should never get here */
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END
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#else
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EXPORT FsblHandoffJtagExit
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EXPORT FsblHandoffExit
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AREA |.handoff|,CODE
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;/***************************** Include Files *********************************/
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;/************************** Constant Definitions *****************************/
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;/**************************** Type Definitions *******************************/
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;/***************** Macros (Inline Functions) Definitions *********************/
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;/************************** Function Prototypes ******************************/
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;/************************** Variable Definitions *****************************/
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FsblHandoffJtagExit
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mcr p15,0,r0,c7,c5,0 ;/* Invalidate Instruction cache */
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mcr p15,0,r0,c7,c5,6 ;/* Invalidate branch predictor array */
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dsb
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isb ;/* make sure it completes */
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ldr r4, =0
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mcr p15,0,r4,c1,c0,0 ;/* disable the ICache and MMU */
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isb ;/* make sure it completes */
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Loop
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wfe
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b Loop
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FsblHandoffExit
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mov lr, r0 ;/* move the destination address into link register */
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mcr p15,0,r0,c7,c5,0 ;/* Invalidate Instruction cache */
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mcr p15,0,r0,c7,c5,6 ;/* Invalidate branch predictor array */
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dsb
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isb ;/* make sure it completes */
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ldr r4, =0
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mcr p15,0,r4,c1,c0,0 ;/* disable the ICache and MMU */
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isb ;/* make sure it completes */
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bx lr ;/* force the switch, destination should have been in r0 */
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Ldone b Ldone ;/* Paranoia: we should never get here */
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END
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#endif
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