116 lines
3.1 KiB
C
116 lines
3.1 KiB
C
/******************************************************************************
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* Copyright (c) 2012 - 2020 Xilinx, Inc. All rights reserved.
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* SPDX-License-Identifier: MIT
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file qspi.h
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*
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* This file contains the interface for the QSPI FLASH functionality
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -------------------------------------------------------
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* 1.00a ecm 01/10/10 Initial release
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* 3.00a mb 01/09/12 Added the Delay Values defines for qspi
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* 5.00a sgd 05/17/13 Added Flash Size > 128Mbit support
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* Dual Stack support
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* 6.00a bsv 09/04/20 Added support for 2Gb flash parts
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* </pre>
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*
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* @note
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*
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******************************************************************************/
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#ifndef ___QSPI_H___
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#define ___QSPI_H___
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#include "fsbl.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************** Include Files *********************************/
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#include "fsbl.h"
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/************************** Constant Definitions *****************************/
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#define SINGLE_FLASH_CONNECTION 0
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#define DUAL_STACK_CONNECTION 1
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#define DUAL_PARALLEL_CONNECTION 2
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#define FLASH_SIZE_16MB 0x1000000
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/*
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* Bank mask
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*/
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#define BANKMASK 0xF000000
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/*
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* Identification of Flash
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* Micron:
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* Byte 0 is Manufacturer ID;
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* Byte 1 is first byte of Device ID - 0xBB or 0xBA
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* Byte 2 is second byte of Device ID describes flash size:
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* 128Mbit : 0x18; 256Mbit : 0x19; 512Mbit : 0x20
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* Spansion:
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* Byte 0 is Manufacturer ID;
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* Byte 1 is Device ID - Memory Interface type - 0x20 or 0x02
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* Byte 2 is second byte of Device ID describes flash size:
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* 128Mbit : 0x18; 256Mbit : 0x19; 512Mbit : 0x20
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*/
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#define MICRON_ID 0x20
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#define SPANSION_ID 0x01
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#define WINBOND_ID 0xEF
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#define MACRONIX_ID 0xC2
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#define ISSI_ID 0x9D
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#define FLASH_SIZE_ID_8M 0x14
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#define FLASH_SIZE_ID_16M 0x15
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#define FLASH_SIZE_ID_32M 0x16
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#define FLASH_SIZE_ID_64M 0x17
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#define FLASH_SIZE_ID_128M 0x18
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#define FLASH_SIZE_ID_256M 0x19
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#define FLASH_SIZE_ID_512M 0x20
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#define FLASH_SIZE_ID_1G 0x21
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#define FLASH_SIZE_ID_2G 0x22
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/* Macronix size constants are different for 512M and 1G */
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#define MACRONIX_FLASH_SIZE_ID_512M 0x1A
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#define MACRONIX_FLASH_SIZE_ID_1G 0x1B
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#define MACRONIX_FLASH_SIZE_ID_2G 0x1C
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#define MACRONIX_FLASH_1_8_V_MX66_ID_512 (0x3A)
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/*
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* Size in bytes
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*/
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#define FLASH_SIZE_8M 0x0100000
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#define FLASH_SIZE_16M 0x0200000
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#define FLASH_SIZE_32M 0x0400000
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#define FLASH_SIZE_64M 0x0800000
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#define FLASH_SIZE_128M 0x1000000
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#define FLASH_SIZE_256M 0x2000000
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#define FLASH_SIZE_512M 0x4000000
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#define FLASH_SIZE_1G 0x8000000
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#define FLASH_SIZE_2G 0x10000000
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/************************** Function Prototypes ******************************/
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u32 InitQspi(void);
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u32 QspiAccess( u32 SourceAddress,
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u32 DestinationAddress,
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u32 LengthBytes);
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u32 FlashReadID(void);
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u32 SendBankSelect(u8 BankSel);
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/************************** Variable Definitions *****************************/
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#ifdef __cplusplus
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}
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#endif
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#endif /* ___QSPI_H___ */
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