200 lines
8.3 KiB
C
200 lines
8.3 KiB
C
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/**************************************************************************//**
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* @file main.c
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* @version V1.00
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* $Revision: 8 $
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* $Date: 15/09/02 10:04a $
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* @brief Demonstrate how to use PWM Dead Zone function.
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* @note
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* Copyright (C) 2014~2015 Nuvoton Technology Corp. All rights reserved.
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*
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******************************************************************************/
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#include <stdio.h>
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#include "M451Series.h"
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/*---------------------------------------------------------------------------------------------------------*/
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/* Macro, type and constant definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define PLL_CLOCK 144000000
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/*---------------------------------------------------------------------------------------------------------*/
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/* Global variables */
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/*---------------------------------------------------------------------------------------------------------*/
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/**
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* @brief PWM0 IRQ Handler
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*
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* @param None
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*
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* @return None
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*
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* @details ISR to handle PWM0 interrupt event
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*/
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void PWM0P0_IRQHandler(void)
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{
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static uint32_t cnt;
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static uint32_t out;
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// Channel 0 frequency is 100Hz, every 1 second enter this IRQ handler 100 times.
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if(++cnt == 100)
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{
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if(out)
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PWM_EnableOutput(PWM0, PWM_CH_0_MASK | PWM_CH_1_MASK | PWM_CH_2_MASK | PWM_CH_3_MASK);
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else
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PWM_DisableOutput(PWM0, PWM_CH_0_MASK | PWM_CH_1_MASK | PWM_CH_2_MASK | PWM_CH_3_MASK);
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out ^= 1;
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cnt = 0;
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}
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// Clear channel 0 period interrupt flag
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PWM_ClearPeriodIntFlag(PWM0, 0);
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}
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void SYS_Init(void)
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{
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/*---------------------------------------------------------------------------------------------------------*/
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/* Init System Clock */
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/*---------------------------------------------------------------------------------------------------------*/
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/* Enable HIRC clock (Internal RC 22.1184MHz) */
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CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);
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/* Waiting for HIRC clock ready */
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CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
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/* Select HCLK clock source as HIRC and and HCLK clock divider as 1 */
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CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
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/* Enable HXT clock (external XTAL 12MHz) */
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CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
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/* Waiting for HXT clock ready */
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CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk);
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/* Set core clock as PLL_CLOCK from PLL */
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CLK_SetCoreClock(PLL_CLOCK);
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/* Waiting for PLL clock ready */
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CLK_WaitClockReady(CLK_STATUS_PLLSTB_Msk);
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/* Enable PWM0 module clock */
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CLK_EnableModuleClock(PWM0_MODULE);
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/*---------------------------------------------------------------------------------------------------------*/
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/* PWM clock frequency configuration */
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/*---------------------------------------------------------------------------------------------------------*/
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/* Select HCLK clock source as PLL and and HCLK clock divider as 2 */
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CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_PLL, CLK_CLKDIV0_HCLK(2));
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/* PWM clock frequency can be set equal or double to HCLK by choosing case 1 or case 2 */
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/* case 1.PWM clock frequency is set equal to HCLK: select PWM module clock source as PCLK */
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CLK_SetModuleClock(PWM0_MODULE, CLK_CLKSEL2_PWM0SEL_PCLK0, NULL);
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/* case 2.PWM clock frequency is set double to HCLK: select PWM module clock source as PLL */
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//CLK_SetModuleClock(PWM0_MODULE, CLK_CLKSEL2_PWM0SEL_PLL, NULL);
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/*---------------------------------------------------------------------------------------------------------*/
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/* Enable UART module clock */
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CLK_EnableModuleClock(UART0_MODULE);
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/* Select UART module clock source as HXT and UART module clock divider as 1 */
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CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UARTSEL_HXT, CLK_CLKDIV0_UART(1));
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/* Reset PWM0 module */
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SYS_ResetModule(PWM0_RST);
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/* Update System Core Clock */
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SystemCoreClockUpdate();
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/*---------------------------------------------------------------------------------------------------------*/
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/* Init I/O Multi-function */
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/*---------------------------------------------------------------------------------------------------------*/
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/* Set PD multi-function pins for UART0 RXD and TXD */
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SYS->GPD_MFPL &= ~(SYS_GPD_MFPL_PD0MFP_Msk | SYS_GPD_MFPL_PD1MFP_Msk);
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SYS->GPD_MFPL |= (SYS_GPD_MFPL_PD0MFP_UART0_RXD | SYS_GPD_MFPL_PD1MFP_UART0_TXD);
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/* Set PC multi-function pins for PWM0 Channel0~3 */
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SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC0MFP_Msk));
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SYS->GPC_MFPL |= SYS_GPC_MFPL_PC0MFP_PWM0_CH0;
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SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC1MFP_Msk));
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SYS->GPC_MFPL |= SYS_GPC_MFPL_PC1MFP_PWM0_CH1;
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SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC2MFP_Msk));
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SYS->GPC_MFPL |= SYS_GPC_MFPL_PC2MFP_PWM0_CH2;
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SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC3MFP_Msk));
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SYS->GPC_MFPL |= SYS_GPC_MFPL_PC3MFP_PWM0_CH3;
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}
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void UART0_Init()
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{
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/*---------------------------------------------------------------------------------------------------------*/
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/* Init UART */
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/*---------------------------------------------------------------------------------------------------------*/
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/* Reset UART module */
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SYS_ResetModule(UART0_RST);
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/* Configure UART0 and set UART0 baud rate */
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UART_Open(UART0, 115200);
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}
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/*---------------------------------------------------------------------------------------------------------*/
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/* Main Function */
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/*---------------------------------------------------------------------------------------------------------*/
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int32_t main(void)
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{
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/* Init System, IP clock and multi-function I/O
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In the end of SYS_Init() will issue SYS_LockReg()
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to lock protected register. If user want to write
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protected register, please issue SYS_UnlockReg()
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to unlock protected register if necessary */
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/* Unlock protected registers */
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SYS_UnlockReg();
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/* Init System, IP clock and multi-function I/O */
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SYS_Init();
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/* Lock protected registers */
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SYS_LockReg();
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/* Init UART to 115200-8n1 for print message */
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UART0_Init();
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printf("\n\nCPU @ %dHz(PLL@ %dHz)\n", SystemCoreClock, PllClock);
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printf("PWM0 clock is from %s\n", (CLK->CLKSEL2 & CLK_CLKSEL2_PWM0SEL_Msk) ? "CPU" : "PLL");
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printf("+------------------------------------------------------------------------+\n");
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printf("| PWM Driver Sample Code |\n");
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printf("| |\n");
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printf("+------------------------------------------------------------------------+\n");
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printf(" This sample code will output PWM0 channel 0~3 with different\n");
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printf(" frequency and duty, enable dead zone function of all PWM0 pairs.\n");
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printf(" And also enable/disable PWM output every 1 second.\n");
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printf(" I/O configuration:\n");
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printf(" waveform output pin: PWM0_CH0(PC.0), PWM0_CH1(PC.1), PWM0_CH2(PC.2), PWM0_CH3(PC.3)\n");
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/*Set Pwm mode as complementary mode*/
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PWM_ENABLE_COMPLEMENTARY_MODE(PWM0);
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// PWM0 channel 0 frequency is 100Hz, duty 30%,
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PWM_ConfigOutputChannel(PWM0, 0, 100, 30);
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SYS_UnlockReg();
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PWM_EnableDeadZone(PWM0, 0, 400);
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SYS_LockReg();
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// PWM0 channel 2 frequency is 300Hz, duty 50%
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PWM_ConfigOutputChannel(PWM0, 2, 300, 50);
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SYS_UnlockReg();
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PWM_EnableDeadZone(PWM0, 2, 200);
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SYS_LockReg();
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// Enable output of PWM0 channel 0~3
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PWM_EnableOutput(PWM0, 0xF);
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// Enable PWM0 channel 0 period interrupt, use channel 0 to measure time.
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PWM_EnablePeriodInt(PWM0, 0, 0);
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NVIC_EnableIRQ(PWM0P0_IRQn);
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// Start
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PWM_Start(PWM0, 0xF);
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while(1);
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}
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