HardwareDriver/nuvoton/m451/roboticarm_controller/24l01.c

268 lines
5.5 KiB
C
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2019-08-03 16:00:58 +00:00
#include "M451Series.h"
#include "24l01.h"
#include "spi_hal.h"
uchar Recv_Buf[32] = {0};
uchar Send_Buf[32] = {0};
char rfch = 45;
unsigned short RxCnt = 0;
unsigned char TxAddr[]={0x11,0x22,0x33,0x44,0x55};//????
unsigned char RxAddr[]={0x11,0x22,0x33,0x44,0x55};//????
enum NRF_Mode Curr_Mode = NRF_RX_Mode;
void delay_s()
{
int z=0;
for(z=0;z<250;z++)
{}
}
void delay_mss()
{
int z = 0;
for(z=0;z<5;z++)
{
delay_s();
}
}
void NRF_Init(void)
{
}
void NRF_SetUpInterrupt(void)
{
GPIO_SetMode(PB,BIT15,GPIO_MODE_INPUT);
GPIO_EnableInt(PB,15,GPIO_INT_FALLING);
NVIC->ISER[0]|=(0X01<<2);
}
int gRecvPkg = 0;
//<2F><><EFBFBD>ջ<EFBFBD><D5BB>߷<EFBFBD><DFB7><EFBFBD><EFBFBD>ж<EFBFBD>
void EINT0_IRQHandler()
{
char trycnt = 5;
gRecvPkg ++;
delay_s();
switch(Curr_Mode){
//if now in rx mode mean data been receieved
case NRF_RX_Mode:
//PB9 = 0;
while(trycnt > 0)
{
if(NRF24L01_RxPacket(Recv_Buf) == 0)
{
NRFSetTxMode();
break;
}
trycnt --;
}
//nrf_write(FLUSH_RX,0xff);//<2F><><EFBFBD><EFBFBD>RX FIFO<46>Ĵ<EFBFBD><C4B4><EFBFBD>
//PB9 = 1;
//read the buffer
break;
//if now in tx mode mean data been sent
case NRF_TX_Mode:
break;
}
PB->INTSRC |= BIT14;
}
void RX_Mode(void)
{
char sta;
sta = nrf_read(STATUS);
nrf_write(W_REGISTER + STATUS,sta);
nrf_write(FLUSH_TX,0xff);
nrf_write(FLUSH_RX,0xff);
PB13=0;
Curr_Mode = NRF_RX_Mode;
delay_s();
nrf_writebuf(W_REGISTER + TX_ADDR,(uchar*)TxAddr,5);//дTX<54>ڵ<EFBFBD><DAB5><EFBFBD>ַ
nrf_writebuf(W_REGISTER + RX_ADDR_P0,(uchar*)RxAddr,5); //<2F><><EFBFBD><EFBFBD>TX<54>ڵ<EFBFBD><DAB5><EFBFBD>ַ,<2C><>ҪΪ<D2AA><CEAA>ʹ<EFBFBD><CAB9>ACK
nrf_write(W_REGISTER + SETUP_RETR,0x11);//<2F><><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>:500us + 86us;<3B><><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>:10<31><30>
nrf_write(W_REGISTER + EN_AA, 0x01); // Enable Auto.Ack:Pipe0
nrf_write(W_REGISTER + EN_RXADDR, 0x01); // Enable Pipe0
nrf_write(W_REGISTER + RF_CH, rfch); // Select RF channel 40
nrf_write(W_REGISTER + RX_PW_P0,RX_DATA_WITDH);
//nrf_write(W_REGISTER+FEATURE, 0x20);
nrf_write(W_REGISTER + RF_SETUP, 0x0f);
nrf_write(W_REGISTER + CONFIG, 0x2f); // Set PWR_UP bit, enable CRC(2 bytes)
delay_s();
PB13=1;
}
void NRFSwitchMode(char mode)
{
static char ifinit = 0;
//TX Mode
if(mode == 1)
{
if (0 == ifinit)
{
NRFSetTxMode();
ifinit = 1;
return;
}
PB9 = 0;
nrf_write(W_REGISTER + STATUS,0xff); //ʹ<><CAB9>ͨ<EFBFBD><CDA8>0<EFBFBD><30><EFBFBD>Զ<EFBFBD>Ӧ<EFBFBD><D3A6>
nrf_write(FLUSH_TX,0); //ʹ<><CAB9>ͨ<EFBFBD><CDA8>0<EFBFBD><30><EFBFBD>Զ<EFBFBD>Ӧ<EFBFBD><D3A6>
nrf_write(W_REGISTER + CONFIG,0xfe); //ʹ<><CAB9>ͨ<EFBFBD><CDA8>0<EFBFBD><30><EFBFBD>Զ<EFBFBD>Ӧ<EFBFBD><D3A6>
delay_s();
PB9 = 1;
}
else
{
PB9 = 0;
nrf_write(W_REGISTER+STATUS,0xff); //ʹ<><CAB9>ͨ<EFBFBD><CDA8>0<EFBFBD><30><EFBFBD>Զ<EFBFBD>Ӧ<EFBFBD><D3A6>
nrf_write(FLUSH_TX,0); //ʹ<><CAB9>ͨ<EFBFBD><CDA8>0<EFBFBD><30><EFBFBD>Զ<EFBFBD>Ӧ<EFBFBD><D3A6>
nrf_write(W_REGISTER + CONFIG,0xff); //ʹ<><CAB9>ͨ<EFBFBD><CDA8>0<EFBFBD><30><EFBFBD>Զ<EFBFBD>Ӧ<EFBFBD><D3A6>
delay_s();
PB9 = 1;
}
}
void NRFSetTxMode()
{
char sta;
sta = nrf_read(STATUS);
nrf_write(W_REGISTER + STATUS,sta);
nrf_write(FLUSH_TX,0xff);
nrf_write(FLUSH_RX,0xff);
PB14 = 0;
Curr_Mode = NRF_TX_Mode;
delay_s();
nrf_writebuf(W_REGISTER+TX_ADDR,(uchar*)TxAddr,5);//дTX<54>ڵ<EFBFBD><DAB5><EFBFBD>ַ
nrf_writebuf(W_REGISTER+RX_ADDR_P0,(uchar*)RxAddr,5); //<2F><><EFBFBD><EFBFBD>TX<54>ڵ<EFBFBD><DAB5><EFBFBD>ַ,<2C><>ҪΪ<D2AA><CEAA>ʹ<EFBFBD><CAB9>ACK
nrf_write(W_REGISTER+EN_AA,0x01); //ʹ<><CAB9>ͨ<EFBFBD><CDA8>0<EFBFBD><30><EFBFBD>Զ<EFBFBD>Ӧ<EFBFBD><D3A6>
nrf_write(W_REGISTER+EN_RXADDR,0x01); //ʹ<><CAB9>ͨ<EFBFBD><CDA8>0<EFBFBD>Ľ<EFBFBD><C4BD>յ<EFBFBD>ַ
nrf_write(W_REGISTER+SETUP_RETR,0x1a);//<2F><><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>:500us + 86us;<3B><><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>:10<31><30>
nrf_write(W_REGISTER+RF_CH,rfch); //<2F><><EFBFBD><EFBFBD>RFͨ<46><CDA8>Ϊ40
nrf_write(W_REGISTER+RF_SETUP,0x0f); //<2F><><EFBFBD><EFBFBD>TX<54><58><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,0db<64><62><EFBFBD><EFBFBD>,2Mbps,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><E6BFAA>
nrf_write(W_REGISTER+CONFIG,0x0e); //<2F><><EFBFBD>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ<C4A3>IJ<EFBFBD><C4B2><EFBFBD>;PWR_UP,EN_CRC,16BIT_CRC,<2C><><EFBFBD><EFBFBD>ģʽ,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
delay_s();
PB14 = 1;
}
//<2F><><EFBFBD><EFBFBD>NRF24L01<30><31><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//txbuf:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׵<EFBFBD>ַ
//<2F><><EFBFBD><EFBFBD>ֵ:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״<EFBFBD><D7B4>
unsigned char NRF24L01_TxPacket(unsigned char *txbuf)
{
unsigned char sta;
PB9=0;
delay_s();
nrf_writebuf(W_TX_PAYLOAD,txbuf,TX_DATA_WITDH);//д<><D0B4><EFBFBD>ݵ<EFBFBD>TX BUF 32<33><32><EFBFBD>ֽ<EFBFBD>
PB9=1;
sta=nrf_read(STATUS); //<2F><>ȡ״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ֵ
nrf_write(W_REGISTER+STATUS,sta); //<2F><><EFBFBD><EFBFBD>TX_DS<44><53>MAX_RT<52>жϱ<D0B6>־
if(sta&0x10)//<2F><EFBFBD><EFB5BD><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
{
nrf_wf(FLUSH_TX);//<2F><><EFBFBD><EFBFBD>TX FIFO<46>Ĵ<EFBFBD><C4B4><EFBFBD>
nrf_write(W_REGISTER+STATUS,sta); //<2F><><EFBFBD><EFBFBD>TX_DS<44><53>MAX_RT<52>жϱ<D0B6>־
sta=nrf_read(STATUS); //<2F><>ȡ״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ֵ
return 0x10;
}
if(sta&0x20)//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
{
return 0;
}
return 0xff;//<2F><><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
}
unsigned char NrfDump()
{
char ret = 0;
ret=nrf_read(EN_AA);
delay_s();
ret=nrf_read(EN_RXADDR);
delay_s();
ret=nrf_read(RF_CH);
delay_s();
ret=nrf_read(RX_PW_P0);
delay_s();
ret=nrf_read(RF_SETUP);
delay_s();
ret=nrf_read(CONFIG);
delay_s();
ret=nrf_read(CD);
delay_s();
ret=nrf_read(STATUS);
delay_s();
return ret;
}
unsigned char NRF24L01_Read_Buf(unsigned char reg,unsigned char *pBuf,unsigned char len)
{
unsigned char status,u8_ctr;
spi_enable();
status=spi_send(reg);
for(u8_ctr=0;u8_ctr<len;u8_ctr++)
pBuf[u8_ctr]= spi_read();
spi_disable();
return status;
}
//<2F>ز<EFBFBD><D8B2><EFBFBD><EFBFBD><EFBFBD>
unsigned char NRF24L01_CD_Detect()
{
short ret = 0;
int x = 255;
int i = 0;
unsigned char sum = 0;
for(i=0;i<x;i++){
ret=nrf_read(CD);
sum+=ret;
}
return sum;
}
void NRF24L01_Monitor()
{
char ret = nrf_read(STATUS);
ret = nrf_read(CONFIG);
ret = nrf_read(RF_SETUP);
if(ret & 0x10)
{
nrf_write(W_REGISTER+STATUS,ret); //<2F><><EFBFBD><EFBFBD>TX_DS<44><53>MAX_RT<52>жϱ<D0B6>־
}
}
short NRF24L01_RxPacket(unsigned char *rxbuf)
{
unsigned char sta;
sta = nrf_read(STATUS); //<2F><>ȡ״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
if(sta&0x40)//<2F><><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD>
{
NRF24L01_Read_Buf(0x61,rxbuf,RX_DATA_WITDH);//<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
RxCnt ++;
//nrf_write(W_REGISTER+STATUS,sta); //<2F><><EFBFBD><EFBFBD>TX_DS<44><53>MAX_RT<52>жϱ<D0B6>־
return 0;
}
if(sta & 0x20) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD><EFBFBD><EFBFBD>
{
nrf_write(W_REGISTER+STATUS,sta); //<2F><><EFBFBD><EFBFBD>TX_DS<44><53>MAX_RT<52>жϱ<D0B6>־
return -1;
}
return -1;//û<>յ<EFBFBD><D5B5>κ<EFBFBD><CEBA><EFBFBD><EFBFBD><EFBFBD>
}