268 lines
5.5 KiB
C
268 lines
5.5 KiB
C
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#include "M451Series.h"
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#include "24l01.h"
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#include "spi_hal.h"
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uchar Recv_Buf[32] = {0};
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uchar Send_Buf[32] = {0};
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char rfch = 45;
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unsigned short RxCnt = 0;
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unsigned char TxAddr[]={0x11,0x22,0x33,0x44,0x55};//????
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unsigned char RxAddr[]={0x11,0x22,0x33,0x44,0x55};//????
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enum NRF_Mode Curr_Mode = NRF_RX_Mode;
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void delay_s()
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{
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int z=0;
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for(z=0;z<250;z++)
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{}
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}
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void delay_mss()
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{
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int z = 0;
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for(z=0;z<5;z++)
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{
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delay_s();
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}
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}
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void NRF_Init(void)
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{
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}
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void NRF_SetUpInterrupt(void)
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{
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GPIO_SetMode(PB,BIT15,GPIO_MODE_INPUT);
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GPIO_EnableInt(PB,15,GPIO_INT_FALLING);
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NVIC->ISER[0]|=(0X01<<2);
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}
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int gRecvPkg = 0;
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//<2F><><EFBFBD>ջ<EFBFBD><D5BB>߷<EFBFBD><DFB7><EFBFBD><EFBFBD>ж<EFBFBD>
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void EINT0_IRQHandler()
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{
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char trycnt = 5;
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gRecvPkg ++;
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delay_s();
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switch(Curr_Mode){
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//if now in rx mode mean data been receieved
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case NRF_RX_Mode:
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//PB9 = 0;
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while(trycnt > 0)
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{
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if(NRF24L01_RxPacket(Recv_Buf) == 0)
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{
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NRFSetTxMode();
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break;
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}
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trycnt --;
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}
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//nrf_write(FLUSH_RX,0xff);//<2F><><EFBFBD><EFBFBD>RX FIFO<46>Ĵ<EFBFBD><C4B4><EFBFBD>
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//PB9 = 1;
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//read the buffer
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break;
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//if now in tx mode mean data been sent
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case NRF_TX_Mode:
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break;
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}
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PB->INTSRC |= BIT14;
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}
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void RX_Mode(void)
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{
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char sta;
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sta = nrf_read(STATUS);
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nrf_write(W_REGISTER + STATUS,sta);
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nrf_write(FLUSH_TX,0xff);
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nrf_write(FLUSH_RX,0xff);
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PB13=0;
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Curr_Mode = NRF_RX_Mode;
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delay_s();
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nrf_writebuf(W_REGISTER + TX_ADDR,(uchar*)TxAddr,5);//дTX<54>ڵ<EFBFBD><DAB5><EFBFBD>ַ
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nrf_writebuf(W_REGISTER + RX_ADDR_P0,(uchar*)RxAddr,5); //<2F><><EFBFBD><EFBFBD>TX<54>ڵ<EFBFBD><DAB5><EFBFBD>ַ,<2C><>ҪΪ<D2AA><CEAA>ʹ<EFBFBD><CAB9>ACK
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nrf_write(W_REGISTER + SETUP_RETR,0x11);//<2F><><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>:500us + 86us;<3B><><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>:10<31><30>
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nrf_write(W_REGISTER + EN_AA, 0x01); // Enable Auto.Ack:Pipe0
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nrf_write(W_REGISTER + EN_RXADDR, 0x01); // Enable Pipe0
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nrf_write(W_REGISTER + RF_CH, rfch); // Select RF channel 40
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nrf_write(W_REGISTER + RX_PW_P0,RX_DATA_WITDH);
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//nrf_write(W_REGISTER+FEATURE, 0x20);
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nrf_write(W_REGISTER + RF_SETUP, 0x0f);
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nrf_write(W_REGISTER + CONFIG, 0x2f); // Set PWR_UP bit, enable CRC(2 bytes)
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delay_s();
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PB13=1;
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}
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void NRFSwitchMode(char mode)
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{
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static char ifinit = 0;
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//TX Mode
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if(mode == 1)
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{
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if (0 == ifinit)
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{
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NRFSetTxMode();
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ifinit = 1;
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return;
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}
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PB9 = 0;
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nrf_write(W_REGISTER + STATUS,0xff); //ʹ<><CAB9>ͨ<EFBFBD><CDA8>0<EFBFBD><30><EFBFBD>Զ<EFBFBD>Ӧ<EFBFBD><D3A6>
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nrf_write(FLUSH_TX,0); //ʹ<><CAB9>ͨ<EFBFBD><CDA8>0<EFBFBD><30><EFBFBD>Զ<EFBFBD>Ӧ<EFBFBD><D3A6>
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nrf_write(W_REGISTER + CONFIG,0xfe); //ʹ<><CAB9>ͨ<EFBFBD><CDA8>0<EFBFBD><30><EFBFBD>Զ<EFBFBD>Ӧ<EFBFBD><D3A6>
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delay_s();
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PB9 = 1;
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}
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else
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{
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PB9 = 0;
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nrf_write(W_REGISTER+STATUS,0xff); //ʹ<><CAB9>ͨ<EFBFBD><CDA8>0<EFBFBD><30><EFBFBD>Զ<EFBFBD>Ӧ<EFBFBD><D3A6>
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nrf_write(FLUSH_TX,0); //ʹ<><CAB9>ͨ<EFBFBD><CDA8>0<EFBFBD><30><EFBFBD>Զ<EFBFBD>Ӧ<EFBFBD><D3A6>
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nrf_write(W_REGISTER + CONFIG,0xff); //ʹ<><CAB9>ͨ<EFBFBD><CDA8>0<EFBFBD><30><EFBFBD>Զ<EFBFBD>Ӧ<EFBFBD><D3A6>
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delay_s();
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PB9 = 1;
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}
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}
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void NRFSetTxMode()
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{
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char sta;
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sta = nrf_read(STATUS);
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nrf_write(W_REGISTER + STATUS,sta);
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nrf_write(FLUSH_TX,0xff);
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nrf_write(FLUSH_RX,0xff);
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PB14 = 0;
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Curr_Mode = NRF_TX_Mode;
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delay_s();
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nrf_writebuf(W_REGISTER+TX_ADDR,(uchar*)TxAddr,5);//дTX<54>ڵ<EFBFBD><DAB5><EFBFBD>ַ
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nrf_writebuf(W_REGISTER+RX_ADDR_P0,(uchar*)RxAddr,5); //<2F><><EFBFBD><EFBFBD>TX<54>ڵ<EFBFBD><DAB5><EFBFBD>ַ,<2C><>ҪΪ<D2AA><CEAA>ʹ<EFBFBD><CAB9>ACK
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nrf_write(W_REGISTER+EN_AA,0x01); //ʹ<><CAB9>ͨ<EFBFBD><CDA8>0<EFBFBD><30><EFBFBD>Զ<EFBFBD>Ӧ<EFBFBD><D3A6>
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nrf_write(W_REGISTER+EN_RXADDR,0x01); //ʹ<><CAB9>ͨ<EFBFBD><CDA8>0<EFBFBD>Ľ<EFBFBD><C4BD>յ<EFBFBD>ַ
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nrf_write(W_REGISTER+SETUP_RETR,0x1a);//<2F><><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>:500us + 86us;<3B><><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>:10<31><30>
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nrf_write(W_REGISTER+RF_CH,rfch); //<2F><><EFBFBD><EFBFBD>RFͨ<46><CDA8>Ϊ40
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nrf_write(W_REGISTER+RF_SETUP,0x0f); //<2F><><EFBFBD><EFBFBD>TX<54><58><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,0db<64><62><EFBFBD><EFBFBD>,2Mbps,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>濪<EFBFBD><E6BFAA>
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nrf_write(W_REGISTER+CONFIG,0x0e); //<2F><><EFBFBD>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ<C4A3>IJ<EFBFBD><C4B2><EFBFBD>;PWR_UP,EN_CRC,16BIT_CRC,<2C><><EFBFBD><EFBFBD>ģʽ,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
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delay_s();
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PB14 = 1;
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}
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//<2F><><EFBFBD><EFBFBD>NRF24L01<30><31><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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//txbuf:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
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//<2F><><EFBFBD><EFBFBD>ֵ:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״<EFBFBD><D7B4>
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unsigned char NRF24L01_TxPacket(unsigned char *txbuf)
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{
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unsigned char sta;
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PB9=0;
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delay_s();
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nrf_writebuf(W_TX_PAYLOAD,txbuf,TX_DATA_WITDH);//д<><D0B4><EFBFBD>ݵ<EFBFBD>TX BUF 32<33><32><EFBFBD>ֽ<EFBFBD>
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PB9=1;
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sta=nrf_read(STATUS); //<2F><>ȡ״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ֵ
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nrf_write(W_REGISTER+STATUS,sta); //<2F><><EFBFBD><EFBFBD>TX_DS<44><53>MAX_RT<52>жϱ<D0B6>־
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if(sta&0x10)//<2F>ﵽ<EFBFBD><EFB5BD><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
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{
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nrf_wf(FLUSH_TX);//<2F><><EFBFBD><EFBFBD>TX FIFO<46>Ĵ<EFBFBD><C4B4><EFBFBD>
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nrf_write(W_REGISTER+STATUS,sta); //<2F><><EFBFBD><EFBFBD>TX_DS<44><53>MAX_RT<52>жϱ<D0B6>־
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sta=nrf_read(STATUS); //<2F><>ȡ״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ֵ
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return 0x10;
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}
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if(sta&0x20)//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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{
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return 0;
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}
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return 0xff;//<2F><><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
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}
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unsigned char NrfDump()
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{
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char ret = 0;
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ret=nrf_read(EN_AA);
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delay_s();
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ret=nrf_read(EN_RXADDR);
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delay_s();
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ret=nrf_read(RF_CH);
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delay_s();
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ret=nrf_read(RX_PW_P0);
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delay_s();
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ret=nrf_read(RF_SETUP);
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delay_s();
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ret=nrf_read(CONFIG);
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delay_s();
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ret=nrf_read(CD);
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delay_s();
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ret=nrf_read(STATUS);
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delay_s();
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return ret;
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}
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unsigned char NRF24L01_Read_Buf(unsigned char reg,unsigned char *pBuf,unsigned char len)
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{
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unsigned char status,u8_ctr;
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spi_enable();
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status=spi_send(reg);
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for(u8_ctr=0;u8_ctr<len;u8_ctr++)
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pBuf[u8_ctr]= spi_read();
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spi_disable();
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return status;
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}
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//<2F>ز<EFBFBD><D8B2><EFBFBD><EFBFBD><EFBFBD>
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unsigned char NRF24L01_CD_Detect()
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{
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short ret = 0;
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int x = 255;
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int i = 0;
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unsigned char sum = 0;
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for(i=0;i<x;i++){
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ret=nrf_read(CD);
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sum+=ret;
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}
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return sum;
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}
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void NRF24L01_Monitor()
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{
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char ret = nrf_read(STATUS);
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ret = nrf_read(CONFIG);
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ret = nrf_read(RF_SETUP);
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if(ret & 0x10)
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{
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nrf_write(W_REGISTER+STATUS,ret); //<2F><><EFBFBD><EFBFBD>TX_DS<44><53>MAX_RT<52>жϱ<D0B6>־
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}
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}
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short NRF24L01_RxPacket(unsigned char *rxbuf)
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{
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unsigned char sta;
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sta = nrf_read(STATUS); //<2F><>ȡ״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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if(sta&0x40)//<2F><><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD>
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{
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NRF24L01_Read_Buf(0x61,rxbuf,RX_DATA_WITDH);//<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
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RxCnt ++;
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//nrf_write(W_REGISTER+STATUS,sta); //<2F><><EFBFBD><EFBFBD>TX_DS<44><53>MAX_RT<52>жϱ<D0B6>־
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return 0;
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}
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if(sta & 0x20) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD><EFBFBD><EFBFBD>
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{
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nrf_write(W_REGISTER+STATUS,sta); //<2F><><EFBFBD><EFBFBD>TX_DS<44><53>MAX_RT<52>жϱ<D0B6>־
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return -1;
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}
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return -1;//û<>յ<EFBFBD><D5B5>κ<EFBFBD><CEBA><EFBFBD><EFBFBD><EFBFBD>
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}
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