添加mpu9250
parent
75249c701e
commit
29a35471f7
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@ -11,3 +11,5 @@
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*.uvopt
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*.htm
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*.dep
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*.o
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*.crf
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@ -988,14 +988,14 @@ Image component sizes
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904 100 0 0 0 20294 clk.o
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150 12 0 0 0 3055 i2c.o
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444 128 0 14 0 239059 main.o
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324 132 0 8 0 5653 retarget.o
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546 10 0 4120 0 4964 ssd1306.o
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116 36 320 0 1024 924 startup_m451series.o
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316 54 0 44 0 2871 system_m451series.o
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444 128 0 14 0 239119 main.o
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324 132 0 8 0 5761 retarget.o
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546 10 0 4120 0 5080 ssd1306.o
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116 36 320 0 1024 936 startup_m451series.o
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316 54 0 44 0 2931 system_m451series.o
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----------------------------------------------------------------------
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2802 472 352 4188 1024 276820 Object Totals
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2802 472 352 4188 1024 277176 Object Totals
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0 0 32 0 0 0 (incl. Generated)
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2 0 0 2 0 0 (incl. Padding)
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@ -1058,8 +1058,8 @@ Image component sizes
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Code (inc. data) RO Data RW Data ZI Data Debug
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4014 522 394 4188 1124 274756 Grand Totals
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4014 522 394 2392 1124 274756 ELF Image Totals (compressed)
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4014 522 394 4188 1124 275112 Grand Totals
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4014 522 394 2392 1124 275112 ELF Image Totals (compressed)
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4014 522 394 2392 0 0 ROM Totals
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==============================================================================
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File diff suppressed because one or more lines are too long
Binary file not shown.
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@ -0,0 +1,15 @@
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--cpu=Cortex-M4.fp
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".\objects\main.o"
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".\objects\ssd1306.o"
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".\objects\clk.o"
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".\objects\gpio.o"
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".\objects\i2c.o"
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".\objects\sc.o"
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".\objects\sys.o"
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".\objects\uart.o"
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".\objects\retarget.o"
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".\objects\startup_m451series.o"
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".\objects\system_m451series.o"
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--ro-base 0x00000000 --entry 0x00000000 --rw-base 0x20000000 --entry Reset_Handler --first __Vectors --strict --summary_stderr --info summarysizes --map --load_addr_map_info --xref --callgraph --symbols
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--info sizes --info totals --info unused --info veneers
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--list ".\Listings\OLED.map" -o .\Objects\OLED.axf
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@ -57,27 +57,22 @@ uint8_t OLED_SingleRead(uint8_t index)
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I2C_SET_CONTROL_REG(LCD_I2C_PORT, I2C_CTL_SI);
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I2C_WAIT_READY(LCD_I2C_PORT);
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//LCD_I2C_PORT->INTSTS |= I2C_INTSTS_INTSTS_Msk; //clear flag
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I2C_SET_DATA(LCD_I2C_PORT, index); //send index
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I2C_SET_CONTROL_REG(LCD_I2C_PORT, I2C_CTL_SI);
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I2C_WAIT_READY(LCD_I2C_PORT);
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//LCD_I2C_PORT->INTSTS |= I2C_INTSTS_INTSTS_Msk; //clear flag
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I2C_SET_CONTROL_REG(LCD_I2C_PORT, I2C_CTL_STA | I2C_CTL_SI); //Start
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I2C_WAIT_READY(LCD_I2C_PORT);
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//LCD_I2C_PORT->INTSTS |= I2C_INTSTS_INTSTS_Msk; //clear flag
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I2C_SET_DATA(LCD_I2C_PORT, (LCD_I2C_SLA+1)); //send slave address+R
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I2C_SET_CONTROL_REG(LCD_I2C_PORT, I2C_CTL_SI);
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I2C_WAIT_READY(LCD_I2C_PORT);
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//LCD_I2C_PORT->INTSTS |= I2C_INTSTS_INTSTS_Msk; //clear flag
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I2C_SET_CONTROL_REG(LCD_I2C_PORT, I2C_CTL_SI);
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I2C_WAIT_READY(LCD_I2C_PORT);
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//LCD_I2C_PORT->INTSTS |= I2C_INTSTS_INTSTS_Msk; //clear flag
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tmp = I2C_GET_DATA(LCD_I2C_PORT); //read data
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I2C_SET_CONTROL_REG(LCD_I2C_PORT, I2C_CTL_SI|I2C_CTL_STO);//Stop
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@ -0,0 +1,9 @@
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<?xml version="1.0" encoding="utf-8"?>
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<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
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<component name="EventRecorderStub" version="1.0.0"/> <!--name and version of the component-->
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<events>
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</events>
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</component_viewer>
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@ -0,0 +1,987 @@
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Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed]
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==============================================================================
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Section Cross References
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main.o(i.HalInit) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
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main.o(i.HalInit) refers to _printf_d.o(.ARM.Collect$$_printf_percent$$00000009) for _printf_d
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main.o(i.HalInit) refers to _printf_dec.o(.text) for _printf_int_dec
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main.o(i.HalInit) refers to clk.o(i.CLK_EnableXtalRC) for CLK_EnableXtalRC
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main.o(i.HalInit) refers to clk.o(i.CLK_WaitClockReady) for CLK_WaitClockReady
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main.o(i.HalInit) refers to clk.o(i.CLK_SetHCLK) for CLK_SetHCLK
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main.o(i.HalInit) refers to clk.o(i.CLK_SetCoreClock) for CLK_SetCoreClock
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main.o(i.HalInit) refers to clk.o(i.CLK_EnableModuleClock) for CLK_EnableModuleClock
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main.o(i.HalInit) refers to i2c.o(i.I2C_Open) for I2C_Open
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main.o(i.HalInit) refers to i2c.o(i.I2C_GetBusClockFreq) for I2C_GetBusClockFreq
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main.o(i.HalInit) refers to noretval__2printf.o(.text) for __2printf
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main.o(i.HalInit) refers to i2c.o(i.I2C_SetSlaveAddr) for I2C_SetSlaveAddr
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main.o(i.main) refers to main.o(i.HalInit) for HalInit
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main.o(i.main) refers to mpu.o(i.MpuInit) for MpuInit
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hal.o(i.MPUReadBuf) refers to _printf_pad.o(.text) for _printf_pre_padding
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hal.o(i.MPUReadBuf) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
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hal.o(i.MPUReadBuf) refers to _printf_x.o(.ARM.Collect$$_printf_percent$$0000000C) for _printf_x
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hal.o(i.MPUReadBuf) refers to _printf_hex_int.o(.text) for _printf_longlong_hex
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hal.o(i.MPUReadBuf) refers to i2c.o(i.I2C_Trigger) for I2C_Trigger
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hal.o(i.MPUReadBuf) refers to noretval__2printf.o(.text) for __2printf
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hal.o(i.MPUReadReg) refers to _printf_pad.o(.text) for _printf_pre_padding
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hal.o(i.MPUReadReg) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
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hal.o(i.MPUReadReg) refers to _printf_x.o(.ARM.Collect$$_printf_percent$$0000000C) for _printf_x
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hal.o(i.MPUReadReg) refers to _printf_hex_int.o(.text) for _printf_longlong_hex
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hal.o(i.MPUReadReg) refers to i2c.o(i.I2C_Trigger) for I2C_Trigger
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hal.o(i.MPUReadReg) refers to noretval__2printf.o(.text) for __2printf
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hal.o(i.MPUWriteACK) refers to noretval__2printf.o(.text) for __2printf
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hal.o(i.MPUWriteACK) refers to i2c.o(i.I2C_Trigger) for I2C_Trigger
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hal.o(i.MPUWriteAddr) refers to _printf_pad.o(.text) for _printf_pre_padding
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hal.o(i.MPUWriteAddr) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
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hal.o(i.MPUWriteAddr) refers to _printf_x.o(.ARM.Collect$$_printf_percent$$0000000C) for _printf_x
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hal.o(i.MPUWriteAddr) refers to _printf_hex_int.o(.text) for _printf_longlong_hex
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hal.o(i.MPUWriteAddr) refers to noretval__2printf.o(.text) for __2printf
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hal.o(i.MPUWriteAddr) refers to i2c.o(i.I2C_Trigger) for I2C_Trigger
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hal.o(i.MPUWriteReg) refers to _printf_pad.o(.text) for _printf_pre_padding
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hal.o(i.MPUWriteReg) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
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hal.o(i.MPUWriteReg) refers to _printf_x.o(.ARM.Collect$$_printf_percent$$0000000C) for _printf_x
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hal.o(i.MPUWriteReg) refers to _printf_hex_int.o(.text) for _printf_longlong_hex
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hal.o(i.MPUWriteReg) refers to noretval__2printf.o(.text) for __2printf
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hal.o(i.MPUWriteReg) refers to i2c.o(i.I2C_Trigger) for I2C_Trigger
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mpu.o(i.MpuGetData) refers to hal.o(i.MPUReadBuf) for MPUReadBuf
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mpu.o(i.MpuGetData) refers to mpu.o(.bss) for MpuOffset
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mpu.o(i.MpuGetData) refers to mpu.o(.data) for pMpu
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mpu.o(i.MpuInit) refers to hal.o(i.MPUWriteReg) for MPUWriteReg
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mpu.o(i.MpuInit) refers to mpu.o(i.delay_ms) for delay_ms
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mpu.o(i.MpuInit) refers to hal.o(i.MPUReadReg) for MPUReadReg
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mpu.o(i.mpu6050_rest) refers to hal.o(i.MPUWriteReg) for MPUWriteReg
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mpu.o(.data) refers to mpu.o(.bss) for MPU6050
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retarget.o(.emb_text) refers to retarget.o(i.Hard_Fault_Handler) for Hard_Fault_Handler
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retarget.o(i.Hard_Fault_Handler) refers to noretval__2printf.o(.text) for __2printf
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retarget.o(i.Hard_Fault_Handler) refers to retarget.o(i.stackDump) for stackDump
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retarget.o(i.SendChar) refers to retarget.o(i.SendChar_ToUART) for SendChar_ToUART
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retarget.o(i._ttywrch) refers to retarget.o(i.SendChar) for SendChar
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retarget.o(i.fgetc) refers to retarget.o(i.GetChar) for GetChar
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retarget.o(i.fputc) refers to retarget.o(i.SendChar) for SendChar
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retarget.o(i.stackDump) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
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retarget.o(i.stackDump) refers to _printf_x.o(.ARM.Collect$$_printf_percent$$0000000C) for _printf_x
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retarget.o(i.stackDump) refers to _printf_hex_int.o(.text) for _printf_longlong_hex
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retarget.o(i.stackDump) refers to noretval__2printf.o(.text) for __2printf
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startup_m451series.o(STACK) refers (Special) to heapauxi.o(.text) for __use_two_region_memory
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startup_m451series.o(HEAP) refers (Special) to heapauxi.o(.text) for __use_two_region_memory
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startup_m451series.o(RESET) refers (Special) to heapauxi.o(.text) for __use_two_region_memory
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startup_m451series.o(RESET) refers to startup_m451series.o(STACK) for __initial_sp
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startup_m451series.o(RESET) refers to startup_m451series.o(.text) for Reset_Handler
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startup_m451series.o(RESET) refers to retarget.o(.emb_text) for HardFault_Handler
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startup_m451series.o(.text) refers (Special) to heapauxi.o(.text) for __use_two_region_memory
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startup_m451series.o(.text) refers to system_m451series.o(i.SystemInit) for SystemInit
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startup_m451series.o(.text) refers to __main.o(!!!main) for __main
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startup_m451series.o(.text) refers to startup_m451series.o(HEAP) for Heap_Mem
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startup_m451series.o(.text) refers to startup_m451series.o(STACK) for Stack_Mem
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clk.o(i.CLK_DisableCKO) refers to clk.o(i.CLK_DisableModuleClock) for CLK_DisableModuleClock
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clk.o(i.CLK_EnableCKO) refers to clk.o(i.CLK_EnableModuleClock) for CLK_EnableModuleClock
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clk.o(i.CLK_EnableCKO) refers to clk.o(i.CLK_SetModuleClock) for CLK_SetModuleClock
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clk.o(i.CLK_EnablePLL) refers to clk.o(i.CLK_DisablePLL) for CLK_DisablePLL
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clk.o(i.CLK_EnablePLL) refers to clk.o(i.CLK_WaitClockReady) for CLK_WaitClockReady
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clk.o(i.CLK_EnablePLL) refers to clk.o(i.CLK_GetPLLClockFreq) for CLK_GetPLLClockFreq
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clk.o(i.CLK_GetCPUFreq) refers to system_m451series.o(i.SystemCoreClockUpdate) for SystemCoreClockUpdate
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clk.o(i.CLK_GetCPUFreq) refers to system_m451series.o(.data) for SystemCoreClock
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clk.o(i.CLK_GetHCLKFreq) refers to system_m451series.o(i.SystemCoreClockUpdate) for SystemCoreClockUpdate
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clk.o(i.CLK_GetHCLKFreq) refers to system_m451series.o(.data) for SystemCoreClock
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clk.o(i.CLK_GetPCLK0Freq) refers to system_m451series.o(i.SystemCoreClockUpdate) for SystemCoreClockUpdate
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clk.o(i.CLK_GetPCLK0Freq) refers to system_m451series.o(.data) for SystemCoreClock
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clk.o(i.CLK_GetPCLK1Freq) refers to system_m451series.o(i.SystemCoreClockUpdate) for SystemCoreClockUpdate
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clk.o(i.CLK_GetPCLK1Freq) refers to system_m451series.o(.data) for SystemCoreClock
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clk.o(i.CLK_SetCoreClock) refers to clk.o(i.CLK_WaitClockReady) for CLK_WaitClockReady
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clk.o(i.CLK_SetCoreClock) refers to clk.o(i.CLK_EnablePLL) for CLK_EnablePLL
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clk.o(i.CLK_SetCoreClock) refers to clk.o(i.CLK_SetHCLK) for CLK_SetHCLK
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clk.o(i.CLK_SetHCLK) refers to clk.o(i.CLK_WaitClockReady) for CLK_WaitClockReady
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clk.o(i.CLK_SetHCLK) refers to system_m451series.o(i.SystemCoreClockUpdate) for SystemCoreClockUpdate
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i2c.o(i.I2C_GetBusClockFreq) refers to system_m451series.o(.data) for SystemCoreClock
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i2c.o(i.I2C_Open) refers to system_m451series.o(.data) for SystemCoreClock
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i2c.o(i.I2C_SetBusClockFreq) refers to system_m451series.o(.data) for SystemCoreClock
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__2printf.o(.text) refers to _printf_char_file.o(.text) for _printf_char_file
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__2printf.o(.text) refers to retarget.o(.data) for __stdout
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noretval__2printf.o(.text) refers to _printf_char_file.o(.text) for _printf_char_file
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noretval__2printf.o(.text) refers to retarget.o(.data) for __stdout
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__printf.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
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_printf_dec.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common
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_printf_hex_ll.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common
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_printf_hex_ll.o(.text) refers to _printf_hex_ll.o(.constdata) for .constdata
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_printf_hex_int.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common
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_printf_hex_int.o(.text) refers to _printf_hex_int.o(.constdata) for .constdata
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_printf_hex_int_ll.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common
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_printf_hex_int_ll.o(.text) refers to _printf_hex_int_ll.o(.constdata) for .constdata
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_printf_hex_ptr.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common
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_printf_hex_ptr.o(.text) refers to _printf_hex_ptr.o(.constdata) for .constdata
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_printf_hex_int_ptr.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common
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_printf_hex_int_ptr.o(.text) refers to _printf_hex_int_ptr.o(.constdata) for .constdata
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_printf_hex_ll_ptr.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common
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_printf_hex_ll_ptr.o(.text) refers to _printf_hex_ll_ptr.o(.constdata) for .constdata
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_printf_hex_int_ll_ptr.o(.text) refers to _printf_intcommon.o(.text) for _printf_int_common
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_printf_hex_int_ll_ptr.o(.text) refers to _printf_hex_int_ll_ptr.o(.constdata) for .constdata
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__printf_flags.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
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__printf_flags.o(.text) refers to __printf_flags.o(.constdata) for .constdata
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__printf_ss.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
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__printf_flags_ss.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
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__printf_flags_ss.o(.text) refers to __printf_flags_ss.o(.constdata) for .constdata
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__printf_wp.o(.text) refers to __printf_wp.o(i._is_digit) for _is_digit
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__printf_wp.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
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__printf_flags_wp.o(.text) refers to __printf_wp.o(i._is_digit) for _is_digit
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__printf_flags_wp.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
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__printf_flags_wp.o(.text) refers to __printf_flags_wp.o(.constdata) for .constdata
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__printf_ss_wp.o(.text) refers to __printf_wp.o(i._is_digit) for _is_digit
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__printf_ss_wp.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
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__printf_flags_ss_wp.o(.text) refers to __printf_wp.o(i._is_digit) for _is_digit
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__printf_flags_ss_wp.o(.text) refers to _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) for _printf_percent
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__printf_flags_ss_wp.o(.text) refers to __printf_flags_ss_wp.o(.constdata) for .constdata
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_printf_x.o(.ARM.Collect$$_printf_percent$$0000000C) refers (Weak) to _printf_hex_int.o(.text) for _printf_int_hex
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_printf_d.o(.ARM.Collect$$_printf_percent$$00000009) refers (Weak) to _printf_dec.o(.text) for _printf_int_dec
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_printf_percent.o(.ARM.Collect$$_printf_percent$$00000000) refers (Special) to _printf_percent_end.o(.ARM.Collect$$_printf_percent$$00000017) for _printf_percent_end
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__main.o(!!!main) refers to __rtentry.o(.ARM.Collect$$rtentry$$00000000) for __rt_entry
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__rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) for __rt_entry_li
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__rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) for __rt_entry_main
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__rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000C) for __rt_entry_postli_1
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__rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$00000009) for __rt_entry_postsh_1
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__rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$00000002) for __rt_entry_presh_1
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__rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry4.o(.ARM.Collect$$rtentry$$00000004) for __rt_entry_sh
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_printf_intcommon.o(.text) refers (Weak) to _printf_pad.o(.text) for _printf_pre_padding
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_printf_intcommon.o(.text) refers (Weak) to _printf_pad.o(.text) for _printf_pre_padding
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_printf_intcommon.o(.text) refers (Weak) to _printf_pad.o(.text) for _printf_post_padding
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_printf_char_file.o(.text) refers to _printf_char_common.o(.text) for _printf_char_common
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_printf_char_file.o(.text) refers to retarget.o(i.ferror) for ferror
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_printf_char_file.o(.text) refers to retarget.o(i.fputc) for fputc
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__rtentry2.o(.ARM.Collect$$rtentry$$00000008) refers to boardinit2.o(.text) for _platform_post_stackheap_init
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__rtentry2.o(.ARM.Collect$$rtentry$$0000000A) refers to libinit.o(.ARM.Collect$$libinit$$00000000) for __rt_lib_init
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__rtentry2.o(.ARM.Collect$$rtentry$$0000000B) refers to boardinit3.o(.text) for _platform_post_lib_init
|
||||
__rtentry2.o(.ARM.Collect$$rtentry$$0000000D) refers to main.o(i.main) for main
|
||||
__rtentry2.o(.ARM.Collect$$rtentry$$0000000D) refers to exit.o(.text) for exit
|
||||
__rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$00000001) for .ARM.Collect$$rtentry$$00000001
|
||||
__rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$00000008) for .ARM.Collect$$rtentry$$00000008
|
||||
__rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) for .ARM.Collect$$rtentry$$0000000A
|
||||
__rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000B) for .ARM.Collect$$rtentry$$0000000B
|
||||
__rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) for .ARM.Collect$$rtentry$$0000000D
|
||||
__rtentry4.o(.ARM.Collect$$rtentry$$00000004) refers to sys_stackheap_outer.o(.text) for __user_setup_stackheap
|
||||
__rtentry4.o(.ARM.exidx) refers to __rtentry4.o(.ARM.Collect$$rtentry$$00000004) for .ARM.Collect$$rtentry$$00000004
|
||||
_printf_char_common.o(.text) refers to __printf_flags_wp.o(.text) for __printf
|
||||
sys_stackheap_outer.o(.text) refers to libspace.o(.text) for __user_perproc_libspace
|
||||
sys_stackheap_outer.o(.text) refers to startup_m451series.o(.text) for __user_initial_stackheap
|
||||
exit.o(.text) refers to rtexit.o(.ARM.Collect$$rtexit$$00000000) for __rt_exit
|
||||
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000002E) for __rt_lib_init_alloca_1
|
||||
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000002C) for __rt_lib_init_argv_1
|
||||
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001B) for __rt_lib_init_atexit_1
|
||||
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000021) for __rt_lib_init_clock_1
|
||||
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000032) for __rt_lib_init_cpp_1
|
||||
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000030) for __rt_lib_init_exceptions_1
|
||||
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000001) for __rt_lib_init_fp_1
|
||||
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001F) for __rt_lib_init_fp_trap_1
|
||||
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000023) for __rt_lib_init_getenv_1
|
||||
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000A) for __rt_lib_init_heap_1
|
||||
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000011) for __rt_lib_init_lc_collate_1
|
||||
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000013) for __rt_lib_init_lc_ctype_1
|
||||
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000015) for __rt_lib_init_lc_monetary_1
|
||||
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000017) for __rt_lib_init_lc_numeric_1
|
||||
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000019) for __rt_lib_init_lc_time_1
|
||||
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000004) for __rt_lib_init_preinit_1
|
||||
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000E) for __rt_lib_init_rand_1
|
||||
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000033) for __rt_lib_init_return
|
||||
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001D) for __rt_lib_init_signal_1
|
||||
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000025) for __rt_lib_init_stdio_1
|
||||
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000C) for __rt_lib_init_user_alloc_1
|
||||
libspace.o(.text) refers to libspace.o(.bss) for __libspace_start
|
||||
rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for __rt_exit_exit
|
||||
rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for __rt_exit_ls
|
||||
rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000002) for __rt_exit_prels_1
|
||||
rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for __rt_exit_exit
|
||||
rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for __rt_exit_ls
|
||||
rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000002) for __rt_exit_prels_1
|
||||
rtexit.o(.ARM.exidx) refers to rtexit.o(.ARM.Collect$$rtexit$$00000000) for .ARM.Collect$$rtexit$$00000000
|
||||
libinit2.o(.ARM.Collect$$libinit$$00000001) refers to fpinit.o(x$fpl$fpinit) for _fp_init
|
||||
libinit2.o(.ARM.Collect$$libinit$$00000010) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F
|
||||
libinit2.o(.ARM.Collect$$libinit$$00000012) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F
|
||||
libinit2.o(.ARM.Collect$$libinit$$00000014) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F
|
||||
libinit2.o(.ARM.Collect$$libinit$$00000016) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F
|
||||
libinit2.o(.ARM.Collect$$libinit$$00000018) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F
|
||||
libinit2.o(.ARM.Collect$$libinit$$00000026) refers to argv_veneer.o(.emb_text) for __ARM_argv_veneer
|
||||
libinit2.o(.ARM.Collect$$libinit$$00000027) refers to argv_veneer.o(.emb_text) for __ARM_argv_veneer
|
||||
rtexit2.o(.ARM.Collect$$rtexit$$00000003) refers to libshutdown.o(.ARM.Collect$$libshutdown$$00000000) for __rt_lib_shutdown
|
||||
rtexit2.o(.ARM.Collect$$rtexit$$00000004) refers to sys_exit.o(.text) for _sys_exit
|
||||
rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000001) for .ARM.Collect$$rtexit$$00000001
|
||||
rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for .ARM.Collect$$rtexit$$00000003
|
||||
rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for .ARM.Collect$$rtexit$$00000004
|
||||
argv_veneer.o(.emb_text) refers to no_argv.o(.text) for __ARM_get_argv
|
||||
sys_exit.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting
|
||||
sys_exit.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function
|
||||
_get_argv_nomalloc.o(.text) refers (Special) to hrguard.o(.text) for __heap_region$guard
|
||||
_get_argv_nomalloc.o(.text) refers to defsig_rtmem_outer.o(.text) for __rt_SIGRTMEM
|
||||
_get_argv_nomalloc.o(.text) refers to sys_command.o(.text) for _sys_command_string
|
||||
libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000002) for __rt_lib_shutdown_cpp_1
|
||||
libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000007) for __rt_lib_shutdown_fp_trap_1
|
||||
libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F) for __rt_lib_shutdown_heap_1
|
||||
libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000010) for __rt_lib_shutdown_return
|
||||
libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A) for __rt_lib_shutdown_signal_1
|
||||
libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000004) for __rt_lib_shutdown_stdio_1
|
||||
libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C) for __rt_lib_shutdown_user_alloc_1
|
||||
sys_command.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting
|
||||
sys_command.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function
|
||||
defsig_rtmem_outer.o(.text) refers to defsig_rtmem_inner.o(.text) for __rt_SIGRTMEM_inner
|
||||
defsig_rtmem_outer.o(.text) refers to defsig_exit.o(.text) for __sig_exit
|
||||
defsig_rtmem_formal.o(.text) refers to rt_raise.o(.text) for __rt_raise
|
||||
rt_raise.o(.text) refers to __raise.o(.text) for __raise
|
||||
rt_raise.o(.text) refers to sys_exit.o(.text) for _sys_exit
|
||||
defsig_exit.o(.text) refers to sys_exit.o(.text) for _sys_exit
|
||||
defsig_rtmem_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
|
||||
__raise.o(.text) refers to defsig.o(CL$$defsig) for __default_signal_handler
|
||||
defsig_general.o(.text) refers to retarget.o(i._ttywrch) for _ttywrch
|
||||
defsig.o(CL$$defsig) refers to defsig_rtmem_inner.o(.text) for __rt_SIGRTMEM_inner
|
||||
defsig_abrt_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
|
||||
defsig_fpe_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
|
||||
defsig_rtred_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
|
||||
defsig_stak_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
|
||||
defsig_pvfn_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
|
||||
defsig_cppl_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
|
||||
defsig_segv_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
|
||||
defsig_other.o(.text) refers to defsig_general.o(.text) for __default_signal_display
|
||||
|
||||
|
||||
==============================================================================
|
||||
|
||||
Removing Unused input sections from the image.
|
||||
|
||||
Removing main.o(.rev16_text), (4 bytes).
|
||||
Removing main.o(.revsh_text), (4 bytes).
|
||||
Removing main.o(.rrx_text), (6 bytes).
|
||||
Removing hal.o(.rev16_text), (4 bytes).
|
||||
Removing hal.o(.revsh_text), (4 bytes).
|
||||
Removing hal.o(.rrx_text), (6 bytes).
|
||||
Removing hal.o(i.MPUReadBuf), (572 bytes).
|
||||
Removing hal.o(i.MPUWriteACK), (164 bytes).
|
||||
Removing hal.o(i.MPUWriteAddr), (156 bytes).
|
||||
Removing mpu.o(i.MpuGetData), (184 bytes).
|
||||
Removing mpu.o(i.mpu6050_rest), (24 bytes).
|
||||
Removing mpu.o(.bss), (36 bytes).
|
||||
Removing mpu.o(.data), (4 bytes).
|
||||
Removing retarget.o(.rev16_text), (4 bytes).
|
||||
Removing retarget.o(.revsh_text), (4 bytes).
|
||||
Removing retarget.o(.rrx_text), (6 bytes).
|
||||
Removing retarget.o(i.GetChar), (28 bytes).
|
||||
Removing retarget.o(i.IsDebugFifoEmpty), (16 bytes).
|
||||
Removing retarget.o(i._ttywrch), (12 bytes).
|
||||
Removing retarget.o(i.fgetc), (10 bytes).
|
||||
Removing retarget.o(i.kbhit), (16 bytes).
|
||||
Removing system_m451series.o(.rev16_text), (4 bytes).
|
||||
Removing system_m451series.o(.revsh_text), (4 bytes).
|
||||
Removing system_m451series.o(.rrx_text), (6 bytes).
|
||||
Removing clk.o(.rev16_text), (4 bytes).
|
||||
Removing clk.o(.revsh_text), (4 bytes).
|
||||
Removing clk.o(.rrx_text), (6 bytes).
|
||||
Removing clk.o(i.CLK_DisableCKO), (16 bytes).
|
||||
Removing clk.o(i.CLK_DisableModuleClock), (44 bytes).
|
||||
Removing clk.o(i.CLK_DisableSysTick), (10 bytes).
|
||||
Removing clk.o(i.CLK_DisableXtalRC), (20 bytes).
|
||||
Removing clk.o(i.CLK_EnableCKO), (48 bytes).
|
||||
Removing clk.o(i.CLK_EnableSysTick), (72 bytes).
|
||||
Removing clk.o(i.CLK_GetCPUFreq), (16 bytes).
|
||||
Removing clk.o(i.CLK_GetHCLKFreq), (16 bytes).
|
||||
Removing clk.o(i.CLK_GetHXTFreq), (28 bytes).
|
||||
Removing clk.o(i.CLK_GetLXTFreq), (24 bytes).
|
||||
Removing clk.o(i.CLK_GetPCLK0Freq), (40 bytes).
|
||||
Removing clk.o(i.CLK_GetPCLK1Freq), (40 bytes).
|
||||
Removing clk.o(i.CLK_Idle), (40 bytes).
|
||||
Removing clk.o(i.CLK_PowerDown), (40 bytes).
|
||||
Removing clk.o(i.CLK_SetModuleClock), (84 bytes).
|
||||
Removing clk.o(i.CLK_SetSysTickClockSrc), (24 bytes).
|
||||
Removing i2c.o(.rev16_text), (4 bytes).
|
||||
Removing i2c.o(.revsh_text), (4 bytes).
|
||||
Removing i2c.o(.rrx_text), (6 bytes).
|
||||
Removing i2c.o(i.I2C_ClearTimeoutFlag), (10 bytes).
|
||||
Removing i2c.o(i.I2C_Close), (76 bytes).
|
||||
Removing i2c.o(i.I2C_DisableInt), (10 bytes).
|
||||
Removing i2c.o(i.I2C_DisableTimeout), (10 bytes).
|
||||
Removing i2c.o(i.I2C_DisableWakeup), (10 bytes).
|
||||
Removing i2c.o(i.I2C_EnableInt), (10 bytes).
|
||||
Removing i2c.o(i.I2C_EnableTimeout), (30 bytes).
|
||||
Removing i2c.o(i.I2C_EnableWakeup), (10 bytes).
|
||||
Removing i2c.o(i.I2C_GetData), (8 bytes).
|
||||
Removing i2c.o(i.I2C_GetIntFlag), (10 bytes).
|
||||
Removing i2c.o(i.I2C_GetStatus), (6 bytes).
|
||||
Removing i2c.o(i.I2C_SMBusClearInterruptFlag), (8 bytes).
|
||||
Removing i2c.o(i.I2C_SMBusClockLoTimeout), (70 bytes).
|
||||
Removing i2c.o(i.I2C_SMBusClose), (6 bytes).
|
||||
Removing i2c.o(i.I2C_SMBusGetPECValue), (8 bytes).
|
||||
Removing i2c.o(i.I2C_SMBusGetStatus), (6 bytes).
|
||||
Removing i2c.o(i.I2C_SMBusIdleTimeout), (50 bytes).
|
||||
Removing i2c.o(i.I2C_SMBusOpen), (32 bytes).
|
||||
Removing i2c.o(i.I2C_SMBusPECTxEnable), (30 bytes).
|
||||
Removing i2c.o(i.I2C_SMBusSetPacketByteCount), (4 bytes).
|
||||
Removing i2c.o(i.I2C_SMBusTimeout), (70 bytes).
|
||||
Removing i2c.o(i.I2C_SetBusClockFreq), (52 bytes).
|
||||
Removing i2c.o(i.I2C_SetData), (4 bytes).
|
||||
Removing i2c.o(i.I2C_SetSlaveAddrMask), (46 bytes).
|
||||
|
||||
70 unused section(s) (total 2444 bytes) removed from the image.
|
||||
|
||||
==============================================================================
|
||||
|
||||
Image Symbol Table
|
||||
|
||||
Local Symbols
|
||||
|
||||
Symbol Name Value Ov Type Size Object(Section)
|
||||
|
||||
RESET 0x00000000 Section 320 startup_m451series.o(RESET)
|
||||
../clib/angel/boardlib.s 0x00000000 Number 0 boardinit1.o ABSOLUTE
|
||||
../clib/angel/boardlib.s 0x00000000 Number 0 boardinit2.o ABSOLUTE
|
||||
../clib/angel/boardlib.s 0x00000000 Number 0 boardinit3.o ABSOLUTE
|
||||
../clib/angel/boardlib.s 0x00000000 Number 0 boardshut.o ABSOLUTE
|
||||
../clib/angel/handlers.s 0x00000000 Number 0 __scatter_copy.o ABSOLUTE
|
||||
../clib/angel/handlers.s 0x00000000 Number 0 __scatter_zi.o ABSOLUTE
|
||||
../clib/angel/kernel.s 0x00000000 Number 0 rtexit.o ABSOLUTE
|
||||
../clib/angel/kernel.s 0x00000000 Number 0 __rtentry.o ABSOLUTE
|
||||
../clib/angel/kernel.s 0x00000000 Number 0 rtexit2.o ABSOLUTE
|
||||
../clib/angel/kernel.s 0x00000000 Number 0 __rtentry2.o ABSOLUTE
|
||||
../clib/angel/kernel.s 0x00000000 Number 0 __rtentry4.o ABSOLUTE
|
||||
../clib/angel/rt.s 0x00000000 Number 0 rt_raise.o ABSOLUTE
|
||||
../clib/angel/scatter.s 0x00000000 Number 0 __scatter.o ABSOLUTE
|
||||
../clib/angel/startup.s 0x00000000 Number 0 __main.o ABSOLUTE
|
||||
../clib/angel/sys.s 0x00000000 Number 0 sys_stackheap_outer.o ABSOLUTE
|
||||
../clib/angel/sys.s 0x00000000 Number 0 indicate_semi.o ABSOLUTE
|
||||
../clib/angel/sys.s 0x00000000 Number 0 use_no_semi.o ABSOLUTE
|
||||
../clib/angel/sys.s 0x00000000 Number 0 libspace.o ABSOLUTE
|
||||
../clib/angel/sysapp.c 0x00000000 Number 0 sys_command.o ABSOLUTE
|
||||
../clib/angel/sysapp.c 0x00000000 Number 0 sys_exit.o ABSOLUTE
|
||||
../clib/armsys.c 0x00000000 Number 0 no_argv.o ABSOLUTE
|
||||
../clib/armsys.c 0x00000000 Number 0 _get_argv_nomalloc.o ABSOLUTE
|
||||
../clib/armsys.c 0x00000000 Number 0 argv_veneer.o ABSOLUTE
|
||||
../clib/armsys.c 0x00000000 Number 0 argv_veneer.o ABSOLUTE
|
||||
../clib/heapalloc.c 0x00000000 Number 0 hrguard.o ABSOLUTE
|
||||
../clib/heapaux.c 0x00000000 Number 0 heapauxi.o ABSOLUTE
|
||||
../clib/libinit.s 0x00000000 Number 0 libshutdown2.o ABSOLUTE
|
||||
../clib/libinit.s 0x00000000 Number 0 libinit2.o ABSOLUTE
|
||||
../clib/libinit.s 0x00000000 Number 0 libinit.o ABSOLUTE
|
||||
../clib/libinit.s 0x00000000 Number 0 libshutdown.o ABSOLUTE
|
||||
../clib/misc.s 0x00000000 Number 0 printf_stubs.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 _printf_intcommon.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 _printf_char_file.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 _printf_pad.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 __2printf.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 noretval__2printf.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 __printf.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 __printf_flags.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 _printf_dec.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 _printf_hex_ll.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 _printf_hex_int.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 _printf_hex_int_ll.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 _printf_hex_ptr.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 _printf_hex_int_ptr.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 _printf_hex_ll_ptr.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 _printf_hex_int_ll_ptr.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 __printf_ss.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 __printf_flags_ss.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 __printf_wp.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 __printf_nopercent.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 __printf_flags_wp.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 _printf_char_common.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 __printf_ss_wp.o ABSOLUTE
|
||||
../clib/printf.c 0x00000000 Number 0 __printf_flags_ss_wp.o ABSOLUTE
|
||||
../clib/printf_percent.s 0x00000000 Number 0 _printf_d.o ABSOLUTE
|
||||
../clib/printf_percent.s 0x00000000 Number 0 _printf_percent_end.o ABSOLUTE
|
||||
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|
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|
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|
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|
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|
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|
||||
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|
||||
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|
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|
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|
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|
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|
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|
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|
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|
||||
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|
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|
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|
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|
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|
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|
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|
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|
||||
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|
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||||
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||||
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|
||||
__rt_entry_li 0x000001d7 Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000A)
|
||||
__rt_entry_postsh_1 0x000001d7 Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$00000009)
|
||||
__rt_entry_main 0x000001db Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000D)
|
||||
__rt_entry_postli_1 0x000001db Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000C)
|
||||
__rt_exit 0x000001e3 Thumb Code 0 rtexit.o(.ARM.Collect$$rtexit$$00000000)
|
||||
__rt_exit_ls 0x000001e5 Thumb Code 0 rtexit2.o(.ARM.Collect$$rtexit$$00000003)
|
||||
__rt_exit_prels_1 0x000001e5 Thumb Code 0 rtexit2.o(.ARM.Collect$$rtexit$$00000002)
|
||||
__rt_exit_exit 0x000001e9 Thumb Code 0 rtexit2.o(.ARM.Collect$$rtexit$$00000004)
|
||||
HardFault_Handler 0x000001f1 Thumb Code 24 retarget.o(.emb_text)
|
||||
Reset_Handler 0x0000020d Thumb Code 50 startup_m451series.o(.text)
|
||||
NMI_Handler 0x0000023f Thumb Code 2 startup_m451series.o(.text)
|
||||
MemManage_Handler 0x00000243 Thumb Code 2 startup_m451series.o(.text)
|
||||
BusFault_Handler 0x00000245 Thumb Code 2 startup_m451series.o(.text)
|
||||
UsageFault_Handler 0x00000247 Thumb Code 2 startup_m451series.o(.text)
|
||||
SVC_Handler 0x00000249 Thumb Code 2 startup_m451series.o(.text)
|
||||
DebugMon_Handler 0x0000024b Thumb Code 2 startup_m451series.o(.text)
|
||||
PendSV_Handler 0x0000024d Thumb Code 2 startup_m451series.o(.text)
|
||||
SysTick_Handler 0x0000024f Thumb Code 2 startup_m451series.o(.text)
|
||||
ACMP01_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
ADC00_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
ADC01_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
ADC02_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
ADC03_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
BOD_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
BRAKE0_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
BRAKE1_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
CAN0_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
CLKFAIL_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
DAC_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
EINT0_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
EINT1_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
EINT2_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
EINT3_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
EINT4_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
EINT5_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
GPA_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
GPB_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
GPC_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
GPD_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
GPE_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
GPF_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
I2C0_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
I2C1_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
IRC_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
PDMA_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
PWM0P0_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
PWM0P1_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
PWM0P2_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
PWM1P0_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
PWM1P1_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
PWM1P2_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
PWRWU_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
RAMPE_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
RTC_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
SC0_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
SPI0_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
SPI1_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
SPI2_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
TAMPER_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
TK_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
TMR0_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
TMR1_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
TMR2_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
TMR3_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
UART0_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
UART1_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
UART2_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
UART3_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
USBD_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
USBH_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
USBOTG_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
WDT_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
WWDT_IRQHandler 0x00000251 Thumb Code 0 startup_m451series.o(.text)
|
||||
__user_initial_stackheap 0x00000255 Thumb Code 10 startup_m451series.o(.text)
|
||||
__2printf 0x00000281 Thumb Code 20 noretval__2printf.o(.text)
|
||||
_printf_pre_padding 0x00000299 Thumb Code 44 _printf_pad.o(.text)
|
||||
_printf_post_padding 0x000002c5 Thumb Code 34 _printf_pad.o(.text)
|
||||
_printf_int_dec 0x000002e9 Thumb Code 104 _printf_dec.o(.text)
|
||||
_printf_int_hex 0x00000361 Thumb Code 84 _printf_hex_int.o(.text)
|
||||
_printf_longlong_hex 0x00000361 Thumb Code 0 _printf_hex_int.o(.text)
|
||||
__printf 0x000003b9 Thumb Code 308 __printf_flags_wp.o(.text)
|
||||
__use_two_region_memory 0x000004f1 Thumb Code 2 heapauxi.o(.text)
|
||||
__rt_heap_escrow$2region 0x000004f3 Thumb Code 2 heapauxi.o(.text)
|
||||
__rt_heap_expand$2region 0x000004f5 Thumb Code 2 heapauxi.o(.text)
|
||||
_printf_int_common 0x000004f7 Thumb Code 178 _printf_intcommon.o(.text)
|
||||
_printf_char_file 0x000005a9 Thumb Code 32 _printf_char_file.o(.text)
|
||||
_printf_char_common 0x000005d7 Thumb Code 32 _printf_char_common.o(.text)
|
||||
__user_setup_stackheap 0x000005fd Thumb Code 74 sys_stackheap_outer.o(.text)
|
||||
exit 0x00000647 Thumb Code 18 exit.o(.text)
|
||||
__user_libspace 0x00000659 Thumb Code 8 libspace.o(.text)
|
||||
__user_perproc_libspace 0x00000659 Thumb Code 0 libspace.o(.text)
|
||||
__user_perthread_libspace 0x00000659 Thumb Code 0 libspace.o(.text)
|
||||
_sys_exit 0x00000661 Thumb Code 8 sys_exit.o(.text)
|
||||
__I$use$semihosting 0x0000066d Thumb Code 0 use_no_semi.o(.text)
|
||||
__use_no_semihosting_swi 0x0000066d Thumb Code 2 use_no_semi.o(.text)
|
||||
__semihosting_library_function 0x0000066f Thumb Code 0 indicate_semi.o(.text)
|
||||
CLK_DisablePLL 0x00000671 Thumb Code 18 clk.o(i.CLK_DisablePLL)
|
||||
CLK_EnableModuleClock 0x00000689 Thumb Code 44 clk.o(i.CLK_EnableModuleClock)
|
||||
CLK_EnablePLL 0x000006b5 Thumb Code 330 clk.o(i.CLK_EnablePLL)
|
||||
CLK_EnableXtalRC 0x0000082d Thumb Code 16 clk.o(i.CLK_EnableXtalRC)
|
||||
CLK_SetCoreClock 0x000008a5 Thumb Code 162 clk.o(i.CLK_SetCoreClock)
|
||||
CLK_SetHCLK 0x00000955 Thumb Code 118 clk.o(i.CLK_SetHCLK)
|
||||
CLK_WaitClockReady 0x000009d1 Thumb Code 32 clk.o(i.CLK_WaitClockReady)
|
||||
HalInit 0x000009f9 Thumb Code 180 main.o(i.HalInit)
|
||||
Hard_Fault_Handler 0x00000ad1 Thumb Code 18 retarget.o(i.Hard_Fault_Handler)
|
||||
I2C_GetBusClockFreq 0x00000afd Thumb Code 18 i2c.o(i.I2C_GetBusClockFreq)
|
||||
I2C_Open 0x00000b15 Thumb Code 54 i2c.o(i.I2C_Open)
|
||||
I2C_SetSlaveAddr 0x00000b51 Thumb Code 56 i2c.o(i.I2C_SetSlaveAddr)
|
||||
I2C_Trigger 0x00000b89 Thumb Code 44 i2c.o(i.I2C_Trigger)
|
||||
MPUReadReg 0x00000bb5 Thumb Code 384 hal.o(i.MPUReadReg)
|
||||
MPUWriteReg 0x00000df9 Thumb Code 246 hal.o(i.MPUWriteReg)
|
||||
MpuInit 0x00000f6d Thumb Code 108 mpu.o(i.MpuInit)
|
||||
SendChar 0x00000fd9 Thumb Code 12 retarget.o(i.SendChar)
|
||||
SendChar_ToUART 0x00000fe5 Thumb Code 44 retarget.o(i.SendChar_ToUART)
|
||||
SystemCoreClockUpdate 0x00001015 Thumb Code 2 system_m451series.o(i.SystemCoreClockUpdate)
|
||||
SystemInit 0x00001019 Thumb Code 104 system_m451series.o(i.SystemInit)
|
||||
_is_digit 0x0000108d Thumb Code 14 __printf_wp.o(i._is_digit)
|
||||
delay_ms 0x0000109b Thumb Code 36 mpu.o(i.delay_ms)
|
||||
ferror 0x000010bf Thumb Code 8 retarget.o(i.ferror)
|
||||
fputc 0x000010c7 Thumb Code 16 retarget.o(i.fputc)
|
||||
main 0x000010d7 Thumb Code 14 main.o(i.main)
|
||||
_fp_init 0x0000118d Thumb Code 10 fpinit.o(x$fpl$fpinit)
|
||||
__fplib_config_fpu_vfp 0x00001195 Thumb Code 0 fpinit.o(x$fpl$fpinit)
|
||||
__fplib_config_pureend_doubles 0x00001195 Thumb Code 0 fpinit.o(x$fpl$fpinit)
|
||||
Region$$Table$$Base 0x000011d0 Number 0 anon$$obj.o(Region$$Table)
|
||||
Region$$Table$$Limit 0x000011f0 Number 0 anon$$obj.o(Region$$Table)
|
||||
__stdout 0x20000000 Data 4 retarget.o(.data)
|
||||
__stdin 0x20000004 Data 4 retarget.o(.data)
|
||||
SystemCoreClock 0x20000008 Data 4 system_m451series.o(.data)
|
||||
CyclesPerUs 0x2000000c Data 4 system_m451series.o(.data)
|
||||
PllClock 0x20000010 Data 4 system_m451series.o(.data)
|
||||
gau32ClkSrcTbl 0x20000014 Data 32 system_m451series.o(.data)
|
||||
__libspace_start 0x20000034 Data 96 libspace.o(.bss)
|
||||
__temporary_stack_top$libspace 0x20000094 Data 0 libspace.o(.bss)
|
||||
|
||||
|
||||
|
||||
==============================================================================
|
||||
|
||||
Memory Map of the image
|
||||
|
||||
Image Entry point : 0x0000020d
|
||||
|
||||
Load Region LR_1 (Base: 0x00000000, Size: 0x00001224, Max: 0xffffffff, ABSOLUTE)
|
||||
|
||||
Execution Region ER_RO (Exec base: 0x00000000, Load base: 0x00000000, Size: 0x000011f0, Max: 0xffffffff, ABSOLUTE)
|
||||
|
||||
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
|
||||
|
||||
0x00000000 0x00000000 0x00000140 Data RO 347 RESET startup_m451series.o
|
||||
0x00000140 0x00000140 0x00000008 Code RO 796 * !!!main c_w.l(__main.o)
|
||||
0x00000148 0x00000148 0x00000034 Code RO 960 !!!scatter c_w.l(__scatter.o)
|
||||
0x0000017c 0x0000017c 0x0000001a Code RO 962 !!handler_copy c_w.l(__scatter_copy.o)
|
||||
0x00000196 0x00000196 0x00000002 PAD
|
||||
0x00000198 0x00000198 0x0000001c Code RO 964 !!handler_zi c_w.l(__scatter_zi.o)
|
||||
0x000001b4 0x000001b4 0x00000000 Code RO 793 .ARM.Collect$$_printf_percent$$00000000 c_w.l(_printf_percent.o)
|
||||
0x000001b4 0x000001b4 0x00000006 Code RO 792 .ARM.Collect$$_printf_percent$$00000009 c_w.l(_printf_d.o)
|
||||
0x000001ba 0x000001ba 0x00000006 Code RO 791 .ARM.Collect$$_printf_percent$$0000000C c_w.l(_printf_x.o)
|
||||
0x000001c0 0x000001c0 0x00000004 Code RO 803 .ARM.Collect$$_printf_percent$$00000017 c_w.l(_printf_percent_end.o)
|
||||
0x000001c4 0x000001c4 0x00000002 Code RO 832 .ARM.Collect$$libinit$$00000000 c_w.l(libinit.o)
|
||||
0x000001c6 0x000001c6 0x00000004 Code RO 838 .ARM.Collect$$libinit$$00000001 c_w.l(libinit2.o)
|
||||
0x000001ca 0x000001ca 0x00000000 Code RO 841 .ARM.Collect$$libinit$$00000004 c_w.l(libinit2.o)
|
||||
0x000001ca 0x000001ca 0x00000000 Code RO 844 .ARM.Collect$$libinit$$0000000A c_w.l(libinit2.o)
|
||||
0x000001ca 0x000001ca 0x00000000 Code RO 846 .ARM.Collect$$libinit$$0000000C c_w.l(libinit2.o)
|
||||
0x000001ca 0x000001ca 0x00000000 Code RO 848 .ARM.Collect$$libinit$$0000000E c_w.l(libinit2.o)
|
||||
0x000001ca 0x000001ca 0x00000000 Code RO 851 .ARM.Collect$$libinit$$00000011 c_w.l(libinit2.o)
|
||||
0x000001ca 0x000001ca 0x00000000 Code RO 853 .ARM.Collect$$libinit$$00000013 c_w.l(libinit2.o)
|
||||
0x000001ca 0x000001ca 0x00000000 Code RO 855 .ARM.Collect$$libinit$$00000015 c_w.l(libinit2.o)
|
||||
0x000001ca 0x000001ca 0x00000000 Code RO 857 .ARM.Collect$$libinit$$00000017 c_w.l(libinit2.o)
|
||||
0x000001ca 0x000001ca 0x00000000 Code RO 859 .ARM.Collect$$libinit$$00000019 c_w.l(libinit2.o)
|
||||
0x000001ca 0x000001ca 0x00000000 Code RO 861 .ARM.Collect$$libinit$$0000001B c_w.l(libinit2.o)
|
||||
0x000001ca 0x000001ca 0x00000000 Code RO 863 .ARM.Collect$$libinit$$0000001D c_w.l(libinit2.o)
|
||||
0x000001ca 0x000001ca 0x00000000 Code RO 865 .ARM.Collect$$libinit$$0000001F c_w.l(libinit2.o)
|
||||
0x000001ca 0x000001ca 0x00000000 Code RO 867 .ARM.Collect$$libinit$$00000021 c_w.l(libinit2.o)
|
||||
0x000001ca 0x000001ca 0x00000000 Code RO 869 .ARM.Collect$$libinit$$00000023 c_w.l(libinit2.o)
|
||||
0x000001ca 0x000001ca 0x00000000 Code RO 871 .ARM.Collect$$libinit$$00000025 c_w.l(libinit2.o)
|
||||
0x000001ca 0x000001ca 0x00000000 Code RO 875 .ARM.Collect$$libinit$$0000002C c_w.l(libinit2.o)
|
||||
0x000001ca 0x000001ca 0x00000000 Code RO 877 .ARM.Collect$$libinit$$0000002E c_w.l(libinit2.o)
|
||||
0x000001ca 0x000001ca 0x00000000 Code RO 879 .ARM.Collect$$libinit$$00000030 c_w.l(libinit2.o)
|
||||
0x000001ca 0x000001ca 0x00000000 Code RO 881 .ARM.Collect$$libinit$$00000032 c_w.l(libinit2.o)
|
||||
0x000001ca 0x000001ca 0x00000002 Code RO 882 .ARM.Collect$$libinit$$00000033 c_w.l(libinit2.o)
|
||||
0x000001cc 0x000001cc 0x00000002 Code RO 902 .ARM.Collect$$libshutdown$$00000000 c_w.l(libshutdown.o)
|
||||
0x000001ce 0x000001ce 0x00000000 Code RO 915 .ARM.Collect$$libshutdown$$00000002 c_w.l(libshutdown2.o)
|
||||
0x000001ce 0x000001ce 0x00000000 Code RO 917 .ARM.Collect$$libshutdown$$00000004 c_w.l(libshutdown2.o)
|
||||
0x000001ce 0x000001ce 0x00000000 Code RO 920 .ARM.Collect$$libshutdown$$00000007 c_w.l(libshutdown2.o)
|
||||
0x000001ce 0x000001ce 0x00000000 Code RO 923 .ARM.Collect$$libshutdown$$0000000A c_w.l(libshutdown2.o)
|
||||
0x000001ce 0x000001ce 0x00000000 Code RO 925 .ARM.Collect$$libshutdown$$0000000C c_w.l(libshutdown2.o)
|
||||
0x000001ce 0x000001ce 0x00000000 Code RO 928 .ARM.Collect$$libshutdown$$0000000F c_w.l(libshutdown2.o)
|
||||
0x000001ce 0x000001ce 0x00000002 Code RO 929 .ARM.Collect$$libshutdown$$00000010 c_w.l(libshutdown2.o)
|
||||
0x000001d0 0x000001d0 0x00000000 Code RO 798 .ARM.Collect$$rtentry$$00000000 c_w.l(__rtentry.o)
|
||||
0x000001d0 0x000001d0 0x00000000 Code RO 805 .ARM.Collect$$rtentry$$00000002 c_w.l(__rtentry2.o)
|
||||
0x000001d0 0x000001d0 0x00000006 Code RO 817 .ARM.Collect$$rtentry$$00000004 c_w.l(__rtentry4.o)
|
||||
0x000001d6 0x000001d6 0x00000000 Code RO 807 .ARM.Collect$$rtentry$$00000009 c_w.l(__rtentry2.o)
|
||||
0x000001d6 0x000001d6 0x00000004 Code RO 808 .ARM.Collect$$rtentry$$0000000A c_w.l(__rtentry2.o)
|
||||
0x000001da 0x000001da 0x00000000 Code RO 810 .ARM.Collect$$rtentry$$0000000C c_w.l(__rtentry2.o)
|
||||
0x000001da 0x000001da 0x00000008 Code RO 811 .ARM.Collect$$rtentry$$0000000D c_w.l(__rtentry2.o)
|
||||
0x000001e2 0x000001e2 0x00000002 Code RO 836 .ARM.Collect$$rtexit$$00000000 c_w.l(rtexit.o)
|
||||
0x000001e4 0x000001e4 0x00000000 Code RO 884 .ARM.Collect$$rtexit$$00000002 c_w.l(rtexit2.o)
|
||||
0x000001e4 0x000001e4 0x00000004 Code RO 885 .ARM.Collect$$rtexit$$00000003 c_w.l(rtexit2.o)
|
||||
0x000001e8 0x000001e8 0x00000006 Code RO 886 .ARM.Collect$$rtexit$$00000004 c_w.l(rtexit2.o)
|
||||
0x000001ee 0x000001ee 0x00000002 PAD
|
||||
0x000001f0 0x000001f0 0x0000001c Code RO 232 .emb_text retarget.o
|
||||
0x0000020c 0x0000020c 0x00000074 Code RO 348 * .text startup_m451series.o
|
||||
0x00000280 0x00000280 0x00000018 Code RO 742 .text c_w.l(noretval__2printf.o)
|
||||
0x00000298 0x00000298 0x0000004e Code RO 746 .text c_w.l(_printf_pad.o)
|
||||
0x000002e6 0x000002e6 0x00000002 PAD
|
||||
0x000002e8 0x000002e8 0x00000078 Code RO 748 .text c_w.l(_printf_dec.o)
|
||||
0x00000360 0x00000360 0x00000058 Code RO 753 .text c_w.l(_printf_hex_int.o)
|
||||
0x000003b8 0x000003b8 0x00000138 Code RO 783 .text c_w.l(__printf_flags_wp.o)
|
||||
0x000004f0 0x000004f0 0x00000006 Code RO 794 .text c_w.l(heapauxi.o)
|
||||
0x000004f6 0x000004f6 0x000000b2 Code RO 799 .text c_w.l(_printf_intcommon.o)
|
||||
0x000005a8 0x000005a8 0x00000024 Code RO 801 .text c_w.l(_printf_char_file.o)
|
||||
0x000005cc 0x000005cc 0x00000030 Code RO 819 .text c_w.l(_printf_char_common.o)
|
||||
0x000005fc 0x000005fc 0x0000004a Code RO 821 .text c_w.l(sys_stackheap_outer.o)
|
||||
0x00000646 0x00000646 0x00000012 Code RO 825 .text c_w.l(exit.o)
|
||||
0x00000658 0x00000658 0x00000008 Code RO 833 .text c_w.l(libspace.o)
|
||||
0x00000660 0x00000660 0x0000000c Code RO 894 .text c_w.l(sys_exit.o)
|
||||
0x0000066c 0x0000066c 0x00000002 Code RO 905 .text c_w.l(use_no_semi.o)
|
||||
0x0000066e 0x0000066e 0x00000000 Code RO 907 .text c_w.l(indicate_semi.o)
|
||||
0x0000066e 0x0000066e 0x00000002 PAD
|
||||
0x00000670 0x00000670 0x00000018 Code RO 393 i.CLK_DisablePLL clk.o
|
||||
0x00000688 0x00000688 0x0000002c Code RO 397 i.CLK_EnableModuleClock clk.o
|
||||
0x000006b4 0x000006b4 0x00000178 Code RO 398 i.CLK_EnablePLL clk.o
|
||||
0x0000082c 0x0000082c 0x00000014 Code RO 400 i.CLK_EnableXtalRC clk.o
|
||||
0x00000840 0x00000840 0x00000064 Code RO 407 i.CLK_GetPLLClockFreq clk.o
|
||||
0x000008a4 0x000008a4 0x000000b0 Code RO 410 i.CLK_SetCoreClock clk.o
|
||||
0x00000954 0x00000954 0x0000007c Code RO 411 i.CLK_SetHCLK clk.o
|
||||
0x000009d0 0x000009d0 0x00000028 Code RO 414 i.CLK_WaitClockReady clk.o
|
||||
0x000009f8 0x000009f8 0x000000d8 Code RO 4 i.HalInit main.o
|
||||
0x00000ad0 0x00000ad0 0x0000002c Code RO 234 i.Hard_Fault_Handler retarget.o
|
||||
0x00000afc 0x00000afc 0x00000018 Code RO 563 i.I2C_GetBusClockFreq i2c.o
|
||||
0x00000b14 0x00000b14 0x0000003c Code RO 567 i.I2C_Open i2c.o
|
||||
0x00000b50 0x00000b50 0x00000038 Code RO 580 i.I2C_SetSlaveAddr i2c.o
|
||||
0x00000b88 0x00000b88 0x0000002c Code RO 582 i.I2C_Trigger i2c.o
|
||||
0x00000bb4 0x00000bb4 0x00000244 Code RO 137 i.MPUReadReg hal.o
|
||||
0x00000df8 0x00000df8 0x00000174 Code RO 140 i.MPUWriteReg hal.o
|
||||
0x00000f6c 0x00000f6c 0x0000006c Code RO 192 i.MpuInit mpu.o
|
||||
0x00000fd8 0x00000fd8 0x0000000c Code RO 236 i.SendChar retarget.o
|
||||
0x00000fe4 0x00000fe4 0x00000030 Code RO 237 i.SendChar_ToUART retarget.o
|
||||
0x00001014 0x00001014 0x00000002 Code RO 355 i.SystemCoreClockUpdate system_m451series.o
|
||||
0x00001016 0x00001016 0x00000002 PAD
|
||||
0x00001018 0x00001018 0x00000074 Code RO 356 i.SystemInit system_m451series.o
|
||||
0x0000108c 0x0000108c 0x0000000e Code RO 781 i._is_digit c_w.l(__printf_wp.o)
|
||||
0x0000109a 0x0000109a 0x00000024 Code RO 193 i.delay_ms mpu.o
|
||||
0x000010be 0x000010be 0x00000008 Code RO 239 i.ferror retarget.o
|
||||
0x000010c6 0x000010c6 0x00000010 Code RO 241 i.fputc retarget.o
|
||||
0x000010d6 0x000010d6 0x0000000e Code RO 5 i.main main.o
|
||||
0x000010e4 0x000010e4 0x000000a8 Code RO 243 i.stackDump retarget.o
|
||||
0x0000118c 0x0000118c 0x0000000a Code RO 892 x$fpl$fpinit fz_wm.l(fpinit.o)
|
||||
0x00001196 0x00001196 0x00000028 Data RO 754 .constdata c_w.l(_printf_hex_int.o)
|
||||
0x000011be 0x000011be 0x00000011 Data RO 784 .constdata c_w.l(__printf_flags_wp.o)
|
||||
0x000011cf 0x000011cf 0x00000001 PAD
|
||||
0x000011d0 0x000011d0 0x00000020 Data RO 958 Region$$Table anon$$obj.o
|
||||
|
||||
|
||||
Execution Region ER_RW (Exec base: 0x20000000, Load base: 0x000011f0, Size: 0x00000034, Max: 0xffffffff, ABSOLUTE)
|
||||
|
||||
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
|
||||
|
||||
0x20000000 0x000011f0 0x00000008 Data RW 244 .data retarget.o
|
||||
0x20000008 0x000011f8 0x0000002c Data RW 357 .data system_m451series.o
|
||||
|
||||
|
||||
Execution Region ER_ZI (Exec base: 0x20000034, Load base: 0x00001224, Size: 0x00000464, Max: 0xffffffff, ABSOLUTE)
|
||||
|
||||
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
|
||||
|
||||
0x20000034 - 0x00000060 Zero RW 834 .bss c_w.l(libspace.o)
|
||||
0x20000094 0x00001224 0x00000004 PAD
|
||||
0x20000098 - 0x00000000 Zero RW 346 HEAP startup_m451series.o
|
||||
0x20000098 - 0x00000400 Zero RW 345 STACK startup_m451series.o
|
||||
|
||||
|
||||
==============================================================================
|
||||
|
||||
Image component sizes
|
||||
|
||||
|
||||
Code (inc. data) RO Data RW Data ZI Data Debug Object Name
|
||||
|
||||
904 100 0 0 0 20294 clk.o
|
||||
952 322 0 0 0 1599 hal.o
|
||||
184 12 0 0 0 3274 i2c.o
|
||||
230 36 0 0 0 237653 main.o
|
||||
144 0 0 0 0 2633 mpu.o
|
||||
324 132 0 8 0 5701 retarget.o
|
||||
116 36 320 0 1024 928 startup_m451series.o
|
||||
118 12 0 44 0 2003 system_m451series.o
|
||||
|
||||
----------------------------------------------------------------------
|
||||
2974 650 352 52 1024 274085 Object Totals
|
||||
0 0 32 0 0 0 (incl. Generated)
|
||||
2 0 0 0 0 0 (incl. Padding)
|
||||
|
||||
----------------------------------------------------------------------
|
||||
|
||||
Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name
|
||||
|
||||
8 0 0 0 0 68 __main.o
|
||||
312 4 17 0 0 92 __printf_flags_wp.o
|
||||
14 0 0 0 0 68 __printf_wp.o
|
||||
0 0 0 0 0 0 __rtentry.o
|
||||
12 0 0 0 0 0 __rtentry2.o
|
||||
6 0 0 0 0 0 __rtentry4.o
|
||||
52 8 0 0 0 0 __scatter.o
|
||||
26 0 0 0 0 0 __scatter_copy.o
|
||||
28 0 0 0 0 0 __scatter_zi.o
|
||||
48 6 0 0 0 96 _printf_char_common.o
|
||||
36 4 0 0 0 80 _printf_char_file.o
|
||||
6 0 0 0 0 0 _printf_d.o
|
||||
120 16 0 0 0 92 _printf_dec.o
|
||||
88 4 40 0 0 88 _printf_hex_int.o
|
||||
178 0 0 0 0 88 _printf_intcommon.o
|
||||
78 0 0 0 0 108 _printf_pad.o
|
||||
0 0 0 0 0 0 _printf_percent.o
|
||||
4 0 0 0 0 0 _printf_percent_end.o
|
||||
6 0 0 0 0 0 _printf_x.o
|
||||
18 0 0 0 0 80 exit.o
|
||||
6 0 0 0 0 152 heapauxi.o
|
||||
0 0 0 0 0 0 indicate_semi.o
|
||||
2 0 0 0 0 0 libinit.o
|
||||
6 0 0 0 0 0 libinit2.o
|
||||
2 0 0 0 0 0 libshutdown.o
|
||||
2 0 0 0 0 0 libshutdown2.o
|
||||
8 4 0 0 96 68 libspace.o
|
||||
24 4 0 0 0 84 noretval__2printf.o
|
||||
2 0 0 0 0 0 rtexit.o
|
||||
10 0 0 0 0 0 rtexit2.o
|
||||
12 4 0 0 0 68 sys_exit.o
|
||||
74 0 0 0 0 80 sys_stackheap_outer.o
|
||||
2 0 0 0 0 68 use_no_semi.o
|
||||
10 0 0 0 0 116 fpinit.o
|
||||
|
||||
----------------------------------------------------------------------
|
||||
1208 54 58 0 100 1496 Library Totals
|
||||
8 0 1 0 4 0 (incl. Padding)
|
||||
|
||||
----------------------------------------------------------------------
|
||||
|
||||
Code (inc. data) RO Data RW Data ZI Data Debug Library Name
|
||||
|
||||
1190 54 57 0 96 1380 c_w.l
|
||||
10 0 0 0 0 116 fz_wm.l
|
||||
|
||||
----------------------------------------------------------------------
|
||||
1208 54 58 0 100 1496 Library Totals
|
||||
|
||||
----------------------------------------------------------------------
|
||||
|
||||
==============================================================================
|
||||
|
||||
|
||||
Code (inc. data) RO Data RW Data ZI Data Debug
|
||||
|
||||
4182 704 410 52 1124 272857 Grand Totals
|
||||
4182 704 410 52 1124 272857 ELF Image Totals
|
||||
4182 704 410 52 0 0 ROM Totals
|
||||
|
||||
==============================================================================
|
||||
|
||||
Total RO Size (Code + RO Data) 4592 ( 4.48kB)
|
||||
Total RW Size (RW Data + ZI Data) 1176 ( 1.15kB)
|
||||
Total ROM Size (Code + RO Data + RW Data) 4644 ( 4.54kB)
|
||||
|
||||
==============================================================================
|
||||
|
Binary file not shown.
|
@ -0,0 +1,12 @@
|
|||
--cpu=Cortex-M4.fp
|
||||
".\objects\main.o"
|
||||
".\objects\hal.o"
|
||||
".\objects\mpu.o"
|
||||
".\objects\retarget.o"
|
||||
".\objects\startup_m451series.o"
|
||||
".\objects\system_m451series.o"
|
||||
".\objects\clk.o"
|
||||
".\objects\i2c.o"
|
||||
--ro-base 0x00000000 --entry 0x00000000 --rw-base 0x20000000 --entry Reset_Handler --first __Vectors --strict --summary_stderr --info summarysizes --map --load_addr_map_info --xref --callgraph --symbols
|
||||
--info sizes --info totals --info unused --info veneers
|
||||
--list ".\Listings\mpu9250.map" -o .\Objects\mpu9250.axf
|
|
@ -0,0 +1,674 @@
|
|||
/**************************************************************************//**
|
||||
* @file retarget.c
|
||||
* @version V3.00
|
||||
* $Revision: 14 $
|
||||
* $Date: 15/11/02 9:02a $
|
||||
* @brief M451 Series Debug Port and Semihost Setting Source File
|
||||
*
|
||||
* @note
|
||||
* Copyright (C) 2011~2015 Nuvoton Technology Corp. All rights reserved.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
|
||||
#include <stdio.h>
|
||||
#include "M451Series.h"
|
||||
|
||||
#if defined ( __CC_ARM )
|
||||
#if (__ARMCC_VERSION < 400000)
|
||||
#else
|
||||
/* Insist on keeping widthprec, to avoid X propagation by benign code in C-lib */
|
||||
#pragma import _printf_widthprec
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/*---------------------------------------------------------------------------------------------------------*/
|
||||
/* Global variables */
|
||||
/*---------------------------------------------------------------------------------------------------------*/
|
||||
#if !(defined(__ICCARM__) && (__VER__ >= 6010000))
|
||||
struct __FILE
|
||||
{
|
||||
int handle; /* Add whatever you need here */
|
||||
};
|
||||
#endif
|
||||
FILE __stdout;
|
||||
FILE __stdin;
|
||||
|
||||
enum { r0, r1, r2, r3, r12, lr, pc, psr};
|
||||
|
||||
/**
|
||||
* @brief Helper function to dump register while hard fault occurred
|
||||
* @param[in] stack pointer points to the dumped registers in SRAM
|
||||
* @return None
|
||||
* @details This function is implement to print r0, r1, r2, r3, r12, lr, pc, psr
|
||||
*/
|
||||
static void stackDump(uint32_t stack[])
|
||||
{
|
||||
printf("r0 = 0x%x\n", stack[r0]);
|
||||
printf("r1 = 0x%x\n", stack[r1]);
|
||||
printf("r2 = 0x%x\n", stack[r2]);
|
||||
printf("r3 = 0x%x\n", stack[r3]);
|
||||
printf("r12 = 0x%x\n", stack[r12]);
|
||||
printf("lr = 0x%x\n", stack[lr]);
|
||||
printf("pc = 0x%x\n", stack[pc]);
|
||||
printf("psr = 0x%x\n", stack[psr]);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Hard fault handler
|
||||
* @param[in] stack pointer points to the dumped registers in SRAM
|
||||
* @return None
|
||||
* @details Replace while(1) at the end of this function with chip reset if WDT is not enabled for end product
|
||||
*/
|
||||
void Hard_Fault_Handler(uint32_t stack[])
|
||||
{
|
||||
printf("In Hard Fault Handler\n");
|
||||
|
||||
stackDump(stack);
|
||||
// Replace while(1) with chip reset if WDT is not enabled for end product
|
||||
while(1);
|
||||
//SYS->IPRST0 = SYS_IPRST0_CHIPRST_Msk;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*---------------------------------------------------------------------------------------------------------*/
|
||||
/* Routine to write a char */
|
||||
/*---------------------------------------------------------------------------------------------------------*/
|
||||
|
||||
#if defined(DEBUG_ENABLE_SEMIHOST)
|
||||
/* The static buffer is used to speed up the semihost */
|
||||
static char g_buf[16];
|
||||
static char g_buf_len = 0;
|
||||
|
||||
# if defined(__ICCARM__)
|
||||
|
||||
void SH_End(void)
|
||||
{
|
||||
asm("MOVS R0,#1 \n" //; Set return value to 1
|
||||
"BX lr \n" //; Return
|
||||
);
|
||||
}
|
||||
|
||||
void SH_ICE(void)
|
||||
{
|
||||
asm("CMP R2,#0 \n"
|
||||
"BEQ SH_End \n"
|
||||
"STR R0,[R2] \n" //; Save the return value to *pn32Out_R0
|
||||
);
|
||||
}
|
||||
|
||||
/**
|
||||
*
|
||||
* @brief The function to process semihosted command
|
||||
* @param[in] n32In_R0 : semihost register 0
|
||||
* @param[in] n32In_R1 : semihost register 1
|
||||
* @param[out] pn32Out_R0: semihost register 0
|
||||
* @retval 0: No ICE debug
|
||||
* @retval 1: ICE debug
|
||||
*
|
||||
*/
|
||||
int32_t SH_DoCommand(int32_t n32In_R0, int32_t n32In_R1, int32_t *pn32Out_R0)
|
||||
{
|
||||
asm("BKPT 0xAB \n" //; This instruction will cause ICE trap or system HardFault
|
||||
"B SH_ICE \n"
|
||||
"SH_HardFault: \n" //; Captured by HardFault
|
||||
"MOVS R0,#0 \n" //; Set return value to 0
|
||||
"BX lr \n" //; Return
|
||||
);
|
||||
|
||||
return 1; //; Return 1 when it is trap by ICE
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get LR value and branch to Hard_Fault_Handler function
|
||||
* @param None
|
||||
* @return None
|
||||
* @details This function is use to get LR value and branch to Hard_Fault_Handler function.
|
||||
*/
|
||||
void Get_LR_and_Branch(void)
|
||||
{
|
||||
asm("MOV R1, LR \n" //; LR current value
|
||||
"B Hard_Fault_Handler \n"
|
||||
);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get MSP value and branch to Get_LR_and_Branch function
|
||||
* @param None
|
||||
* @return None
|
||||
* @details This function is use to get stack pointer value and branch to Get_LR_and_Branch function.
|
||||
*/
|
||||
void Stack_Use_MSP(void)
|
||||
{
|
||||
asm("MRS R0, MSP \n" //; read MSP
|
||||
"B Get_LR_and_Branch \n"
|
||||
);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get stack pointer value and branch to Get_LR_and_Branch function
|
||||
* @param None
|
||||
* @return None
|
||||
* @details This function is use to get stack pointer value and branch to Get_LR_and_Branch function.
|
||||
*/
|
||||
void HardFault_Handler_Ret(void)
|
||||
{
|
||||
asm("MOVS r0, #4 \n"
|
||||
"MOV r1, LR \n"
|
||||
"TST r0, r1 \n" //; check LR bit 2
|
||||
"BEQ Stack_Use_MSP \n" //; stack use MSP
|
||||
"MRS R0, PSP \n" //; stack use PSP, read PSP
|
||||
"B Get_LR_and_Branch \n"
|
||||
);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function is implemented to support semihost
|
||||
* @param None
|
||||
* @returns None
|
||||
* @details This function is implement to support semihost message print.
|
||||
*
|
||||
*/
|
||||
void SP_Read_Ready(void)
|
||||
{
|
||||
asm("LDR R1, [R0, #24] \n" //; Get previous PC
|
||||
"LDRH R3, [R1] \n" //; Get instruction
|
||||
"LDR R2, [pc, #8] \n" //; The special BKPT instruction
|
||||
"CMP R3, R2 \n" //; Test if the instruction at previous PC is BKPT
|
||||
"BNE HardFault_Handler_Ret \n" //; Not BKPT
|
||||
"ADDS R1, #4 \n" //; Skip BKPT and next line
|
||||
"STR R1, [R0, #24] \n" //; Save previous PC
|
||||
"BX lr \n" //; Return
|
||||
"DCD 0xBEAB \n" //; BKPT instruction code
|
||||
"B HardFault_Handler_Ret \n"
|
||||
);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get stack pointer value and branch to Get_LR_and_Branch function
|
||||
* @param None
|
||||
* @return None
|
||||
* @details This function is use to get stack pointer value and branch to Get_LR_and_Branch function.
|
||||
*/
|
||||
void SP_is_PSP(void)
|
||||
{
|
||||
asm(
|
||||
"MRS R0, PSP \n" //; stack use PSP, read PSP
|
||||
"B Get_LR_and_Branch \n"
|
||||
|
||||
);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This HardFault handler is implemented to support semihost
|
||||
*
|
||||
* @param None
|
||||
*
|
||||
* @returns None
|
||||
*
|
||||
* @details This function is implement to support semihost message print.
|
||||
*
|
||||
*/
|
||||
void HardFault_Handler (void)
|
||||
{
|
||||
asm("MOV R0, lr \n"
|
||||
"LSLS R0, #29 \n" //; Check bit 2
|
||||
"BMI SP_is_PSP \n" //; previous stack is PSP
|
||||
"MRS R0, MSP \n" //; previous stack is MSP, read MSP
|
||||
"B SP_Read_Ready \n"
|
||||
);
|
||||
|
||||
while(1);
|
||||
}
|
||||
|
||||
# else
|
||||
|
||||
/**
|
||||
* @brief This HardFault handler is implemented to support semihost
|
||||
* @param None
|
||||
* @returns None
|
||||
* @details This function is implement to support semihost message print.
|
||||
*
|
||||
*/
|
||||
__asm int32_t HardFault_Handler(void)
|
||||
{
|
||||
MOV R0, LR
|
||||
LSLS R0, #29 //; Check bit 2
|
||||
BMI SP_is_PSP //; previous stack is PSP
|
||||
MRS R0, MSP //; previous stack is MSP, read MSP
|
||||
B SP_Read_Ready
|
||||
SP_is_PSP
|
||||
MRS R0, PSP //; Read PSP
|
||||
|
||||
SP_Read_Ready
|
||||
LDR R1, [R0, #24] //; Get previous PC
|
||||
LDRH R3, [R1] //; Get instruction
|
||||
LDR R2, =0xBEAB //; The special BKPT instruction
|
||||
CMP R3, R2 //; Test if the instruction at previous PC is BKPT
|
||||
BNE HardFault_Handler_Ret //; Not BKPT
|
||||
|
||||
ADDS R1, #4 //; Skip BKPT and next line
|
||||
STR R1, [R0, #24] //; Save previous PC
|
||||
|
||||
BX LR //; Return
|
||||
HardFault_Handler_Ret
|
||||
|
||||
/* TODO: Implement your own hard fault handler here. */
|
||||
MOVS r0, #4
|
||||
MOV r1, LR
|
||||
TST r0, r1 //; check LR bit 2
|
||||
BEQ Stack_Use_MSP //; stack use MSP
|
||||
MRS R0, PSP ;stack use PSP //; stack use PSP, read PSP
|
||||
B Get_LR_and_Branch
|
||||
Stack_Use_MSP
|
||||
MRS R0, MSP ; stack use MSP //; read MSP
|
||||
Get_LR_and_Branch
|
||||
MOV R1, LR ; LR current value //; LR current value
|
||||
LDR R2,=__cpp(Hard_Fault_Handler) //; branch to Hard_Fault_Handler
|
||||
BX R2
|
||||
|
||||
B .
|
||||
|
||||
ALIGN
|
||||
}
|
||||
|
||||
/**
|
||||
*
|
||||
* @brief The function to process semihosted command
|
||||
* @param[in] n32In_R0 : semihost register 0
|
||||
* @param[in] n32In_R1 : semihost register 1
|
||||
* @param[out] pn32Out_R0: semihost register 0
|
||||
* @retval 0: No ICE debug
|
||||
* @retval 1: ICE debug
|
||||
*
|
||||
*/
|
||||
__asm int32_t SH_DoCommand(int32_t n32In_R0, int32_t n32In_R1, int32_t *pn32Out_R0)
|
||||
{
|
||||
BKPT 0xAB //; Wait ICE or HardFault
|
||||
//; ICE will step over BKPT directly
|
||||
//; HardFault will step BKPT and the next line
|
||||
B SH_ICE
|
||||
|
||||
SH_HardFault //; Captured by HardFault
|
||||
MOVS R0, #0 //; Set return value to 0
|
||||
BX lr //; Return
|
||||
|
||||
SH_ICE //; Captured by ICE
|
||||
//; Save return value
|
||||
CMP R2, #0
|
||||
BEQ SH_End
|
||||
STR R0, [R2] //; Save the return value to *pn32Out_R0
|
||||
|
||||
SH_End
|
||||
MOVS R0, #1 //; Set return value to 1
|
||||
BX lr //; Return
|
||||
}
|
||||
#endif
|
||||
|
||||
#else
|
||||
|
||||
# if defined(__ICCARM__)
|
||||
|
||||
void Get_LR_and_Branch(void)
|
||||
{
|
||||
asm("MOV R1, LR \n" //; LR current value
|
||||
"B Hard_Fault_Handler \n"
|
||||
);
|
||||
}
|
||||
|
||||
void Stack_Use_MSP(void)
|
||||
{
|
||||
asm("MRS R0, MSP \n" //; read MSP
|
||||
"B Get_LR_and_Branch \n"
|
||||
);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This HardFault handler is implemented to show r0, r1, r2, r3, r12, lr, pc, psr
|
||||
*
|
||||
* @param None
|
||||
*
|
||||
* @returns None
|
||||
*
|
||||
* @details This function is implement to print r0, r1, r2, r3, r12, lr, pc, psr.
|
||||
*
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
asm("MOVS r0, #4 \n"
|
||||
"MOV r1, LR \n"
|
||||
"TST r0, r1 \n" //; check LR bit 2
|
||||
"BEQ Stack_Use_MSP \n" //; stack use MSP
|
||||
"MRS R0, PSP \n" //; stack use PSP, read PSP
|
||||
"B Get_LR_and_Branch \n"
|
||||
);
|
||||
|
||||
while(1);
|
||||
}
|
||||
|
||||
# else
|
||||
|
||||
/**
|
||||
* @brief This HardFault handler is implemented to show r0, r1, r2, r3, r12, lr, pc, psr
|
||||
*
|
||||
* @param None
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
* @details The function extracts the location of stack frame and passes it to Hard_Fault_Handler function as a pointer
|
||||
*
|
||||
*/
|
||||
__asm int32_t HardFault_Handler(void)
|
||||
{
|
||||
MOVS r0, #4
|
||||
MOV r1, LR
|
||||
TST r0, r1 //; check LR bit 2
|
||||
BEQ Stack_Use_MSP //; stack use MSP
|
||||
MRS R0, PSP //; stack use PSP, read PSP
|
||||
B Get_LR_and_Branch
|
||||
Stack_Use_MSP
|
||||
MRS R0, MSP //; read MSP
|
||||
Get_LR_and_Branch
|
||||
MOV R1, LR //; LR current value
|
||||
LDR R2,=__cpp(Hard_Fault_Handler) //; branch to Hard_Fault_Handler
|
||||
BX R2
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* @brief Routine to send a char
|
||||
*
|
||||
* @param[in] ch Character to send to debug port.
|
||||
*
|
||||
* @returns Send value from UART debug port
|
||||
*
|
||||
* @details Send a target char to UART debug port .
|
||||
*/
|
||||
#ifndef NONBLOCK_PRINTF
|
||||
void SendChar_ToUART(int ch)
|
||||
{
|
||||
while(DEBUG_PORT->FIFOSTS & UART_FIFOSTS_TXFULL_Msk);
|
||||
|
||||
DEBUG_PORT->DAT = ch;
|
||||
if(ch == '\n')
|
||||
{
|
||||
while(DEBUG_PORT->FIFOSTS & UART_FIFOSTS_TXFULL_Msk);
|
||||
DEBUG_PORT->DAT = '\r';
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
/* Non-block implement of send char */
|
||||
#define BUF_SIZE 2048
|
||||
void SendChar_ToUART(int ch)
|
||||
{
|
||||
static uint8_t u8Buf[BUF_SIZE] = {0};
|
||||
static int32_t i32Head = 0;
|
||||
static int32_t i32Tail = 0;
|
||||
int32_t i32Tmp;
|
||||
|
||||
/* Only flush the data in buffer to UART when ch == 0 */
|
||||
if(ch)
|
||||
{
|
||||
// Push char
|
||||
i32Tmp = i32Head+1;
|
||||
if(i32Tmp > BUF_SIZE) i32Tmp = 0;
|
||||
if(i32Tmp != i32Tail)
|
||||
{
|
||||
u8Buf[i32Head] = ch;
|
||||
i32Head = i32Tmp;
|
||||
}
|
||||
|
||||
if(ch == '\n')
|
||||
{
|
||||
i32Tmp = i32Head+1;
|
||||
if(i32Tmp > BUF_SIZE) i32Tmp = 0;
|
||||
if(i32Tmp != i32Tail)
|
||||
{
|
||||
u8Buf[i32Head] = '\r';
|
||||
i32Head = i32Tmp;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if(i32Tail == i32Head)
|
||||
return;
|
||||
}
|
||||
|
||||
// pop char
|
||||
do
|
||||
{
|
||||
i32Tmp = i32Tail + 1;
|
||||
if(i32Tmp > BUF_SIZE) i32Tmp = 0;
|
||||
|
||||
if((DEBUG_PORT->FIFOSTS & UART_FIFOSTS_TXFULL_Msk) == 0)
|
||||
{
|
||||
DEBUG_PORT->DAT = u8Buf[i32Tail];
|
||||
i32Tail = i32Tmp;
|
||||
}
|
||||
else
|
||||
break; // FIFO full
|
||||
}while(i32Tail != i32Head);
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Routine to send a char
|
||||
*
|
||||
* @param[in] ch Character to send to debug port.
|
||||
*
|
||||
* @returns Send value from UART debug port or semihost
|
||||
*
|
||||
* @details Send a target char to UART debug port or semihost.
|
||||
*/
|
||||
void SendChar(int ch)
|
||||
{
|
||||
#if defined(DEBUG_ENABLE_SEMIHOST)
|
||||
g_buf[g_buf_len++] = ch;
|
||||
g_buf[g_buf_len] = '\0';
|
||||
if(g_buf_len + 1 >= sizeof(g_buf) || ch == '\n' || ch == '\0')
|
||||
{
|
||||
/* Send the char */
|
||||
if(SH_DoCommand(0x04, (int)g_buf, NULL) != 0)
|
||||
{
|
||||
g_buf_len = 0;
|
||||
return;
|
||||
}
|
||||
else
|
||||
{
|
||||
g_buf_len = 0;
|
||||
}
|
||||
}
|
||||
#else
|
||||
SendChar_ToUART(ch);
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Routine to get a char
|
||||
*
|
||||
* @param None
|
||||
*
|
||||
* @returns Get value from UART debug port or semihost
|
||||
*
|
||||
* @details Wait UART debug port or semihost to input a char.
|
||||
*/
|
||||
char GetChar(void)
|
||||
{
|
||||
#ifdef DEBUG_ENABLE_SEMIHOST
|
||||
# if defined (__CC_ARM)
|
||||
int nRet;
|
||||
while(SH_DoCommand(0x101, 0, &nRet) != 0)
|
||||
{
|
||||
if(nRet != 0)
|
||||
{
|
||||
SH_DoCommand(0x07, 0, &nRet);
|
||||
return (char)nRet;
|
||||
}
|
||||
}
|
||||
# else
|
||||
int nRet;
|
||||
while(SH_DoCommand(0x7, 0, &nRet) != 0)
|
||||
{
|
||||
if(nRet != 0)
|
||||
return (char)nRet;
|
||||
}
|
||||
# endif
|
||||
return (0);
|
||||
#else
|
||||
|
||||
while(1)
|
||||
{
|
||||
if((DEBUG_PORT->FIFOSTS & UART_FIFOSTS_RXEMPTY_Msk) == 0)
|
||||
{
|
||||
return (DEBUG_PORT->DAT);
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check any char input from UART
|
||||
*
|
||||
* @param None
|
||||
*
|
||||
* @retval 1: No any char input
|
||||
* @retval 0: Have some char input
|
||||
*
|
||||
* @details Check UART RSR RX EMPTY or not to determine if any char input from UART
|
||||
*/
|
||||
|
||||
int kbhit(void)
|
||||
{
|
||||
return !((DEBUG_PORT->FIFOSTS & UART_FIFOSTS_RXEMPTY_Msk) == 0);
|
||||
}
|
||||
/**
|
||||
* @brief Check if debug message finished
|
||||
*
|
||||
* @param None
|
||||
*
|
||||
* @retval 1: Message is finished
|
||||
* @retval 0: Message is transmitting.
|
||||
*
|
||||
* @details Check if message finished (FIFO empty of debug port)
|
||||
*/
|
||||
|
||||
int IsDebugFifoEmpty(void)
|
||||
{
|
||||
return ((DEBUG_PORT->FIFOSTS & UART_FIFOSTS_TXEMPTYF_Msk) != 0);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief C library retargetting
|
||||
*
|
||||
* @param[in] ch Character to send to debug port.
|
||||
*
|
||||
* @returns None
|
||||
*
|
||||
* @details Check if message finished (FIFO empty of debug port)
|
||||
*/
|
||||
|
||||
void _ttywrch(int ch)
|
||||
{
|
||||
SendChar(ch);
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Write character to stream
|
||||
*
|
||||
* @param[in] ch Character to be written. The character is passed as its int promotion.
|
||||
* @param[in] stream Pointer to a FILE object that identifies the stream where the character is to be written.
|
||||
*
|
||||
* @returns If there are no errors, the same character that has been written is returned.
|
||||
* If an error occurs, EOF is returned and the error indicator is set (see ferror).
|
||||
*
|
||||
* @details Writes a character to the stream and advances the position indicator.\n
|
||||
* The character is written at the current position of the stream as indicated \n
|
||||
* by the internal position indicator, which is then advanced one character.
|
||||
*
|
||||
* @note The above descriptions are copied from http://www.cplusplus.com/reference/clibrary/cstdio/fputc/.
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
int fputc(int ch, FILE *stream)
|
||||
{
|
||||
SendChar(ch);
|
||||
return ch;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Get character from UART debug port or semihosting input
|
||||
*
|
||||
* @param[in] stream Pointer to a FILE object that identifies the stream on which the operation is to be performed.
|
||||
*
|
||||
* @returns The character read from UART debug port or semihosting
|
||||
*
|
||||
* @details For get message from debug port or semihosting.
|
||||
*
|
||||
*/
|
||||
|
||||
int fgetc(FILE *stream)
|
||||
{
|
||||
return (GetChar());
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check error indicator
|
||||
*
|
||||
* @param[in] stream Pointer to a FILE object that identifies the stream.
|
||||
*
|
||||
* @returns If the error indicator associated with the stream was set, the function returns a nonzero value.
|
||||
* Otherwise, it returns a zero value.
|
||||
*
|
||||
* @details Checks if the error indicator associated with stream is set, returning a value different
|
||||
* from zero if it is. This indicator is generally set by a previous operation on the stream that failed.
|
||||
*
|
||||
* @note The above descriptions are copied from http://www.cplusplus.com/reference/clibrary/cstdio/ferror/.
|
||||
*
|
||||
*/
|
||||
|
||||
int ferror(FILE *stream)
|
||||
{
|
||||
return EOF;
|
||||
}
|
||||
|
||||
#ifdef DEBUG_ENABLE_SEMIHOST
|
||||
# ifdef __ICCARM__
|
||||
void __exit(int return_code)
|
||||
{
|
||||
|
||||
/* Check if link with ICE */
|
||||
if(SH_DoCommand(0x18, 0x20026, NULL) == 0)
|
||||
{
|
||||
/* Make sure all message is print out */
|
||||
while(IsDebugFifoEmpty() == 0);
|
||||
}
|
||||
label:
|
||||
goto label; /* endless loop */
|
||||
}
|
||||
# else
|
||||
void _sys_exit(int return_code)
|
||||
{
|
||||
|
||||
/* Check if link with ICE */
|
||||
if(SH_DoCommand(0x18, 0x20026, NULL) == 0)
|
||||
{
|
||||
/* Make sure all message is print out */
|
||||
while(IsDebugFifoEmpty() == 0);
|
||||
}
|
||||
label:
|
||||
goto label; /* endless loop */
|
||||
}
|
||||
# endif
|
||||
#endif
|
|
@ -0,0 +1,376 @@
|
|||
;/******************************************************************************
|
||||
; * @file startup_M451Series.s
|
||||
; * @version V0.10
|
||||
; * $Revision: 5 $
|
||||
; * $Date: 14/12/24 10:20a $
|
||||
; * @brief CMSIS Cortex-M4 Core Device Startup File for M451 Series MCU
|
||||
; *
|
||||
; * @note
|
||||
; * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
|
||||
;*****************************************************************************/
|
||||
;/*
|
||||
;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
|
||||
;*/
|
||||
|
||||
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
; User may overwrite stack size setting by pre-defined symbol
|
||||
IF :LNOT: :DEF: Stack_Size
|
||||
Stack_Size EQU 0x00000400
|
||||
ENDIF
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
IF :LNOT: :DEF: Heap_Size
|
||||
Heap_Size EQU 0x00000000
|
||||
ENDIF
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD BOD_IRQHandler ; 0: Brown Out detection
|
||||
DCD IRC_IRQHandler ; 1: Internal RC
|
||||
DCD PWRWU_IRQHandler ; 2: Power down wake up
|
||||
DCD RAMPE_IRQHandler ; 3: RAM parity error
|
||||
DCD CLKFAIL_IRQHandler ; 4: Clock detection fail
|
||||
DCD Default_Handler ; 5: Reserved
|
||||
DCD RTC_IRQHandler ; 6: Real Time Clock
|
||||
DCD TAMPER_IRQHandler ; 7: Tamper detection
|
||||
DCD WDT_IRQHandler ; 8: Watchdog timer
|
||||
DCD WWDT_IRQHandler ; 9: Window watchdog timer
|
||||
DCD EINT0_IRQHandler ; 10: External Input 0
|
||||
DCD EINT1_IRQHandler ; 11: External Input 1
|
||||
DCD EINT2_IRQHandler ; 12: External Input 2
|
||||
DCD EINT3_IRQHandler ; 13: External Input 3
|
||||
DCD EINT4_IRQHandler ; 14: External Input 4
|
||||
DCD EINT5_IRQHandler ; 15: External Input 5
|
||||
DCD GPA_IRQHandler ; 16: GPIO Port A
|
||||
DCD GPB_IRQHandler ; 17: GPIO Port B
|
||||
DCD GPC_IRQHandler ; 18: GPIO Port C
|
||||
DCD GPD_IRQHandler ; 19: GPIO Port D
|
||||
DCD GPE_IRQHandler ; 20: GPIO Port E
|
||||
DCD GPF_IRQHandler ; 21: GPIO Port F
|
||||
DCD SPI0_IRQHandler ; 22: SPI0
|
||||
DCD SPI1_IRQHandler ; 23: SPI1
|
||||
DCD BRAKE0_IRQHandler ; 24:
|
||||
DCD PWM0P0_IRQHandler ; 25:
|
||||
DCD PWM0P1_IRQHandler ; 26:
|
||||
DCD PWM0P2_IRQHandler ; 27:
|
||||
DCD BRAKE1_IRQHandler ; 28:
|
||||
DCD PWM1P0_IRQHandler ; 29:
|
||||
DCD PWM1P1_IRQHandler ; 30:
|
||||
DCD PWM1P2_IRQHandler ; 31:
|
||||
DCD TMR0_IRQHandler ; 32: Timer 0
|
||||
DCD TMR1_IRQHandler ; 33: Timer 1
|
||||
DCD TMR2_IRQHandler ; 34: Timer 2
|
||||
DCD TMR3_IRQHandler ; 35: Timer 3
|
||||
DCD UART0_IRQHandler ; 36: UART0
|
||||
DCD UART1_IRQHandler ; 37: UART1
|
||||
DCD I2C0_IRQHandler ; 38: I2C0
|
||||
DCD I2C1_IRQHandler ; 39: I2C1
|
||||
DCD PDMA_IRQHandler ; 40: Peripheral DMA
|
||||
DCD DAC_IRQHandler ; 41: DAC
|
||||
DCD ADC00_IRQHandler ; 42: ADC0 interrupt source 0
|
||||
DCD ADC01_IRQHandler ; 43: ADC0 interrupt source 1
|
||||
DCD ACMP01_IRQHandler ; 44: ACMP0 and ACMP1
|
||||
DCD Default_Handler ; 45: Reserved
|
||||
DCD ADC02_IRQHandler ; 46: ADC0 interrupt source 2
|
||||
DCD ADC03_IRQHandler ; 47: ADC0 interrupt source 3
|
||||
DCD UART2_IRQHandler ; 48: UART2
|
||||
DCD UART3_IRQHandler ; 49: UART3
|
||||
DCD Default_Handler ; 50: Reserved
|
||||
DCD SPI2_IRQHandler ; 51: SPI2
|
||||
DCD Default_Handler ; 52: Reserved
|
||||
DCD USBD_IRQHandler ; 53: USB device
|
||||
DCD USBH_IRQHandler ; 54: USB host
|
||||
DCD USBOTG_IRQHandler ; 55: USB OTG
|
||||
DCD CAN0_IRQHandler ; 56: CAN0
|
||||
DCD Default_Handler ; 57: Reserved
|
||||
DCD SC0_IRQHandler ; 58:
|
||||
DCD Default_Handler ; 59: Reserved.
|
||||
DCD Default_Handler ; 60:
|
||||
DCD Default_Handler ; 61:
|
||||
DCD Default_Handler ; 62:
|
||||
DCD TK_IRQHandler ; 63:
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
|
||||
; Reset Handler
|
||||
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =0x40000100
|
||||
; Unlock Register
|
||||
LDR R1, =0x59
|
||||
STR R1, [R0]
|
||||
LDR R1, =0x16
|
||||
STR R1, [R0]
|
||||
LDR R1, =0x88
|
||||
STR R1, [R0]
|
||||
|
||||
; Init POR
|
||||
LDR R2, =0x40000024
|
||||
LDR R1, =0x00005AA5
|
||||
STR R1, [R2]
|
||||
|
||||
; Select INV Type
|
||||
LDR R2, =0x40000200
|
||||
LDR R1, [R2]
|
||||
BIC R1, R1, #0x1000
|
||||
STR R1, [R2]
|
||||
|
||||
; Lock register
|
||||
MOVS R1, #0
|
||||
STR R1, [R0]
|
||||
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler\
|
||||
PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler\
|
||||
PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT BOD_IRQHandler [WEAK]
|
||||
EXPORT IRC_IRQHandler [WEAK]
|
||||
EXPORT PWRWU_IRQHandler [WEAK]
|
||||
EXPORT RAMPE_IRQHandler [WEAK]
|
||||
EXPORT CLKFAIL_IRQHandler [WEAK]
|
||||
EXPORT RTC_IRQHandler [WEAK]
|
||||
EXPORT TAMPER_IRQHandler [WEAK]
|
||||
EXPORT WDT_IRQHandler [WEAK]
|
||||
EXPORT WWDT_IRQHandler [WEAK]
|
||||
EXPORT EINT0_IRQHandler [WEAK]
|
||||
EXPORT EINT1_IRQHandler [WEAK]
|
||||
EXPORT EINT2_IRQHandler [WEAK]
|
||||
EXPORT EINT3_IRQHandler [WEAK]
|
||||
EXPORT EINT4_IRQHandler [WEAK]
|
||||
EXPORT EINT5_IRQHandler [WEAK]
|
||||
EXPORT GPA_IRQHandler [WEAK]
|
||||
EXPORT GPB_IRQHandler [WEAK]
|
||||
EXPORT GPC_IRQHandler [WEAK]
|
||||
EXPORT GPD_IRQHandler [WEAK]
|
||||
EXPORT GPE_IRQHandler [WEAK]
|
||||
EXPORT GPF_IRQHandler [WEAK]
|
||||
EXPORT SPI0_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT BRAKE0_IRQHandler [WEAK]
|
||||
EXPORT PWM0P0_IRQHandler [WEAK]
|
||||
EXPORT PWM0P1_IRQHandler [WEAK]
|
||||
EXPORT PWM0P2_IRQHandler [WEAK]
|
||||
EXPORT BRAKE1_IRQHandler [WEAK]
|
||||
EXPORT PWM1P0_IRQHandler [WEAK]
|
||||
EXPORT PWM1P1_IRQHandler [WEAK]
|
||||
EXPORT PWM1P2_IRQHandler [WEAK]
|
||||
EXPORT TMR0_IRQHandler [WEAK]
|
||||
EXPORT TMR1_IRQHandler [WEAK]
|
||||
EXPORT TMR2_IRQHandler [WEAK]
|
||||
EXPORT TMR3_IRQHandler [WEAK]
|
||||
EXPORT UART0_IRQHandler [WEAK]
|
||||
EXPORT UART1_IRQHandler [WEAK]
|
||||
EXPORT I2C0_IRQHandler [WEAK]
|
||||
EXPORT I2C1_IRQHandler [WEAK]
|
||||
EXPORT PDMA_IRQHandler [WEAK]
|
||||
EXPORT DAC_IRQHandler [WEAK]
|
||||
EXPORT ADC00_IRQHandler [WEAK]
|
||||
EXPORT ADC01_IRQHandler [WEAK]
|
||||
EXPORT ACMP01_IRQHandler [WEAK]
|
||||
EXPORT ADC02_IRQHandler [WEAK]
|
||||
EXPORT ADC03_IRQHandler [WEAK]
|
||||
EXPORT UART2_IRQHandler [WEAK]
|
||||
EXPORT UART3_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USBD_IRQHandler [WEAK]
|
||||
EXPORT USBH_IRQHandler [WEAK]
|
||||
EXPORT USBOTG_IRQHandler [WEAK]
|
||||
EXPORT CAN0_IRQHandler [WEAK]
|
||||
EXPORT SC0_IRQHandler [WEAK]
|
||||
EXPORT TK_IRQHandler [WEAK]
|
||||
|
||||
BOD_IRQHandler
|
||||
IRC_IRQHandler
|
||||
PWRWU_IRQHandler
|
||||
RAMPE_IRQHandler
|
||||
CLKFAIL_IRQHandler
|
||||
RTC_IRQHandler
|
||||
TAMPER_IRQHandler
|
||||
WDT_IRQHandler
|
||||
WWDT_IRQHandler
|
||||
EINT0_IRQHandler
|
||||
EINT1_IRQHandler
|
||||
EINT2_IRQHandler
|
||||
EINT3_IRQHandler
|
||||
EINT4_IRQHandler
|
||||
EINT5_IRQHandler
|
||||
GPA_IRQHandler
|
||||
GPB_IRQHandler
|
||||
GPC_IRQHandler
|
||||
GPD_IRQHandler
|
||||
GPE_IRQHandler
|
||||
GPF_IRQHandler
|
||||
SPI0_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
BRAKE0_IRQHandler
|
||||
PWM0P0_IRQHandler
|
||||
PWM0P1_IRQHandler
|
||||
PWM0P2_IRQHandler
|
||||
BRAKE1_IRQHandler
|
||||
PWM1P0_IRQHandler
|
||||
PWM1P1_IRQHandler
|
||||
PWM1P2_IRQHandler
|
||||
TMR0_IRQHandler
|
||||
TMR1_IRQHandler
|
||||
TMR2_IRQHandler
|
||||
TMR3_IRQHandler
|
||||
UART0_IRQHandler
|
||||
UART1_IRQHandler
|
||||
I2C0_IRQHandler
|
||||
I2C1_IRQHandler
|
||||
PDMA_IRQHandler
|
||||
DAC_IRQHandler
|
||||
ADC00_IRQHandler
|
||||
ADC01_IRQHandler
|
||||
ACMP01_IRQHandler
|
||||
ADC02_IRQHandler
|
||||
ADC03_IRQHandler
|
||||
UART2_IRQHandler
|
||||
UART3_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USBD_IRQHandler
|
||||
USBH_IRQHandler
|
||||
USBOTG_IRQHandler
|
||||
CAN0_IRQHandler
|
||||
SC0_IRQHandler
|
||||
TK_IRQHandler
|
||||
B .
|
||||
ENDP
|
||||
|
||||
|
||||
ALIGN
|
||||
|
||||
|
||||
; User Initial Stack & Heap
|
||||
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap PROC
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
|
||||
END
|
||||
;/*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/
|
|
@ -0,0 +1,78 @@
|
|||
/******************************************************************************
|
||||
* @file system_M451Series.c
|
||||
* @version V0.10
|
||||
* $Revision: 11 $
|
||||
* $Date: 15/09/02 10:02a $
|
||||
* @brief CMSIS Cortex-M4 Core Peripheral Access Layer Source File for M451 Series MCU
|
||||
*
|
||||
* @note
|
||||
* Copyright (C) 2013~2015 Nuvoton Technology Corp. All rights reserved.
|
||||
*****************************************************************************/
|
||||
|
||||
#include "M451Series.h"
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
DEFINES
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Clock Variable definitions
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = __SYSTEM_CLOCK; /*!< System Clock Frequency (Core Clock)*/
|
||||
uint32_t CyclesPerUs = (__HSI / 1000000); /* Cycles per micro second */
|
||||
uint32_t PllClock = __HSI; /*!< PLL Output Clock Frequency */
|
||||
uint32_t gau32ClkSrcTbl[] = {__HXT, __LXT, 0, __LIRC, 0, 0, 0, __HIRC};
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Clock functions
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate(void) /* Get Core Clock Frequency */
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* Initialize the system
|
||||
*
|
||||
* @param None
|
||||
* @return None
|
||||
*
|
||||
* @brief Setup the microcontroller system.
|
||||
* Initialize the System.
|
||||
*/
|
||||
void SystemInit(void)
|
||||
{
|
||||
/* ToDo: add code to initialize the system
|
||||
do not use global variables because this function is called before
|
||||
reaching pre-main. RW section maybe overwritten afterwards. */
|
||||
|
||||
SYS_UnlockReg();
|
||||
/* One-time POR18 */
|
||||
if((SYS->PDID >> 12) == 0x945)
|
||||
{
|
||||
M32(GCR_BASE+0x14) |= BIT7;
|
||||
}
|
||||
/* Force to use INV type with HXT */
|
||||
CLK->PWRCTL &= ~CLK_PWRCTL_HXTSELTYP_Msk;
|
||||
SYS_LockReg();
|
||||
|
||||
|
||||
#ifdef EBI_INIT
|
||||
extern void SYS_Init();
|
||||
extern void EBI_Init();
|
||||
|
||||
SYS_UnlockReg();
|
||||
SYS_Init();
|
||||
EBI_Init();
|
||||
SYS_LockReg();
|
||||
#endif
|
||||
|
||||
/* FPU settings ------------------------------------------------------------*/
|
||||
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||
SCB->CPACR |= ((3UL << 10 * 2) | /* set CP10 Full Access */
|
||||
(3UL << 11 * 2)); /* set CP11 Full Access */
|
||||
#endif
|
||||
|
||||
}
|
||||
/*** (C) COPYRIGHT 2013~2015 Nuvoton Technology Corp. ***/
|
|
@ -0,0 +1,22 @@
|
|||
|
||||
/*
|
||||
* Auto generated Run-Time-Environment Component Configuration File
|
||||
* *** Do not modify ! ***
|
||||
*
|
||||
* Project: 'mpu9250'
|
||||
* Target: 'Target 1'
|
||||
*/
|
||||
|
||||
#ifndef RTE_COMPONENTS_H
|
||||
#define RTE_COMPONENTS_H
|
||||
|
||||
|
||||
/*
|
||||
* Define the Device Header File:
|
||||
*/
|
||||
#define CMSIS_device_header "M451Series.h"
|
||||
|
||||
#define RTE_Drivers_CLK /* Driver CLK */
|
||||
#define RTE_Drivers_I2C /* Driver I2C */
|
||||
|
||||
#endif /* RTE_COMPONENTS_H */
|
|
@ -0,0 +1,115 @@
|
|||
#ifndef _ALL_USER_DATA_H_
|
||||
#define _ALL_USER_DATA_H_
|
||||
|
||||
#define SUCCESS 0
|
||||
#define FAIL -1
|
||||
#define FAILED -1
|
||||
typedef signed char int8_t;
|
||||
typedef signed short int int16_t;
|
||||
typedef signed int int32_t;
|
||||
typedef signed long long int64_t;
|
||||
|
||||
/* exact-width unsigned integer types */
|
||||
typedef unsigned char uint8_t;
|
||||
typedef unsigned short int uint16_t;
|
||||
typedef unsigned int uint32_t;
|
||||
typedef unsigned long long uint64_t;
|
||||
|
||||
|
||||
#define NULL 0
|
||||
extern volatile uint32_t SysTick_count;
|
||||
|
||||
|
||||
typedef struct{
|
||||
int16_t accX;
|
||||
int16_t accY;
|
||||
int16_t accZ;
|
||||
int16_t gyroX;
|
||||
int16_t gyroY;
|
||||
int16_t gyroZ;
|
||||
}_st_Mpu;
|
||||
|
||||
|
||||
typedef struct{
|
||||
int16_t magX;
|
||||
int16_t magY;
|
||||
int16_t magZ;
|
||||
}_st_Mag;
|
||||
|
||||
|
||||
typedef struct{
|
||||
float rate;
|
||||
float height;
|
||||
}High;
|
||||
|
||||
|
||||
typedef struct{
|
||||
float roll;
|
||||
float pitch;
|
||||
float yaw;
|
||||
}_st_AngE;
|
||||
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16_t roll;
|
||||
uint16_t pitch;
|
||||
uint16_t thr;
|
||||
uint16_t yaw;
|
||||
uint16_t AUX1;
|
||||
uint16_t AUX2;
|
||||
uint16_t AUX3;
|
||||
uint16_t AUX4;
|
||||
}_st_Remote;
|
||||
|
||||
|
||||
|
||||
typedef volatile struct
|
||||
{
|
||||
float desired; //< set point
|
||||
float offset; //
|
||||
float prevError; //< previous error
|
||||
float integ; //< integral
|
||||
float kp; //< proportional gain
|
||||
float ki; //< integral gain
|
||||
float kd; //< derivative gain
|
||||
float IntegLimitHigh; //< integral limit
|
||||
float IntegLimitLow;
|
||||
float measured;
|
||||
float out;
|
||||
float OutLimitHigh;
|
||||
float OutLimitLow;
|
||||
}PidObject;
|
||||
|
||||
|
||||
typedef volatile struct
|
||||
{
|
||||
uint8_t unlock;
|
||||
|
||||
|
||||
}_st_ALL_flag;
|
||||
|
||||
|
||||
extern _st_Remote Remote;
|
||||
extern _st_Mpu MPU6050;
|
||||
extern _st_Mag AK8975; //保留,需外接磁力计
|
||||
extern _st_AngE Angle;
|
||||
|
||||
|
||||
extern _st_ALL_flag ALL_flag;
|
||||
|
||||
|
||||
extern PidObject pidRateX;
|
||||
extern PidObject pidRateY;
|
||||
extern PidObject pidRateZ;
|
||||
|
||||
extern PidObject pidPitch;
|
||||
extern PidObject pidRoll;
|
||||
extern PidObject pidYaw;
|
||||
|
||||
extern PidObject pidHeightRate;
|
||||
extern PidObject pidHeightHigh;
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,229 @@
|
|||
|
||||
#include "M451Series.h"
|
||||
#include <stdio.h>
|
||||
#include "hal.h"
|
||||
|
||||
int MPUWriteReg( char RegAddr, char pucDATD_AA)
|
||||
{
|
||||
int i=0;
|
||||
|
||||
while(i<32) i++;
|
||||
|
||||
I2C_START(I2C0);
|
||||
I2C_WAIT_READY(I2C0);
|
||||
if (I2C_GET_STATUS(I2C0) != 0x08)
|
||||
{
|
||||
printf("I2CD_STArt write fail,I2D_STATUS %02X\r\n",I2C_GET_STATUS(I2C0));
|
||||
return FALSE;
|
||||
}
|
||||
I2C_Trigger(I2C0,0,0,1,0);
|
||||
|
||||
I2C_SET_DATA(I2C0,0xd0);
|
||||
I2C_WAIT_READY(I2C0);
|
||||
if (I2C_GET_STATUS(I2C0)!= 0x18)
|
||||
{
|
||||
printf("I2C write ADW fail\r\n");
|
||||
return FALSE;
|
||||
}
|
||||
I2C_Trigger(I2C0,0,0,1,0);
|
||||
//дÈë¶ÁµØÖ·
|
||||
I2C_SET_DATA(I2C0,RegAddr);
|
||||
I2C_WAIT_READY(I2C0);
|
||||
if (I2C_GET_STATUS(I2C0) != 0x28)
|
||||
{
|
||||
printf("I2C write reg addr fail\r\n");
|
||||
return FALSE;
|
||||
}
|
||||
I2C_Trigger(I2C0,0,0,1,0);
|
||||
|
||||
I2C_SET_DATA(I2C0,pucDATD_AA);
|
||||
I2C_WAIT_READY(I2C0);
|
||||
if (I2C_GET_STATUS(I2C0) != 0x28)
|
||||
{
|
||||
printf("I2C write control fail\r\n");
|
||||
while (1);
|
||||
}
|
||||
|
||||
//Í£Ö¹
|
||||
I2C_Trigger(I2C0,0,1,1,0);
|
||||
|
||||
|
||||
//printf("I2C write ok\r\n");
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
int MPUWriteAddr()
|
||||
{
|
||||
if (I2C_GET_STATUS(I2C0) != 0x08)
|
||||
{
|
||||
printf("I2CD_STArt write add fail,I2D_STATUS %02X\r\n",I2C_GET_STATUS(I2C0));
|
||||
return FALSE;
|
||||
}
|
||||
I2C_Trigger(I2C0,0,0,1,0);
|
||||
//½øÈë¶Áд¿ØÖƲÙ×÷
|
||||
I2C_SET_DATA(I2C0,0xd0);
|
||||
I2C_WAIT_READY(I2C0);
|
||||
if (I2C_GET_STATUS(I2C0)!= 0x18)
|
||||
{
|
||||
printf("I2C write ADW fail\r\n");
|
||||
return FALSE;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
int MPUWriteACK(char cDat)
|
||||
{
|
||||
if((I2C_GET_STATUS(I2C0) != 0x18)&&(I2C_GET_STATUS(I2C0) != 0x28))
|
||||
{
|
||||
printf("I2C MPUWriteAddrAck STATUS error \r\n");
|
||||
return FALSE;
|
||||
}
|
||||
I2C_Trigger(I2C0,0,0,1,0);
|
||||
//дÈë¶ÁµØÖ·
|
||||
I2C_SET_DATA(I2C0,cDat);
|
||||
I2C_WAIT_READY(I2C0);
|
||||
if (I2C_GET_STATUS(I2C0)!= 0x28)
|
||||
{
|
||||
printf("MPUWriteAddrAck fail ACK no recv\r\n");
|
||||
return FALSE;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
char MPUReadReg( int unAddr/*, int unLength*/)
|
||||
{
|
||||
char ret;
|
||||
int i=0;
|
||||
|
||||
while(i<32) i++;
|
||||
I2C_Trigger(I2C0,0,0,1,0);
|
||||
|
||||
I2C_START(I2C0); //Æô¶¯
|
||||
//Æô¶¯
|
||||
I2C_WAIT_READY(I2C0);
|
||||
if(I2C_GET_STATUS(I2C0) != 0x08)
|
||||
{
|
||||
printf("I2CD_STArt read reg fail,I2D_STATUS %02X\r\n",I2C_GET_STATUS(I2C0));
|
||||
return FALSE;
|
||||
}
|
||||
I2C_Trigger(I2C0,0,0,1,0);
|
||||
|
||||
//½øÈë¶Áд¿ØÖƲÙ×÷
|
||||
I2C_SET_DATA(I2C0,0xd0);
|
||||
I2C_WAIT_READY(I2C0);
|
||||
if (I2C_GET_STATUS(I2C0) != 0x018)
|
||||
{
|
||||
printf("status fault shoube be 0x018 ,I2D_STATUS %02X\r\n",I2C_GET_STATUS(I2C0));
|
||||
return FALSE;
|
||||
}
|
||||
//дÈë¶ÁµØÖ·
|
||||
I2C_SET_DATA(I2C0,unAddr);
|
||||
I2C_Trigger(I2C0,0,0,1,0);
|
||||
I2C_WAIT_READY(I2C0);
|
||||
if (I2C_GET_STATUS(I2C0)!= 0x28)
|
||||
{
|
||||
printf("I2C write reg addr fail\r\n");
|
||||
return FALSE;
|
||||
}
|
||||
// ÖØÐÂÆô¶¯
|
||||
|
||||
|
||||
I2C_Trigger(I2C0,0,0,1,0);
|
||||
I2C_Trigger(I2C0,1,0,0,0);
|
||||
I2C_WAIT_READY(I2C0);
|
||||
if (I2C_GET_STATUS(I2C0) != 0x10)
|
||||
{
|
||||
printf("I2C repeated D_STArt fail\r\n");
|
||||
return FALSE;
|
||||
}
|
||||
I2C_Trigger(I2C0,0,0,1,0);
|
||||
|
||||
//½øÈë¶Á²Ù×÷
|
||||
I2C_SET_DATA(I2C0,0xd0 | 1);
|
||||
I2C_WAIT_READY(I2C0);
|
||||
if (I2C_GET_STATUS(I2C0) != 0x40)
|
||||
{
|
||||
printf("I2C write control fail\r\n");
|
||||
while (1);
|
||||
}
|
||||
//¶ÁÈ¡Êý¾Ý
|
||||
I2C_Trigger(I2C0,0,0,1,0);
|
||||
I2C_WAIT_READY(I2C0);
|
||||
if (I2C_GET_STATUS(I2C0) != 0x58)
|
||||
{
|
||||
printf("I2C read fail\r\n");
|
||||
return FALSE;
|
||||
}
|
||||
ret = I2C_GET_DATA(I2C0);
|
||||
I2C_Trigger(I2C0,0,1,1,0);
|
||||
|
||||
// I2C_WAIT_READY(I2C0);
|
||||
return ret;
|
||||
}
|
||||
|
||||
int MPUReadBuf( int unAddr, char *pucDATD_AA, int unLength)
|
||||
{
|
||||
char ret;
|
||||
int i=0;
|
||||
while(i<32) i++;
|
||||
I2C_Trigger(I2C0,0,0,1,0);
|
||||
I2C_START(I2C0);
|
||||
I2C_WAIT_READY(I2C0);
|
||||
if(I2C_GET_STATUS(I2C0) != 0x08)
|
||||
{
|
||||
printf("I2CD_STArt fail,I2D_STATUS %02X\r\n",I2C_GET_STATUS(I2C0));
|
||||
return FALSE;
|
||||
}
|
||||
I2C_Trigger(I2C0,0,0,1,0);
|
||||
|
||||
I2C_SET_DATA(I2C0,0xd0);
|
||||
I2C_WAIT_READY(I2C0);
|
||||
if (I2C_GET_STATUS(I2C0) != 0x18)
|
||||
{
|
||||
printf("I2CD_STArt fail,I2D_STATUS %02X\r\n",I2C_GET_STATUS(I2C0));
|
||||
return FALSE;
|
||||
}
|
||||
I2C_SET_DATA(I2C0,unAddr);
|
||||
I2C_Trigger(I2C0,0,0,1,0);
|
||||
I2C_WAIT_READY(I2C0);
|
||||
if (I2C_GET_STATUS(I2C0)!= 0x28)
|
||||
{
|
||||
printf("I2C write reg addr fail\r\n");
|
||||
return FALSE;
|
||||
}
|
||||
I2C_Trigger(I2C0,0,0,1,0);
|
||||
I2C_Trigger(I2C0,1,0,0,0);
|
||||
I2C_WAIT_READY(I2C0);
|
||||
if (I2C_GET_STATUS(I2C0) != 0x10)
|
||||
{
|
||||
printf("I2C repeated D_STArt fail\r\n");
|
||||
return FALSE;
|
||||
}
|
||||
I2C_Trigger(I2C0,0,0,1,0);
|
||||
I2C_SET_DATA(I2C0,0xd0 | 1);
|
||||
I2C_WAIT_READY(I2C0);
|
||||
if (I2C_GET_STATUS(I2C0) != 0x40)
|
||||
{
|
||||
printf("I2C write control fail\r\n");
|
||||
while (1);
|
||||
}
|
||||
for(i=0;i<unLength;i++)
|
||||
{
|
||||
if(i==unLength-1)
|
||||
I2C_Trigger(I2C0,0,0,1,0);
|
||||
else
|
||||
I2C_Trigger(I2C0,0,0,1,1);
|
||||
I2C_WAIT_READY(I2C0);
|
||||
if ((I2C_GET_STATUS(I2C0) != 0x58)&&(I2C_GET_STATUS(I2C0) != 0x50))
|
||||
{
|
||||
printf("I2C read fail\r\n");
|
||||
return FALSE;
|
||||
}
|
||||
pucDATD_AA[i] = I2C_GET_DATA(I2C0);
|
||||
}
|
||||
I2C_Trigger(I2C0,0,1,1,0);
|
||||
|
||||
// I2C_WAIT_READY(I2C0);
|
||||
return ret;
|
||||
}
|
|
@ -0,0 +1,10 @@
|
|||
#ifndef __HAL__
|
||||
#define __HAL__
|
||||
|
||||
int MPUWriteReg( char RegAddr, char pucDATD_AA);
|
||||
int MPUWriteAddr();
|
||||
char MPUReadReg( int unAddr/*, int unLength*/);
|
||||
int MPUReadBuf( int unAddr, char *pucDATD_AA, int unLength);
|
||||
char MPUReadReg( int unAddr/*, int unLength*/);
|
||||
|
||||
#endif
|
|
@ -0,0 +1,64 @@
|
|||
#include "M451Series.h"
|
||||
|
||||
#define PLL_CLOCK 5000000
|
||||
void HalInit(){
|
||||
SYS_UnlockReg();
|
||||
|
||||
/*---------------------------------------------------------------------------------------------------------*/
|
||||
/* Init System Clock */
|
||||
/*---------------------------------------------------------------------------------------------------------*/
|
||||
|
||||
/* Enable Internal RC 22.1184MHz clock */
|
||||
CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);
|
||||
|
||||
/* Waiting for Internal RC clock ready */
|
||||
CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
|
||||
|
||||
/* Switch HCLK clock source to Internal RC and HCLK source divide 1 */
|
||||
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
|
||||
|
||||
/* Enable external XTAL 12MHz clock */
|
||||
CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
|
||||
|
||||
/* Waiting for external XTAL clock ready */
|
||||
CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk);
|
||||
|
||||
/* Set core clock as PLL_CLOCK from PLL */
|
||||
CLK_SetCoreClock(PLL_CLOCK);
|
||||
|
||||
/* Enable UART module clock */
|
||||
|
||||
/* Enable I2C0 module clock */
|
||||
CLK_EnableModuleClock(I2C0_MODULE);
|
||||
|
||||
|
||||
/*---------------------------------------------------------------------------------------------------------*/
|
||||
/* Init I/O Multi-function */
|
||||
/*---------------------------------------------------------------------------------------------------------*/
|
||||
|
||||
SYS->GPD_MFPL &= ~SYS_GPD_MFPL_PD4MFP_Msk;
|
||||
SYS->GPD_MFPL |= SYS_GPD_MFPL_PD4MFP_I2C0_SDA;
|
||||
|
||||
SYS->GPD_MFPL &= ~SYS_GPD_MFPL_PD5MFP_Msk;
|
||||
SYS->GPD_MFPL |= SYS_GPD_MFPL_PD5MFP_I2C0_SCL;
|
||||
I2C_Open(I2C0,100000);
|
||||
|
||||
printf("I2C clock %d Hz\n", I2C_GetBusClockFreq(I2C0));
|
||||
|
||||
I2C_SetSlaveAddr(I2C0, 0, 0x78, 0); /* Slave Address : 0x15 */
|
||||
|
||||
SYS_LockReg();
|
||||
|
||||
//GPIO_SetMode(PB,BIT14,GPIO_PMD_INPUT);
|
||||
//GPIO_SetMode(PB,BIT9,GPIO_PMD_OUTPUT);
|
||||
|
||||
//I2C_EnableInt(I2C0);
|
||||
//NVIC_EnableIRQ(I2C0_IRQn);
|
||||
}
|
||||
|
||||
|
||||
int main(){
|
||||
HalInit();
|
||||
MpuInit();
|
||||
|
||||
}
|
|
@ -0,0 +1,133 @@
|
|||
#include "data.h"
|
||||
#include "hal.h"
|
||||
|
||||
#define SMPLRT_DIV 0x19 //陀螺仪采样率,典型值:0x07(125Hz)
|
||||
#define CONFIGL 0x1A //低通滤波频率,典型值:0x06(5Hz)
|
||||
#define GYRO_CONFIG 0x1B //陀螺仪自检及测量范围,典型值:0x18(不自检,2000deg/s)
|
||||
#define ACCEL_CONFIG 0x1C //加速计自检、测量范围及高通滤波频率,典型值:0x01(不自检,2G,5Hz)
|
||||
#define ACCEL_ADDRESS 0x3B
|
||||
#define ACCEL_XOUT_H 0x3B
|
||||
#define ACCEL_XOUT_L 0x3C
|
||||
#define ACCEL_YOUT_H 0x3D
|
||||
#define ACCEL_YOUT_L 0x3E
|
||||
#define ACCEL_ZOUT_H 0x3F
|
||||
#define ACCEL_ZOUT_L 0x40
|
||||
#define TEMP_OUT_H 0x41
|
||||
#define TEMP_OUT_L 0x42
|
||||
#define GYRO_XOUT_H 0x43
|
||||
#define GYRO_ADDRESS 0x43
|
||||
#define GYRO_XOUT_L 0x44
|
||||
#define GYRO_YOUT_H 0x45
|
||||
#define GYRO_YOUT_L 0x46
|
||||
#define GYRO_ZOUT_H 0x47
|
||||
#define GYRO_ZOUT_L 0x48
|
||||
#define PWR_MGMT_1 0x6B //电源管理,典型值:0x00(正常启用)
|
||||
#define WHO_AM_I 0x75 //IIC地址寄存器(默认数值0x68,只读)
|
||||
#define MPU6050_PRODUCT_ID 0x68
|
||||
#define MPU6052C_PRODUCT_ID 0x72
|
||||
#define MPU9250_PRODUCT_ID 0x71 //
|
||||
//#define MPU6050_is_DRY() GPIO_ReadOutBit(HT_GPIOC, GPIO_PIN_0)//IRQ主机数据输入
|
||||
#ifdef USE_I2C_HARDWARE
|
||||
|
||||
#define MPU6050_ADDRESS 0xD0//0x68
|
||||
#else
|
||||
#define MPU6050_ADDRESS 0xD0 //IIC写入时的地址字节数据,+1为读取
|
||||
#endif
|
||||
|
||||
|
||||
void delay_ms(int x){
|
||||
|
||||
for(x = 0; x < 1000; x++){
|
||||
volatile int z = 0;
|
||||
for (z = 0; z < 100;z++){
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
int16_t MpuOffset[6] = {0};
|
||||
|
||||
_st_Mpu MPU6050; //MPU6050原始数据
|
||||
|
||||
static volatile int16_t *pMpu = (int16_t *)&MPU6050;
|
||||
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
*@brief
|
||||
*@brief
|
||||
*@param[in]
|
||||
*****************************************************************************************/
|
||||
int8_t mpu6050_rest(void)
|
||||
{
|
||||
if(MPUWriteReg( PWR_MGMT_1, 0x80) == FAILED)
|
||||
return FAILED; //复位
|
||||
//delay_ms(20);
|
||||
return SUCCESS;
|
||||
}
|
||||
/****************************************************************************************
|
||||
*@brief
|
||||
*@brief
|
||||
*@param[in]
|
||||
*****************************************************************************************/
|
||||
int8_t MpuInit(void) //初始化
|
||||
{
|
||||
uint8_t date = SUCCESS;
|
||||
do
|
||||
{
|
||||
date = MPUWriteReg( PWR_MGMT_1, 0x80); //复位
|
||||
delay_ms(30);
|
||||
date += MPUWriteReg( SMPLRT_DIV, 0x02); //陀螺仪采样率,0x00(500Hz)
|
||||
date += MPUWriteReg( PWR_MGMT_1, 0x03); //设置设备时钟源,陀螺仪Z轴
|
||||
date += MPUWriteReg( CONFIGL, 0x03); //低通滤波频率,0x03(42Hz)
|
||||
date += MPUWriteReg( GYRO_CONFIG, 0x18);//+-2000deg/s
|
||||
date += MPUWriteReg( ACCEL_CONFIG, 0x09);//+-4G
|
||||
}
|
||||
while(date != SUCCESS);
|
||||
date = MPUReadReg(0x75);
|
||||
if(date!= MPU6050_PRODUCT_ID)
|
||||
return FAILED;
|
||||
else
|
||||
//MpuGetOffset();
|
||||
return SUCCESS;
|
||||
}
|
||||
/****************************************************************************************
|
||||
*@brief
|
||||
*@brief
|
||||
*@param[in]
|
||||
*****************************************************************************************/
|
||||
|
||||
#define Gyro_Read() MPUReadBuf( 0X3B,buffer,6)
|
||||
#define Acc_Read() MPUReadBuf( 0x43,&buffer[6],6)
|
||||
|
||||
void MpuGetData(void) //读取陀螺仪数据加滤波
|
||||
{
|
||||
uint8_t i;
|
||||
int8_t buffer[12];
|
||||
|
||||
Gyro_Read();
|
||||
Acc_Read();
|
||||
|
||||
for(i=0;i<6;i++)
|
||||
{
|
||||
pMpu[i] = (((int16_t)buffer[i<<1] << 8) | buffer[(i<<1)+1])-MpuOffset[i];
|
||||
if(i < 3)
|
||||
{
|
||||
{
|
||||
//static struct _1_ekf_filter ekf[3] = {{0.02,0,0,0,0.001,0.543},{0.02,0,0,0,0.001,0.543},{0.02,0,0,0,0.001,0.543}};
|
||||
//kalman_1(&ekf[i],(float)pMpu[i]); //一维卡尔曼
|
||||
//pMpu[i] = (int16_t)ekf[i].out;
|
||||
}
|
||||
}
|
||||
if(i > 2)
|
||||
{
|
||||
uint8_t k=i-3;
|
||||
const float factor = 0.15f; //滤波因素
|
||||
static float tBuff[3];
|
||||
|
||||
pMpu[i] = tBuff[k] = tBuff[k] * (1 - factor) + pMpu[i] * factor;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**************************************END OF FILE*************************************/
|
|
@ -0,0 +1,244 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>Target 1</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>0</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\Listings\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>255</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>0</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>BIN\UL2CM3.DLL</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0M451_AP_256 -FS00 -FL040000 -FP0($$Device:M451RG6AE$Flash\M451_AP_256.FLM))</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>1</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>Source Group 1</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>1</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\main.c</PathWithFileName>
|
||||
<FilenameWithoutPath>main.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>2</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\hal.c</PathWithFileName>
|
||||
<FilenameWithoutPath>hal.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>3</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\mpu.c</PathWithFileName>
|
||||
<FilenameWithoutPath>mpu.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>4</FileNumber>
|
||||
<FileType>5</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\data.h</PathWithFileName>
|
||||
<FilenameWithoutPath>data.h</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>::CMSIS</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>1</RteFlg>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>::Device</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>1</RteFlg>
|
||||
</Group>
|
||||
|
||||
</ProjectOpt>
|
|
@ -0,0 +1,497 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>Target 1</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>M451RG6AE</Device>
|
||||
<Vendor>Nuvoton</Vendor>
|
||||
<PackID>Nuvoton.NuMicro_DFP.1.2.0</PackID>
|
||||
<PackURL>http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack</PackURL>
|
||||
<Cpu>IRAM(0x20000000,0x8000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000)</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0M451_AP_256 -FS00 -FL040000 -FP0($$Device:M451RG6AE$Flash\M451_AP_256.FLM))</FlashDriverDll>
|
||||
<DeviceId>8158</DeviceId>
|
||||
<RegisterFile>$$Device:M451RG6AE$Device\M451\Include\M451Series.h</RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:M451RG6AE$SVD\Nuvoton\M451_v1.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\Objects\</OutputDirectory>
|
||||
<OutputName>mpu9250</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>0</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath>.\Listings\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>1</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments></SimDllArguments>
|
||||
<SimDlgDll>DARMCM1.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments></SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments></TargetDllArguments>
|
||||
<TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments></TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>0</Capability>
|
||||
<DriverSelection>-1</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||
<Flash3></Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>2</RvdsVP>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>0</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x8000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x8000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>2</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>1</uC99>
|
||||
<uGnu>1</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<uClangAs>0</uClangAs>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>0</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x00000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile></ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>Source Group 1</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>main.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\main.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>hal.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\hal.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mpu.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\mpu.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>data.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>.\data.h</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>::CMSIS</GroupName>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>::Device</GroupName>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<packages>
|
||||
<filter>
|
||||
<targetInfos/>
|
||||
</filter>
|
||||
<package name="CMSIS-Driver" schemaVersion="1.4" url="http://www.keil.com/pack/" vendor="ARM" version="2.2.0">
|
||||
<targetInfos>
|
||||
<targetInfo name="Target 1" versionMatchMode="fixed"/>
|
||||
</targetInfos>
|
||||
</package>
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.0">
|
||||
<targetInfos>
|
||||
<targetInfo name="Target 1" versionMatchMode="fixed"/>
|
||||
</targetInfos>
|
||||
</package>
|
||||
<package name="MDK-Middleware" schemaVersion="1.4" url="http://www.keil.com/pack/" vendor="Keil" version="7.6.0">
|
||||
<targetInfos>
|
||||
<targetInfo name="Target 1" versionMatchMode="fixed"/>
|
||||
</targetInfos>
|
||||
</package>
|
||||
<package name="NuMicro_DFP" schemaVersion="1.2" url="http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack" vendor="Nuvoton" version="1.2.0">
|
||||
<targetInfos>
|
||||
<targetInfo name="Target 1" versionMatchMode="fixed"/>
|
||||
</targetInfos>
|
||||
</package>
|
||||
</packages>
|
||||
<apis/>
|
||||
<components>
|
||||
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.1.1" condition="ARMv6_7_8-M Device">
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.3.0"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="Target 1"/>
|
||||
</targetInfos>
|
||||
</component>
|
||||
<component Cclass="Device" Cgroup="Driver" Csub="CLK" Cvendor="Nuvoton" Cversion="3.01.001" condition="M4NuMicro M451 Device">
|
||||
<package name="NuMicro_DFP" schemaVersion="1.2" url="http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack" vendor="Nuvoton" version="1.2.0"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="Target 1"/>
|
||||
</targetInfos>
|
||||
</component>
|
||||
<component Cclass="Device" Cgroup="Driver" Csub="I2C" Cvendor="Nuvoton" Cversion="3.01.001" condition="M4NuMicro M451 Device">
|
||||
<package name="NuMicro_DFP" schemaVersion="1.2" url="http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack" vendor="Nuvoton" version="1.2.0"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="Target 1"/>
|
||||
</targetInfos>
|
||||
</component>
|
||||
<component Cclass="Device" Cgroup="Startup" Cvendor="Nuvoton" Cversion="3.01.001" condition="M4NuMicro M451 Device">
|
||||
<package name="NuMicro_DFP" schemaVersion="1.2" url="http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack" vendor="Nuvoton" version="1.2.0"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="Target 1"/>
|
||||
</targetInfos>
|
||||
</component>
|
||||
</components>
|
||||
<files>
|
||||
<file attr="config" category="sourceC" name="Device\M451\Driver\retarget.c" version="0.00.001">
|
||||
<instance index="0">RTE\Device\M451RG6AE\retarget.c</instance>
|
||||
<component Cclass="Device" Cgroup="Startup" Cvendor="Nuvoton" Cversion="3.01.001" condition="M4NuMicro M451 Device"/>
|
||||
<package name="NuMicro_DFP" schemaVersion="1.2" url="http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack" vendor="Nuvoton" version="1.2.0"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="Target 1"/>
|
||||
</targetInfos>
|
||||
</file>
|
||||
<file attr="config" category="sourceAsm" condition="Compiler ARM" name="Device\M451\Source\ARM\startup_M451Series.s" version="0.00.001">
|
||||
<instance index="0">RTE\Device\M451RG6AE\startup_M451Series.s</instance>
|
||||
<component Cclass="Device" Cgroup="Startup" Cvendor="Nuvoton" Cversion="3.01.001" condition="M4NuMicro M451 Device"/>
|
||||
<package name="NuMicro_DFP" schemaVersion="1.2" url="http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack" vendor="Nuvoton" version="1.2.0"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="Target 1"/>
|
||||
</targetInfos>
|
||||
</file>
|
||||
<file attr="config" category="source" name="Device\M451\Source\system_M451Series.c" version="0.00.001">
|
||||
<instance index="0">RTE\Device\M451RG6AE\system_M451Series.c</instance>
|
||||
<component Cclass="Device" Cgroup="Startup" Cvendor="Nuvoton" Cversion="3.01.001" condition="M4NuMicro M451 Device"/>
|
||||
<package name="NuMicro_DFP" schemaVersion="1.2" url="http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack" vendor="Nuvoton" version="1.2.0"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="Target 1"/>
|
||||
</targetInfos>
|
||||
</file>
|
||||
</files>
|
||||
</RTE>
|
||||
|
||||
</Project>
|
Loading…
Reference in New Issue