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添加舵机驱动

master
18650180552 2019-12-30 21:05:12 +08:00
parent 304ae068dc
commit a0f2903358
27 changed files with 7283 additions and 1532 deletions
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1346
cmos/gc0307/stm32/JLinkLog.txt
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857
cmos/gc0307/stm32/Listings/gc0307.map
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BIN
cmos/gc0307/stm32/Objects/gc0307.axf
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5
cmos/gc0307/stm32/Objects/gc0307.lnp
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@ -2,14 +2,15 @@
".\objects\stm32f10x_it.o"
".\objects\main.o"
".\objects\i2c_ee.o"
".\objects\sccb.o"
".\objects\misc.o"
".\objects\stm32f10x_dbgmcu.o"
".\objects\stm32f10x_gpio.o"
".\objects\stm32f10x_i2c.o"
".\objects\stm32f10x_rcc.o"
".\objects\gpio_stm32f10x.o"
".\objects\startup_stm32f10x_md.o"
".\objects\system_stm32f10x.o"
".\objects\stm32f10x_gpio.o"
".\objects\gpio_stm32f10x.o"
--ro-base 0x08000000 --entry 0x08000000 --rw-base 0x20000000 --entry Reset_Handler --first __Vectors --strict --summary_stderr --info summarysizes --map --load_addr_map_info --xref --callgraph --symbols
--info sizes --info totals --info unused --info veneers
--list ".\Listings\gc0307.map" -o .\Objects\gc0307.axf

120
cmos/gc0307/stm32/gc0307.uvoptx
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@ -152,25 +152,25 @@
<Bp>
<Number>0</Number>
<Type>0</Type>
<LineNumber>120</LineNumber>
<LineNumber>168</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>134220050</Address>
<Address>134218938</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount>
<Filename>.\src\main.c</Filename>
<Filename>.\sccb.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\gc0307\src/main.c\120</Expression>
<Expression>\\gc0307\sccb.c\168</Expression>
</Bp>
<Bp>
<Number>1</Number>
<Type>0</Type>
<LineNumber>117</LineNumber>
<LineNumber>122</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>134220044</Address>
<Address>134219654</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
@ -179,14 +179,14 @@
<BreakIfRCount>1</BreakIfRCount>
<Filename>.\src\main.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\gc0307\src/main.c\117</Expression>
<Expression>\\gc0307\src/main.c\122</Expression>
</Bp>
<Bp>
<Number>2</Number>
<Type>0</Type>
<LineNumber>112</LineNumber>
<LineNumber>119</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>134220032</Address>
<Address>134219636</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
@ -195,59 +195,11 @@
<BreakIfRCount>1</BreakIfRCount>
<Filename>.\src\main.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\gc0307\src/main.c\112</Expression>
<Expression>\\gc0307\src/main.c\119</Expression>
</Bp>
<Bp>
<Number>3</Number>
<Type>0</Type>
<LineNumber>94</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>134218758</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount>
<Filename>.\src\main.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\gc0307\src/main.c\94</Expression>
</Bp>
<Bp>
<Number>4</Number>
<Type>0</Type>
<LineNumber>91</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>134218734</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount>
<Filename>.\src\main.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\gc0307\src/main.c\91</Expression>
</Bp>
<Bp>
<Number>5</Number>
<Type>0</Type>
<LineNumber>89</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>134218710</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount>
<Filename>.\src\main.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\gc0307\src/main.c\89</Expression>
</Bp>
<Bp>
<Number>6</Number>
<Type>0</Type>
<LineNumber>212</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>0</Address>
@ -262,7 +214,7 @@
<Expression></Expression>
</Bp>
<Bp>
<Number>7</Number>
<Number>4</Number>
<Type>0</Type>
<LineNumber>218</LineNumber>
<EnabledFlag>1</EnabledFlag>
@ -277,6 +229,38 @@
<ExecCommand></ExecCommand>
<Expression></Expression>
</Bp>
<Bp>
<Number>5</Number>
<Type>0</Type>
<LineNumber>91</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>0</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>0</BreakIfRCount>
<Filename>.\src\main.c</Filename>
<ExecCommand></ExecCommand>
<Expression></Expression>
</Bp>
<Bp>
<Number>6</Number>
<Type>0</Type>
<LineNumber>95</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>0</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>0</BreakIfRCount>
<Filename>.\src\main.c</Filename>
<ExecCommand></ExecCommand>
<Expression></Expression>
</Bp>
</Breakpoint>
<Tracepoint>
<THDelay>0</THDelay>
@ -284,7 +268,7 @@
<DebugFlag>
<trace>0</trace>
<periodic>1</periodic>
<aLwin>1</aLwin>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
@ -321,6 +305,10 @@
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
<SystemViewers>
<Entry>
<Name>System Viewer\GPIOB</Name>
<WinId>35904</WinId>
</Entry>
<Entry>
<Name>System Viewer\I2C1</Name>
<WinId>35905</WinId>
@ -378,6 +366,18 @@
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>4</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\sccb.c</PathWithFileName>
<FilenameWithoutPath>sccb.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>

5
cmos/gc0307/stm32/gc0307.uvprojx
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@ -397,6 +397,11 @@
<FileType>1</FileType>
<FilePath>.\src\i2c_ee.c</FilePath>
</File>
<File>
<FileName>sccb.c</FileName>
<FileType>1</FileType>
<FilePath>.\sccb.c</FilePath>
</File>
</Files>
</Group>
<Group>

169
cmos/gc0307/stm32/sccb.c Normal file
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@ -0,0 +1,169 @@
#include "sccb_gpio.h"
#define SCCB_ID 0x42
void SCCB_SDA_IN()
{
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.GPIO_Pin = I2C_EE_SDA ;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
GPIO_Init(I2C_EE_GPIO, &GPIO_InitStructure);
}
void SCCB_SDA_OUT() {
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.GPIO_Pin = I2C_EE_SDA ;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_Init(I2C_EE_GPIO, &GPIO_InitStructure);
}
//???SCCB??
//CHECK OK
void SCCB_Init(void){
GPIO_InitTypeDef GPIO_InitStructure;
/* Configure I2C_EE pins: SCL and SDA */
GPIO_InitStructure.GPIO_Pin = I2C_EE_SCL ;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_Init(I2C_EE_GPIO, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = I2C_EE_SDA ;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_Init(I2C_EE_GPIO, &GPIO_InitStructure);
SCCB_SDA_OUT();
GPIO_SetBits(GPIOB,I2C_EE_SDA);
GPIO_SetBits(GPIOB,I2C_EE_SCL);
}
void delay_us(unsigned int x){
for(unsigned int i = 0;i < x;i++){
for(unsigned int z = 0;z < 2;z++){
z = z;
}
}
}
//SCCB????
//??????,???????,?????
//??????,SDA?SCL?????
void SCCB_Start(void){
GPIO_SetBits(GPIOB,I2C_EE_SDA);
GPIO_SetBits(GPIOB,I2C_EE_SCL);
delay_us(50);
GPIO_ResetBits(GPIOB,I2C_EE_SDA);
delay_us(50);
GPIO_ResetBits(GPIOB,I2C_EE_SCL);
}
//SCCB????
//??????,???????,?????
//??????,SDA?SCL?????
void SCCB_Stop(void){
GPIO_ResetBits(GPIOB,I2C_EE_SDA);
delay_us(50);
GPIO_SetBits(GPIOB,I2C_EE_SCL);
delay_us(50);
GPIO_SetBits(GPIOB,I2C_EE_SDA);
delay_us(50);
}
//??NA??
void SCCB_No_Ack(void)
{
delay_us(50);
GPIO_SetBits(GPIOB,I2C_EE_SDA);
GPIO_SetBits(GPIOB,I2C_EE_SCL);
delay_us(50);
GPIO_ResetBits(GPIOB,I2C_EE_SCL);
delay_us(50);
GPIO_SetBits(GPIOB,I2C_EE_SDA);
delay_us(50);
}
//SCCB,??????
//??0????
u8 SCCB_WR_Byte(u8 dat)
{
u8 j,res;
for(j=0;j<8;j++) //??8?????
{
if(dat&0x80)
GPIO_SetBits(GPIOB,I2C_EE_SDA);
else
GPIO_ResetBits(GPIOB,I2C_EE_SDA);
dat<<=1;
delay_us(50);
GPIO_SetBits(GPIOB,I2C_EE_SCL);
delay_us(50);
GPIO_ResetBits(GPIOB,I2C_EE_SCL);
}
SCCB_SDA_IN();
delay_us(50);
GPIO_SetBits(GPIOB,I2C_EE_SCL);
delay_us(50);
if(GPIO_ReadInputDataBit(GPIOB,I2C_EE_SDA))
res=1; //SDA=1????
else
res=0; //SDA=0????
GPIO_ResetBits(GPIOB,I2C_EE_SCL);
SCCB_SDA_OUT();
return res;
}
//SCCB ??????
//?SCL????,????
//???:?????
u8 SCCB_RD_Byte(void)
{
u8 temp=0,j;
SCCB_SDA_IN();
for(j=8;j>0;j--) //??8?????
{
delay_us(50);
GPIO_SetBits(GPIOB,I2C_EE_SCL);
temp=temp<<1;
if(GPIO_ReadInputDataBit(GPIOB,I2C_EE_SDA))
temp++;
delay_us(50);
GPIO_ResetBits(GPIOB,I2C_EE_SCL);
}
SCCB_SDA_OUT();
return temp;
}
//????
//???:0??
u8 SCCB_WR_Reg(u8 reg,u8 data)
{
u8 res=0;
SCCB_Start(); //????
if(SCCB_WR_Byte(SCCB_ID))res=1; //???ID
delay_us(100);
if(SCCB_WR_Byte(reg))res=1; //??????
delay_us(100);
if(SCCB_WR_Byte(data))res=1; //???
SCCB_Stop(); //????
return res;
}
//????
u8 SCCB_RD_Reg(u8 reg)
{
u8 val=0;
SCCB_Start(); //????
SCCB_WR_Byte(SCCB_ID); //???ID
delay_us(100);
SCCB_WR_Byte(reg); //??????
delay_us(100);
SCCB_Stop();
delay_us(100);
//???????????
SCCB_Start();
SCCB_WR_Byte(SCCB_ID|0X01); //?????
delay_us(100);
val=SCCB_RD_Byte(); //???
SCCB_No_Ack(); //??NA
SCCB_Stop(); //????
return val;
}

14
cmos/gc0307/stm32/sccb_gpio.h Normal file
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@ -0,0 +1,14 @@
#ifndef __SCCB
#define __SCCB
#include "src/i2c_ee.h"
void SCCB_SDA_IN();
void SCCB_SDA_OUT();
void SCCB_Init(void);
void SCCB_No_Ack(void);
u8 SCCB_RD_Reg(u8 reg);
#endif

28
cmos/gc0307/stm32/src/main.c
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@ -19,7 +19,7 @@
*/
/* Includes ------------------------------------------------------------------*/
#include "i2c_ee.h"
#include "../sccb_gpio.h"
/** @addtogroup STM32F10x_StdPeriph_Examples
* @{
@ -58,12 +58,12 @@ TestStatus Buffercmp(uint8_t* pBuffer1, uint8_t* pBuffer2, uint16_t BufferLength
void I2C_GPIO_Config()
{
GPIO_InitTypeDef GPIO_InitStructure;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_7;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
GPIO_Init(GPIOB, &GPIO_InitStructure);
GPIO_InitTypeDef GPIO_InitStructure;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_7;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
GPIO_Init(GPIOB, &GPIO_InitStructure);
}
void I2C1_Init()
@ -86,14 +86,14 @@ u8 I2C1_Read(u8 nAddr)
I2C_AcknowledgeConfig(I2C1,ENABLE); //????
I2C_GenerateSTART(I2C1,ENABLE); //???????
while(!I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_MODE_SELECT)){;} //??EV5
I2C_Send7bitAddress(I2C1,0x21,I2C_Direction_Receiver); //????????
I2C_Send7bitAddress(I2C1,0x22,I2C_Direction_Transmitter); //????????
while(!I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)){;}//??EV6
I2C_SendData(I2C1,nAddr);//?????
while(!I2C_CheckEvent(I2C1,I2C_Direction_Receiver)){;} //??EV8
I2C_GenerateSTART(I2C1,ENABLE); //???????
while(!I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_MODE_SELECT)){;} //??EV5
I2C_Send7bitAddress(I2C1,0x21,I2C_Direction_Transmitter); //???????
I2C_Send7bitAddress(I2C1,0x22,I2C_Direction_Transmitter); //???????
while(!I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED)){;} //??EV6
I2C_AcknowledgeConfig(I2C1,DISABLE); //??????
I2C_GenerateSTOP(I2C1,ENABLE); //???????
@ -108,14 +108,16 @@ u8 I2C1_Read(u8 nAddr)
*/
int main(void)
{
volatile uint8_t buf ;
/* System clocks configuration ---------------------------------------------*/
RCC_Configuration();
I2C_GPIO_Config();
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
SCCB_Init();
/* Initialize the I2C EEPROM driver ----------------------------------------*/
I2C1_Init();
uint8_t buf = I2C1_Read(0x00);
buf = SCCB_RD_Reg(0x00);
buf++;
while (1)
{

97
steper/stm32/DebugConfig/Target_1_STM32F103RB_1.0.0.dbgconf Normal file
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@ -0,0 +1,97 @@
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU Configuration
// <o0.0> DBG_SLEEP
// <i> Debug Sleep Mode
// <i> 0: (FCLK=On, HCLK=Off) FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled
// <i> 1: (FCLK=On, HCLK=On) HCLK is fed by the same clock that is provided to FCLK
// <o0.1> DBG_STOP
// <i> Debug Stop Mode
// <i> 0: (FCLK=Off, HCLK=Off) Clock controller disables all clocks
// <i> 1: (FCLK=On, HCLK=On) FCLK and HCLK are provided by the internal RC oscillator which remains active
// <o0.2> DBG_STANDBY
// <i> Debug Standby Mode
// <i> 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered.
// <i> 1: (FCLK=On, HCLK=On) Digital part is powered and FCLK and HCLK are provided by the internal RC oscillator which remains active
// <o0.8> DBG_IWDG_STOP
// <i> Debug independent watchdog stopped when core is halted
// <i> 0: The watchdog counter clock continues even if the core is halted
// <i> 1: The watchdog counter clock is stopped when the core is halted
// <o0.9> DBG_WWDG_STOP
// <i> Debug window watchdog stopped when core is halted
// <i> 0: The window watchdog counter clock continues even if the core is halted
// <i> 1: The window watchdog counter clock is stopped when the core is halted
// <o0.10> DBG_TIM1_STOP
// <i> Timer 1 counter stopped when core is halted
// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
// <o0.11> DBG_TIM2_STOP
// <i> Timer 2 counter stopped when core is halted
// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
// <o0.12> DBG_TIM3_STOP
// <i> Timer 3 counter stopped when core is halted
// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
// <o0.13> DBG_TIM4_STOP
// <i> Timer 4 counter stopped when core is halted
// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
// <o0.14> DBG_CAN1_STOP
// <i> Debug CAN1 stopped when Core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: CAN1 receive registers are frozen
// <o0.15> DBG_I2C1_SMBUS_TIMEOUT
// <i> I2C1 SMBUS timeout mode stopped when Core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The SMBUS timeout is frozen
// <o0.16> DBG_I2C2_SMBUS_TIMEOUT
// <i> I2C2 SMBUS timeout mode stopped when Core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The SMBUS timeout is frozen
// <o0.17> DBG_TIM8_STOP
// <i> Timer 8 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.18> DBG_TIM5_STOP
// <i> Timer 5 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.19> DBG_TIM6_STOP
// <i> Timer 6 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.20> DBG_TIM7_STOP
// <i> Timer 7 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.21> DBG_CAN2_STOP
// <i> Debug CAN2 stopped when Core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: CAN2 receive registers are frozen
// <o0.25> DBG_TIM12_STOP
// <i> Timer 12 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.26> DBG_TIM13_STOP
// <i> Timer 13 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.27> DBG_TIM14_STOP
// <i> Timer 14 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.28> DBG_TIM9_STOP
// <i> Timer 9 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.29> DBG_TIM10_STOP
// <i> Timer 10 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.30> DBG_TIM11_STOP
// <i> Timer 11 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// </h>
DbgMCU_CR = 0x00000007;
// <<< end of configuration section >>>

9
steper/stm32/EventRecorderStub.scvd Normal file
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@ -0,0 +1,9 @@
<?xml version="1.0" encoding="utf-8"?>
<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
<component name="EventRecorderStub" version="1.0.0"/> <!--name and version of the component-->
<events>
</events>
</component_viewer>

552
steper/stm32/JLinkLog.txt Normal file
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T06D0 790:227 SEGGER J-Link V4.90 Log File (0000ms, 13882ms total)
T06D0 790:227 DLL Compiled: Jul 28 2014 10:35:20 (0000ms, 13882ms total)
T06D0 790:227 Logging started @ 2019-12-30 20:39 (0000ms, 13882ms total)
T06D0 790:227 JLINK_SetWarnOutHandler(...) (0000ms, 13882ms total)
T06D0 790:227 JLINK_OpenEx(...)
Firmware: J-Link ARM V8 compiled Jan 31 2018 18:34:52
Hardware: V8.00
S/N: 20080643
Feature(s): RDI,FlashDL,FlashBP,JFlash,GDBFull returns O.K. (0264ms, 14146ms total)
T06D0 790:491 JLINK_GetEmuCaps() returns 0xB9FF7BBF (0000ms, 14146ms total)
T06D0 790:491 JLINK_TIF_GetAvailable(...) (0000ms, 14146ms total)
T06D0 790:492 JLINK_SetErrorOutHandler(...) (0000ms, 14146ms total)
T06D0 790:492 JLINK_ExecCommand("ProjectFile = "D:\project\HardwareDriver\steper\stm32\JLinkSettings.ini"", ...) returns 0x00 (0000ms, 14146ms total)
T06D0 790:497 JLINK_ExecCommand("Device = STM32F103RB", ...)Device "STM32F103RB" selected (128 KB flash, 20 KB RAM). returns 0x00 (0021ms, 14167ms total)
T06D0 790:518 JLINK_ExecCommand("DisableConnectionTimeout", ...) returns 0x01 (0000ms, 14167ms total)
T06D0 790:518 JLINK_GetHardwareVersion() returns 0x13880 (0000ms, 14167ms total)
T06D0 790:518 JLINK_GetDLLVersion() returns 49000 (0000ms, 14167ms total)
T06D0 790:518 JLINK_GetFirmwareString(...) (0000ms, 14167ms total)
T06D0 790:544 JLINK_GetDLLVersion() returns 49000 (0000ms, 14167ms total)
T06D0 790:544 JLINK_GetCompileDateTime() (0000ms, 14167ms total)
T06D0 790:550 JLINK_GetFirmwareString(...) (0000ms, 14167ms total)
T06D0 790:553 JLINK_GetHardwareVersion() returns 0x13880 (0000ms, 14167ms total)
T06D0 790:567 JLINK_TIF_Select(JLINKARM_TIF_JTAG) returns 0x00 (0001ms, 14168ms total)
T06D0 790:568 JLINK_SetSpeed(5000) (0000ms, 14168ms total)
T06D0 790:568 JLINK_GetIdData(...) >0x2F8 JTAG>TotalIRLen = 9, IRPrint = 0x0011 >0x30 JTAG> >0x210 JTAG> >0x40 JTAG> >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x40 JTAG> >0x40 JTAG> >0x40 JTAG> >0x40 JTAG> >0x40 JTAG> >0x40 JTAG> >0x40 JTAG> >0x40 JTAG> >0x40 JTAG> >0x40 JTAG> >0x2F8 JTAG>TotalIRLen = 9, IRPrint = 0x0011 >0x30 JTAG> >0x210 JTAG> >0x70 JTAG> >0x40 JTAG> >0x40 JTAG> >0x40 JTAG> >0x50 JTAG> >0x80 JTAG> >0x40 JTAG> >0x30 JTAG> >0x40 JTAG> >0x40 JTAG> >0x30 JTAG> >0x40 JTAG> >0x50 JTAG>
Found Cortex-M3 r1p1, Little endian. -- CPU_WriteMem(4 bytes @ 0xE0002000) -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -- CPU_WriteMem(4 bytes @ 0xE000EDF0) -- CPU_ReadMem(4 bytes @ 0xE0002000)FPUnit: 6 code (BP) slots and 2 literal slots -- CPU_ReadMem(4 bytes @ 0xE000EDFC) -- CPU_WriteMem(4 bytes @ 0xE000EDFC) -- CPU_ReadMem(4 bytes @ 0xE0001000) -- CPU_WriteMem(4 bytes @ 0xE0001000) -- CPU_ReadMem(4 bytes @ 0xE00FF010)TPIU fitted. -- CPU_ReadMem(4 bytes @ 0xE00FF014) -- CPU_ReadMem(4 bytes @ 0xE00FF018)
ScanLen=9 NumDevices=2 aId[0]=0x3BA00477 aIrRead[0]=0 aScanLen[0]=0 aScanRead[0]=0 (0043ms, 14211ms total)
T06D0 790:611 JLINK_JTAG_GetDeviceID(DeviceIndex = 0) returns 0x3BA00477 (0000ms, 14211ms total)
T06D0 790:611 JLINK_JTAG_GetDeviceInfo(DeviceIndex = 0) returns 0x00 (0000ms, 14211ms total)
T06D0 790:611 JLINK_JTAG_GetDeviceID(DeviceIndex = 1) returns 0x16410041 (0000ms, 14211ms total)
T06D0 790:611 JLINK_JTAG_GetDeviceInfo(DeviceIndex = 1) returns 0x00 (0000ms, 14211ms total)
T06D0 790:611 JLINK_GetDLLVersion() returns 49000 (0000ms, 14211ms total)
T06D0 790:611 JLINK_CORE_GetFound() returns 0x30000FF (0001ms, 14212ms total)
T06D0 790:615 JLINK_GetDebugInfo(0x100) -- Value=0xE00FF003 returns 0x00 (0000ms, 14212ms total)
T06D0 790:615 JLINK_GetDebugInfo(0x101) returns 0xFFFFFFFF (0000ms, 14212ms total)
T06D0 790:615 JLINK_ReadMemEx(0xE0041FF0, 0x0010 Bytes, ..., AccessWidth = 33554436) -- CPU is running -- CPU_ReadMem(16 bytes @ 0xE0041FF0) - Data: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 returns 0x10 (0001ms, 14213ms total)
T06D0 790:616 JLINK_GetDebugInfo(0x102) returns 0xFFFFFFFF (0000ms, 14213ms total)
T06D0 790:616 JLINK_GetDebugInfo(0x103) returns 0xFFFFFFFF (0000ms, 14213ms total)
T06D0 790:616 JLINK_ReadMemEx(0xE0040FF0, 0x0010 Bytes, ..., AccessWidth = 33554436) -- CPU is running -- CPU_ReadMem(16 bytes @ 0xE0040FF0) - Data: 0D 00 00 00 90 00 00 00 05 00 00 00 B1 00 00 00 returns 0x10 (0001ms, 14214ms total)
T06D0 790:617 JLINK_GetDebugInfo(0x104) returns 0xFFFFFFFF (0000ms, 14214ms total)
T06D0 790:617 JLINK_GetDebugInfo(0x105) returns 0xFFFFFFFF (0000ms, 14214ms total)
T06D0 790:617 JLINK_GetDebugInfo(0x106) returns 0xFFFFFFFF (0000ms, 14214ms total)
T06D0 790:617 JLINK_GetDebugInfo(0x107) returns 0xFFFFFFFF (0000ms, 14214ms total)
T06D0 790:617 JLINK_GetDebugInfo(0x10C) returns 0xFFFFFFFF (0000ms, 14214ms total)
T06D0 790:617 JLINK_GetDebugInfo(0x01) returns 0xFFFFFFFF (0000ms, 14214ms total)
T06D0 790:617 JLINK_GetDeviceFamily() returns 3 (0000ms, 14214ms total)
T06D0 790:617 JLINK_ReadMemU32(0xE000ED00, 0x0001 Items, ...) -- CPU is running -- CPU_ReadMem(4 bytes @ 0xE000ED00) - Data: 31 C2 1F 41 returns 0x01 (0001ms, 14215ms total)
T06D0 790:618 JLINK_GetDebugInfo(0x10F) returns 0xFFFFFFFF (0000ms, 14215ms total)
T06D0 790:618 JLINK_SetResetType(JLINKARM_RESET_TYPE_NORMAL) returns JLINKARM_RESET_TYPE_NORMAL (0000ms, 14215ms total)
T06D0 790:618 JLINK_Reset() -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE000EDF0) -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE000EDFC) -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE000ED0C) -- CPU is running -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -- CPU is running -- CPU_ReadMem(4 bytes @ 0xE000EDF0) -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE000EDF0) -- CPU is running -- CPU_WriteMem(4 bytes @ 0xE000EDFC) -- CPU is running -- CPU_ReadMem(4 bytes @ 0xE000EDF0) >0x80 JTAG> >0x40 JTAG> >0x30 JTAG>
>0x40 JTAG> >0x50 JTAG> >0x40 JTAG> -- CPU_WriteMem(4 bytes @ 0xE000EDFC) -- CPU_WriteMem(4 bytes @ 0xE0001028) -- CPU_WriteMem(4 bytes @ 0xE0001038) -- CPU_WriteMem(4 bytes @ 0xE0001048) -- CPU_WriteMem(4 bytes @ 0xE0001058) -- CPU_WriteMem(4 bytes @ 0xE0002000) -- CPU_ReadMem(4 bytes @ 0xE000EDFC) -- CPU_ReadMem(4 bytes @ 0xE0001000) (0026ms, 14241ms total)
T06D0 790:644 JLINK_Halt() returns 0x00 (0000ms, 14241ms total)
T06D0 790:644 JLINK_ReadMemU32(0xE000EDF0, 0x0001 Items, ...) -- CPU_ReadMem(4 bytes @ 0xE000EDF0) - Data: 03 00 03 00 returns 0x01 (0001ms, 14242ms total)
T06D0 790:645 JLINK_WriteU32(0xE000EDF0, 0xA05F0003) -- CPU_WriteMem(4 bytes @ 0xE000EDF0) returns 0x00 (0000ms, 14242ms total)
T06D0 790:645 JLINK_WriteU32(0xE000EDFC, 0x01000000) -- CPU_WriteMem(4 bytes @ 0xE000EDFC) returns 0x00 (0001ms, 14243ms total)
T06D0 790:660 JLINK_GetHWStatus(...) returns 0x00 (0001ms, 14244ms total)
T06D0 790:671 JLINK_GetNumBPUnits(Type = 0xFFFFFF00) returns 0x06 (0000ms, 14244ms total)
T06D0 790:671 JLINK_GetNumBPUnits(Type = 0xF0) returns 0x2000 (0000ms, 14244ms total)
T06D0 790:671 JLINK_GetNumWPUnits() returns 0x04 (0000ms, 14244ms total)
T06D0 790:683 JLINK_GetSpeed() returns 0x12C0 (0001ms, 14245ms total)
T06D0 790:689 JLINK_ReadMemU32(0xE000E004, 0x0001 Items, ...) -- CPU_ReadMem(4 bytes @ 0xE000E004) - Data: 01 00 00 00 returns 0x01 (0001ms, 14246ms total)
T06D0 790:690 JLINK_ReadMemU32(0xE000E004, 0x0001 Items, ...) -- CPU_ReadMem(4 bytes @ 0xE000E004) - Data: 01 00 00 00 returns 0x01 (0000ms, 14246ms total)
T06D0 790:690 JLINK_WriteMemEx(0xE0001000, 0x001C Bytes, ..., AccessWidth = 33554436) - Data: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ... -- CPU_WriteMem(28 bytes @ 0xE0001000) returns 0x1C (0001ms, 14247ms total)
T06D0 790:691 JLINK_Halt() returns 0x00 (0000ms, 14247ms total)
T06D0 790:691 JLINK_IsHalted() returns TRUE (0000ms, 14247ms total)
T06D0 790:694 JLINK_WriteMem(0x20000000, 0x0164 Bytes, ...) - Data: 00 BE 0A E0 0D 78 2D 06 68 40 08 24 40 00 00 D3 ... -- CPU_WriteMem(356 bytes @ 0x20000000) returns 0x164 (0004ms, 14251ms total)
T06D0 790:698 JLINK_WriteReg(R0, 0x08000000) returns 0x00 (0000ms, 14251ms total)
T06D0 790:698 JLINK_WriteReg(R1, 0x00B71B00) returns 0x00 (0000ms, 14251ms total)
T06D0 790:698 JLINK_WriteReg(R2, 0x00000001) returns 0x00 (0000ms, 14251ms total)
T06D0 790:698 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 14251ms total)
T06D0 790:698 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 14251ms total)
T06D0 790:698 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 14251ms total)
T06D0 790:698 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 14251ms total)
T06D0 790:698 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 14251ms total)
T06D0 790:698 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 14251ms total)
T06D0 790:698 JLINK_WriteReg(R9, 0x20000160) returns 0x00 (0000ms, 14251ms total)
T06D0 790:698 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 14251ms total)
T06D0 790:698 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 14251ms total)
T06D0 790:698 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 14251ms total)
T06D0 790:698 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 14251ms total)
T06D0 790:698 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 14251ms total)
T06D0 790:698 JLINK_WriteReg(R15 (PC), 0x20000038) returns 0x00 (0000ms, 14251ms total)
T06D0 790:698 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 14251ms total)
T06D0 790:698 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 14251ms total)
T06D0 790:698 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 14251ms total)
T06D0 790:698 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 14251ms total)
T06D0 790:698 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) -- CPU_ReadMem(2 bytes @ 0x20000000) returns 0x00000001 (0001ms, 14252ms total)
T06D0 790:699 JLINK_Go() -- CPU_WriteMem(2 bytes @ 0x20000000) -- CPU_WriteMem(4 bytes @ 0xE0002008) -- CPU_WriteMem(4 bytes @ 0xE000200C) -- CPU_WriteMem(4 bytes @ 0xE0002010) -- CPU_WriteMem(4 bytes @ 0xE0002014) -- CPU_WriteMem(4 bytes @ 0xE0002018) -- CPU_WriteMem(4 bytes @ 0xE000201C) -- CPU_WriteMem(4 bytes @ 0xE0001004) (0005ms, 14257ms total)
T06D0 790:704 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0004ms, 14261ms total)
T06D0 790:708 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 14257ms total)
T06D0 790:708 JLINK_ClrBPEx(BPHandle = 0x00000001) returns 0x00 (0000ms, 14257ms total)
T06D0 790:708 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 14257ms total)
T06D0 790:708 JLINK_WriteReg(R0, 0x08000000) returns 0x00 (0000ms, 14257ms total)
T06D0 790:708 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 14257ms total)
T06D0 790:708 JLINK_WriteReg(R2, 0x000000FF) returns 0x00 (0000ms, 14257ms total)
T06D0 790:708 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0001ms, 14258ms total)
T06D0 790:709 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 14258ms total)
T06D0 790:709 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 14258ms total)
T06D0 790:709 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 14258ms total)
T06D0 790:709 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 14258ms total)
T06D0 790:709 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 14258ms total)
T06D0 790:709 JLINK_WriteReg(R9, 0x20000160) returns 0x00 (0000ms, 14258ms total)
T06D0 790:709 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 14258ms total)
T06D0 790:709 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 14258ms total)
T06D0 790:709 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 14258ms total)
T06D0 790:709 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 14258ms total)
T06D0 790:709 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 14258ms total)
T06D0 790:709 JLINK_WriteReg(R15 (PC), 0x20000020) returns 0x00 (0000ms, 14258ms total)
T06D0 790:709 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 14258ms total)
T06D0 790:709 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 14258ms total)
T06D0 790:709 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 14258ms total)
T06D0 790:709 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 14258ms total)
T06D0 790:709 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000002 (0000ms, 14258ms total)
T06D0 790:709 JLINK_Go() (0001ms, 14259ms total)
T06D0 790:710 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0004ms, 14263ms total)
T06D0 790:714 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 14259ms total)
T06D0 790:714 JLINK_ClrBPEx(BPHandle = 0x00000002) returns 0x00 (0000ms, 14259ms total)
T06D0 790:714 JLINK_ReadReg(R0) returns 0x00000001 (0000ms, 14259ms total)
T06D0 790:714 JLINK_WriteReg(R0, 0x08000000) returns 0x00 (0000ms, 14259ms total)
T06D0 790:714 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 14259ms total)
T06D0 790:714 JLINK_WriteReg(R2, 0x000000FF) returns 0x00 (0000ms, 14259ms total)
T06D0 790:714 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 14259ms total)
T06D0 790:714 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 14259ms total)
T06D0 790:714 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 14259ms total)
T06D0 790:714 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 14259ms total)
T06D0 790:714 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 14259ms total)
T06D0 790:714 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 14259ms total)
T06D0 790:714 JLINK_WriteReg(R9, 0x20000160) returns 0x00 (0000ms, 14259ms total)
T06D0 790:714 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 14259ms total)
T06D0 790:714 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 14259ms total)
T06D0 790:714 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 14259ms total)
T06D0 790:714 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 14259ms total)
T06D0 790:714 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 14259ms total)
T06D0 790:714 JLINK_WriteReg(R15 (PC), 0x200000B6) returns 0x00 (0000ms, 14259ms total)
T06D0 790:714 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 14259ms total)
T06D0 790:714 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 14259ms total)
T06D0 790:714 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 14259ms total)
T06D0 790:714 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 14259ms total)
T06D0 790:714 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000003 (0000ms, 14259ms total)
T06D0 790:714 JLINK_Go() (0002ms, 14261ms total)
T06D0 790:716 JLINK_IsHalted() returns FALSE (0000ms, 14261ms total)
T06D0 790:788 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0003ms, 14264ms total)
T06D0 790:791 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 14261ms total)
T06D0 790:791 JLINK_ClrBPEx(BPHandle = 0x00000003) returns 0x00 (0000ms, 14261ms total)
T06D0 790:791 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 14261ms total)
T06D0 790:792 JLINK_WriteReg(R0, 0x08000400) returns 0x00 (0000ms, 14261ms total)
T06D0 790:792 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 14261ms total)
T06D0 790:792 JLINK_WriteReg(R2, 0x000000FF) returns 0x00 (0000ms, 14261ms total)
T06D0 790:792 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 14261ms total)
T06D0 790:792 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 14261ms total)
T06D0 790:792 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 14261ms total)
T06D0 790:792 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 14261ms total)
T06D0 790:792 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 14261ms total)
T06D0 790:792 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 14261ms total)
T06D0 790:792 JLINK_WriteReg(R9, 0x20000160) returns 0x00 (0000ms, 14261ms total)
T06D0 790:792 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 14261ms total)
T06D0 790:792 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 14261ms total)
T06D0 790:792 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 14261ms total)
T06D0 790:792 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 14261ms total)
T06D0 790:792 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 14261ms total)
T06D0 790:792 JLINK_WriteReg(R15 (PC), 0x20000020) returns 0x00 (0000ms, 14261ms total)
T06D0 790:792 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 14261ms total)
T06D0 790:793 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 14262ms total)
T06D0 790:793 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 14262ms total)
T06D0 790:793 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 14262ms total)
T06D0 790:793 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000004 (0000ms, 14262ms total)
T06D0 790:793 JLINK_Go() (0001ms, 14263ms total)
T06D0 790:794 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0004ms, 14267ms total)
T06D0 790:798 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 14263ms total)
T06D0 790:798 JLINK_ClrBPEx(BPHandle = 0x00000004) returns 0x00 (0000ms, 14263ms total)
T06D0 790:798 JLINK_ReadReg(R0) returns 0x00000001 (0000ms, 14263ms total)
T06D0 790:798 JLINK_WriteReg(R0, 0x08000400) returns 0x00 (0000ms, 14263ms total)
T06D0 790:798 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 14263ms total)
T06D0 790:798 JLINK_WriteReg(R2, 0x000000FF) returns 0x00 (0000ms, 14263ms total)
T06D0 790:798 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 14263ms total)
T06D0 790:798 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 14263ms total)
T06D0 790:798 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 14263ms total)
T06D0 790:798 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 14263ms total)
T06D0 790:798 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 14263ms total)
T06D0 790:798 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 14263ms total)
T06D0 790:798 JLINK_WriteReg(R9, 0x20000160) returns 0x00 (0000ms, 14263ms total)
T06D0 790:798 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 14263ms total)
T06D0 790:798 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 14263ms total)
T06D0 790:798 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 14263ms total)
T06D0 790:798 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 14263ms total)
T06D0 790:798 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 14263ms total)
T06D0 790:798 JLINK_WriteReg(R15 (PC), 0x200000B6) returns 0x00 (0000ms, 14263ms total)
T06D0 790:798 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 14263ms total)
T06D0 790:798 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 14263ms total)
T06D0 790:798 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 14263ms total)
T06D0 790:798 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 14263ms total)
T06D0 790:798 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000005 (0000ms, 14263ms total)
T06D0 790:798 JLINK_Go() (0001ms, 14264ms total)
T06D0 790:799 JLINK_IsHalted() returns FALSE (0001ms, 14265ms total)
T06D0 790:805 JLINK_IsHalted() returns FALSE (0000ms, 14264ms total)
T06D0 790:807 JLINK_IsHalted() returns FALSE (0000ms, 14264ms total)
T06D0 790:809 JLINK_IsHalted() returns FALSE (0000ms, 14264ms total)
T06D0 790:811 JLINK_IsHalted() returns FALSE (0000ms, 14264ms total)
T06D0 790:813 JLINK_IsHalted() returns FALSE (0000ms, 14264ms total)
T06D0 790:815 JLINK_IsHalted() returns FALSE (0000ms, 14264ms total)
T06D0 790:817 JLINK_IsHalted() returns FALSE (0000ms, 14264ms total)
T06D0 790:819 JLINK_IsHalted() returns FALSE (0000ms, 14264ms total)
T06D0 790:824 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0003ms, 14267ms total)
T06D0 790:827 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 14264ms total)
T06D0 790:827 JLINK_ClrBPEx(BPHandle = 0x00000005) returns 0x00 (0000ms, 14264ms total)
T06D0 790:827 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 14264ms total)
T06D0 790:829 JLINK_WriteReg(R0, 0x08000800) returns 0x00 (0000ms, 14264ms total)
T06D0 790:829 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 14264ms total)
T06D0 790:829 JLINK_WriteReg(R2, 0x000000FF) returns 0x00 (0000ms, 14264ms total)
T06D0 790:829 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 14264ms total)
T06D0 790:829 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 14264ms total)
T06D0 790:829 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 14264ms total)
T06D0 790:829 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 14264ms total)
T06D0 790:829 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 14264ms total)
T06D0 790:829 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 14264ms total)
T06D0 790:829 JLINK_WriteReg(R9, 0x20000160) returns 0x00 (0000ms, 14264ms total)
T06D0 790:829 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 14264ms total)
T06D0 790:829 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 14264ms total)
T06D0 790:829 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 14264ms total)
T06D0 790:829 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 14264ms total)
T06D0 790:829 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 14264ms total)
T06D0 790:829 JLINK_WriteReg(R15 (PC), 0x20000020) returns 0x00 (0000ms, 14264ms total)
T06D0 790:829 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 14264ms total)
T06D0 790:829 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 14264ms total)
T06D0 790:829 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 14264ms total)
T06D0 790:829 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 14264ms total)
T06D0 790:829 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000006 (0000ms, 14264ms total)
T06D0 790:829 JLINK_Go() (0001ms, 14265ms total)
T06D0 790:830 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0004ms, 14269ms total)
T06D0 790:834 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 14265ms total)
T06D0 790:834 JLINK_ClrBPEx(BPHandle = 0x00000006) returns 0x00 (0000ms, 14265ms total)
T06D0 790:834 JLINK_ReadReg(R0) returns 0x00000001 (0000ms, 14265ms total)
T06D0 790:834 JLINK_WriteReg(R0, 0x08000800) returns 0x00 (0000ms, 14265ms total)
T06D0 790:834 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 14265ms total)
T06D0 790:834 JLINK_WriteReg(R2, 0x000000FF) returns 0x00 (0000ms, 14265ms total)
T06D0 790:834 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 14265ms total)
T06D0 790:834 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 14265ms total)
T06D0 790:834 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 14265ms total)
T06D0 790:834 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 14265ms total)
T06D0 790:834 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 14265ms total)
T06D0 790:834 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 14265ms total)
T06D0 790:834 JLINK_WriteReg(R9, 0x20000160) returns 0x00 (0000ms, 14265ms total)
T06D0 790:834 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 14265ms total)
T06D0 790:834 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 14265ms total)
T06D0 790:834 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 14265ms total)
T06D0 790:834 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 14265ms total)
T06D0 790:834 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 14265ms total)
T06D0 790:834 JLINK_WriteReg(R15 (PC), 0x200000B6) returns 0x00 (0000ms, 14265ms total)
T06D0 790:834 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 14265ms total)
T06D0 790:834 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 14265ms total)
T06D0 790:834 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 14265ms total)
T06D0 790:834 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 14265ms total)
T06D0 790:834 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000007 (0000ms, 14265ms total)
T06D0 790:835 JLINK_Go() (0001ms, 14266ms total)
T06D0 790:836 JLINK_IsHalted() returns FALSE (0000ms, 14266ms total)
T06D0 790:840 JLINK_IsHalted() returns FALSE (0000ms, 14266ms total)
T06D0 790:842 JLINK_IsHalted() returns FALSE (0000ms, 14266ms total)
T06D0 790:849 JLINK_IsHalted() returns FALSE (0000ms, 14266ms total)
T06D0 790:851 JLINK_IsHalted() returns FALSE (0000ms, 14266ms total)
T06D0 790:853 JLINK_IsHalted() returns FALSE (0000ms, 14266ms total)
T06D0 790:855 JLINK_IsHalted() returns FALSE (0000ms, 14266ms total)
T06D0 790:860 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0003ms, 14269ms total)
T06D0 790:863 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 14266ms total)
T06D0 790:863 JLINK_ClrBPEx(BPHandle = 0x00000007) returns 0x00 (0000ms, 14266ms total)
T06D0 790:863 JLINK_ReadReg(R0) returns 0x00000000 (0001ms, 14267ms total)
T06D0 790:864 JLINK_WriteReg(R0, 0x00000001) returns 0x00 (0000ms, 14267ms total)
T06D0 790:864 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 14267ms total)
T06D0 790:864 JLINK_WriteReg(R2, 0x000000FF) returns 0x00 (0000ms, 14267ms total)
T06D0 790:864 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 14267ms total)
T06D0 790:864 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 14267ms total)
T06D0 790:864 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 14267ms total)
T06D0 790:864 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 14267ms total)
T06D0 790:864 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 14267ms total)
T06D0 790:864 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 14267ms total)
T06D0 790:864 JLINK_WriteReg(R9, 0x20000160) returns 0x00 (0000ms, 14267ms total)
T06D0 790:864 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 14267ms total)
T06D0 790:864 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 14267ms total)
T06D0 790:864 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 14267ms total)
T06D0 790:864 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 14267ms total)
T06D0 790:864 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 14267ms total)
T06D0 790:864 JLINK_WriteReg(R15 (PC), 0x2000006A) returns 0x00 (0000ms, 14267ms total)
T06D0 790:864 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 14267ms total)
T06D0 790:864 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 14267ms total)
T06D0 790:864 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 14267ms total)
T06D0 790:864 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 14267ms total)
T06D0 790:864 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000008 (0000ms, 14267ms total)
T06D0 790:864 JLINK_Go() (0002ms, 14269ms total)
T06D0 790:866 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0003ms, 14272ms total)
T06D0 790:869 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 14269ms total)
T06D0 790:869 JLINK_ClrBPEx(BPHandle = 0x00000008) returns 0x00 (0000ms, 14269ms total)
T06D0 790:869 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 14269ms total)
T06D0 790:928 JLINK_WriteMem(0x20000000, 0x0164 Bytes, ...) - Data: 00 BE 0A E0 0D 78 2D 06 68 40 08 24 40 00 00 D3 ... -- CPU_WriteMem(356 bytes @ 0x20000000) returns 0x164 (0004ms, 14273ms total)
T06D0 790:932 JLINK_WriteReg(R0, 0x08000000) returns 0x00 (0000ms, 14273ms total)
T06D0 790:932 JLINK_WriteReg(R1, 0x00B71B00) returns 0x00 (0000ms, 14273ms total)
T06D0 790:932 JLINK_WriteReg(R2, 0x00000002) returns 0x00 (0000ms, 14273ms total)
T06D0 790:932 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 14273ms total)
T06D0 790:932 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 14273ms total)
T06D0 790:932 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 14273ms total)
T06D0 790:932 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 14273ms total)
T06D0 790:932 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 14273ms total)
T06D0 790:932 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 14273ms total)
T06D0 790:932 JLINK_WriteReg(R9, 0x20000160) returns 0x00 (0000ms, 14273ms total)
T06D0 790:932 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 14273ms total)
T06D0 790:932 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 14273ms total)
T06D0 790:932 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 14273ms total)
T06D0 790:932 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 14273ms total)
T06D0 790:932 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 14273ms total)
T06D0 790:932 JLINK_WriteReg(R15 (PC), 0x20000038) returns 0x00 (0000ms, 14273ms total)
T06D0 790:932 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 14273ms total)
T06D0 790:932 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 14273ms total)
T06D0 790:932 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 14273ms total)
T06D0 790:932 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 14273ms total)
T06D0 790:932 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) -- CPU_ReadMem(2 bytes @ 0x20000000) returns 0x00000009 (0001ms, 14274ms total)
T06D0 790:933 JLINK_Go() -- CPU_WriteMem(2 bytes @ 0x20000000) (0002ms, 14276ms total)
T06D0 790:935 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0004ms, 14280ms total)
T06D0 790:939 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 14276ms total)
T06D0 790:939 JLINK_ClrBPEx(BPHandle = 0x00000009) returns 0x00 (0000ms, 14276ms total)
T06D0 790:939 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 14276ms total)
T06D0 790:939 JLINK_WriteMem(0x20000164, 0x029C Bytes, ...) - Data: 88 06 00 20 89 01 00 08 91 01 00 08 93 01 00 08 ... -- CPU_WriteMem(668 bytes @ 0x20000164) returns 0x29C (0006ms, 14282ms total)
T06D0 790:945 JLINK_WriteMem(0x20000400, 0x0164 Bytes, ...) - Data: 10 0C BC F1 00 0F 03 D0 91 F8 02 C0 4C EA 05 05 ... -- CPU_WriteMem(356 bytes @ 0x20000400) returns 0x164 (0003ms, 14285ms total)
T06D0 790:948 JLINK_WriteReg(R0, 0x08000000) returns 0x00 (0000ms, 14285ms total)
T06D0 790:948 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 14285ms total)
T06D0 790:948 JLINK_WriteReg(R2, 0x20000164) returns 0x00 (0000ms, 14285ms total)
T06D0 790:948 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 14285ms total)
T06D0 790:948 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 14285ms total)
T06D0 790:948 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 14285ms total)
T06D0 790:948 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 14285ms total)
T06D0 790:948 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 14285ms total)
T06D0 790:948 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 14285ms total)
T06D0 790:948 JLINK_WriteReg(R9, 0x20000160) returns 0x00 (0000ms, 14285ms total)
T06D0 790:948 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 14285ms total)
T06D0 790:948 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 14285ms total)
T06D0 790:948 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 14285ms total)
T06D0 790:948 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 14285ms total)
T06D0 790:948 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 14285ms total)
T06D0 790:948 JLINK_WriteReg(R15 (PC), 0x200000F4) returns 0x00 (0000ms, 14285ms total)
T06D0 790:948 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 14285ms total)
T06D0 790:949 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 14286ms total)
T06D0 790:949 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 14286ms total)
T06D0 790:949 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 14286ms total)
T06D0 790:949 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x0000000A (0000ms, 14286ms total)
T06D0 790:949 JLINK_Go() (0001ms, 14287ms total)
T06D0 790:950 JLINK_IsHalted() returns FALSE (0000ms, 14287ms total)
T06D0 790:958 JLINK_IsHalted() returns FALSE (0000ms, 14287ms total)
T06D0 790:960 JLINK_IsHalted() returns FALSE (0000ms, 14287ms total)
T06D0 790:962 JLINK_IsHalted() returns FALSE (0000ms, 14287ms total)
T06D0 790:964 JLINK_IsHalted() returns FALSE (0000ms, 14287ms total)
T06D0 790:966 JLINK_IsHalted() returns FALSE (0000ms, 14287ms total)
T06D0 790:968 JLINK_IsHalted() returns FALSE (0000ms, 14287ms total)
T06D0 790:970 JLINK_IsHalted() returns FALSE (0000ms, 14287ms total)
T06D0 790:972 JLINK_IsHalted() returns FALSE (0000ms, 14287ms total)
T06D0 790:977 JLINK_IsHalted() returns FALSE (0000ms, 14287ms total)
T06D0 790:979 JLINK_IsHalted() returns FALSE (0000ms, 14287ms total)
T06D0 790:981 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0004ms, 14291ms total)
T06D0 790:985 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 14287ms total)
T06D0 790:985 JLINK_ClrBPEx(BPHandle = 0x0000000A) returns 0x00 (0000ms, 14287ms total)
T06D0 790:985 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 14287ms total)
T06D0 790:985 JLINK_WriteMem(0x20000164, 0x029C Bytes, ...) - Data: F1 D1 29 48 00 68 00 F4 00 30 10 B1 01 20 00 90 ... -- CPU_WriteMem(668 bytes @ 0x20000164) returns 0x29C (0006ms, 14293ms total)
T06D0 790:991 JLINK_WriteMem(0x20000400, 0x0164 Bytes, ...) - Data: 4F F6 8F 75 2C 40 4F F6 FC 75 2C 40 0D 88 2C 43 ... -- CPU_WriteMem(356 bytes @ 0x20000400) returns 0x164 (0003ms, 14296ms total)
T06D0 790:994 JLINK_WriteReg(R0, 0x08000400) returns 0x00 (0000ms, 14296ms total)
T06D0 790:994 JLINK_WriteReg(R1, 0x00000400) returns 0x00 (0000ms, 14296ms total)
T06D0 790:994 JLINK_WriteReg(R2, 0x20000164) returns 0x00 (0000ms, 14296ms total)
T06D0 790:994 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 14296ms total)
T06D0 790:994 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 14296ms total)
T06D0 790:994 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 14296ms total)
T06D0 790:994 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 14296ms total)
T06D0 790:994 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 14296ms total)
T06D0 790:994 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0001ms, 14297ms total)
T06D0 790:995 JLINK_WriteReg(R9, 0x20000160) returns 0x00 (0000ms, 14297ms total)
T06D0 790:995 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 14297ms total)
T06D0 790:995 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 14297ms total)
T06D0 790:995 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 14297ms total)
T06D0 790:995 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 14297ms total)
T06D0 790:995 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 14297ms total)
T06D0 790:995 JLINK_WriteReg(R15 (PC), 0x200000F4) returns 0x00 (0000ms, 14297ms total)
T06D0 790:995 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 14297ms total)
T06D0 790:995 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 14297ms total)
T06D0 790:995 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 14297ms total)
T06D0 790:995 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 14297ms total)
T06D0 790:995 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x0000000B (0000ms, 14297ms total)
T06D0 790:995 JLINK_Go() (0001ms, 14298ms total)
T06D0 790:996 JLINK_IsHalted() returns FALSE (0001ms, 14299ms total)
T06D0 791:001 JLINK_IsHalted() returns FALSE (0000ms, 14298ms total)
T06D0 791:003 JLINK_IsHalted() returns FALSE (0000ms, 14298ms total)
T06D0 791:007 JLINK_IsHalted() returns FALSE (0000ms, 14298ms total)
T06D0 791:009 JLINK_IsHalted() returns FALSE (0000ms, 14298ms total)
T06D0 791:011 JLINK_IsHalted() returns FALSE (0000ms, 14298ms total)
T06D0 791:013 JLINK_IsHalted() returns FALSE (0000ms, 14298ms total)
T06D0 791:018 JLINK_IsHalted() returns FALSE (0000ms, 14298ms total)
T06D0 791:020 JLINK_IsHalted() returns FALSE (0000ms, 14298ms total)
T06D0 791:022 JLINK_IsHalted() returns FALSE (0000ms, 14298ms total)
T06D0 791:024 JLINK_IsHalted() returns FALSE (0000ms, 14298ms total)
T06D0 791:026 JLINK_IsHalted() returns FALSE (0000ms, 14298ms total)
T06D0 791:028 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0003ms, 14301ms total)
T06D0 791:031 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 14298ms total)
T06D0 791:032 JLINK_ClrBPEx(BPHandle = 0x0000000B) returns 0x00 (0000ms, 14298ms total)
T06D0 791:032 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 14298ms total)
T06D0 791:032 JLINK_WriteMem(0x20000164, 0x029C Bytes, ...) - Data: 98 42 05 D0 0D 4B 98 42 02 D0 0D 4B 98 42 01 D1 ... -- CPU_WriteMem(668 bytes @ 0x20000164) returns 0x29C (0006ms, 14304ms total)
T06D0 791:038 JLINK_WriteMem(0x20000400, 0x0164 Bytes, ...) - Data: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ... -- CPU_WriteMem(356 bytes @ 0x20000400) returns 0x164 (0004ms, 14308ms total)
T06D0 791:042 JLINK_WriteReg(R0, 0x08000800) returns 0x00 (0000ms, 14308ms total)
T06D0 791:042 JLINK_WriteReg(R1, 0x0000026C) returns 0x00 (0000ms, 14308ms total)
T06D0 791:042 JLINK_WriteReg(R2, 0x20000164) returns 0x00 (0000ms, 14308ms total)
T06D0 791:042 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 14308ms total)
T06D0 791:042 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 14308ms total)
T06D0 791:042 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 14308ms total)
T06D0 791:042 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 14308ms total)
T06D0 791:042 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 14308ms total)
T06D0 791:042 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 14308ms total)
T06D0 791:042 JLINK_WriteReg(R9, 0x20000160) returns 0x00 (0000ms, 14308ms total)
T06D0 791:042 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 14308ms total)
T06D0 791:042 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 14308ms total)
T06D0 791:042 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 14308ms total)
T06D0 791:042 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 14308ms total)
T06D0 791:042 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 14308ms total)
T06D0 791:042 JLINK_WriteReg(R15 (PC), 0x200000F4) returns 0x00 (0000ms, 14308ms total)
T06D0 791:042 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 14308ms total)
T06D0 791:042 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 14308ms total)
T06D0 791:042 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 14308ms total)
T06D0 791:042 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 14308ms total)
T06D0 791:042 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x0000000C (0000ms, 14308ms total)
T06D0 791:042 JLINK_Go() (0001ms, 14309ms total)
T06D0 791:043 JLINK_IsHalted() returns FALSE (0001ms, 14310ms total)
T06D0 791:049 JLINK_IsHalted() returns FALSE (0000ms, 14309ms total)
T06D0 791:051 JLINK_IsHalted() returns FALSE (0000ms, 14309ms total)
T06D0 791:053 JLINK_IsHalted() returns FALSE (0000ms, 14309ms total)
T06D0 791:055 JLINK_IsHalted() returns FALSE (0000ms, 14309ms total)
T06D0 791:057 JLINK_IsHalted() returns FALSE (0000ms, 14309ms total)
T06D0 791:059 JLINK_IsHalted() returns FALSE (0000ms, 14309ms total)
T06D0 791:066 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0004ms, 14313ms total)
T06D0 791:070 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 14309ms total)
T06D0 791:070 JLINK_ClrBPEx(BPHandle = 0x0000000C) returns 0x00 (0000ms, 14309ms total)
T06D0 791:070 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 14309ms total)
T06D0 791:070 JLINK_WriteReg(R0, 0x00000002) returns 0x00 (0000ms, 14309ms total)
T06D0 791:070 JLINK_WriteReg(R1, 0x0000026C) returns 0x00 (0000ms, 14309ms total)
T06D0 791:070 JLINK_WriteReg(R2, 0x20000164) returns 0x00 (0000ms, 14309ms total)
T06D0 791:070 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 14309ms total)
T06D0 791:070 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 14309ms total)
T06D0 791:070 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 14309ms total)
T06D0 791:070 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 14309ms total)
T06D0 791:070 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 14309ms total)
T06D0 791:070 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 14309ms total)
T06D0 791:070 JLINK_WriteReg(R9, 0x20000160) returns 0x00 (0000ms, 14309ms total)
T06D0 791:070 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 14309ms total)
T06D0 791:070 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 14309ms total)
T06D0 791:070 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 14309ms total)
T06D0 791:070 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 14309ms total)
T06D0 791:070 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 14309ms total)
T06D0 791:070 JLINK_WriteReg(R15 (PC), 0x2000006A) returns 0x00 (0000ms, 14309ms total)
T06D0 791:070 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 14309ms total)
T06D0 791:070 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 14309ms total)
T06D0 791:070 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 14309ms total)
T06D0 791:070 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 14309ms total)
T06D0 791:070 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x0000000D (0000ms, 14309ms total)
T06D0 791:070 JLINK_Go() (0002ms, 14311ms total)
T06D0 791:072 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0004ms, 14315ms total)
T06D0 791:076 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 14311ms total)
T06D0 791:076 JLINK_ClrBPEx(BPHandle = 0x0000000D) returns 0x00 (0000ms, 14311ms total)
T06D0 791:076 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 14311ms total)
T06D0 791:134 JLINK_WriteMem(0x20000000, 0x0164 Bytes, ...) - Data: 00 BE 0A E0 0D 78 2D 06 68 40 08 24 40 00 00 D3 ... -- CPU_WriteMem(356 bytes @ 0x20000000) returns 0x164 (0004ms, 14315ms total)
T06D0 791:138 JLINK_WriteReg(R0, 0x08000000) returns 0x00 (0000ms, 14315ms total)
T06D0 791:138 JLINK_WriteReg(R1, 0x00B71B00) returns 0x00 (0000ms, 14315ms total)
T06D0 791:138 JLINK_WriteReg(R2, 0x00000003) returns 0x00 (0000ms, 14315ms total)
T06D0 791:138 JLINK_WriteReg(R3, 0x00000000) returns 0x00 (0000ms, 14315ms total)
T06D0 791:138 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 14315ms total)
T06D0 791:138 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 14315ms total)
T06D0 791:138 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 14315ms total)
T06D0 791:138 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 14315ms total)
T06D0 791:138 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 14315ms total)
T06D0 791:138 JLINK_WriteReg(R9, 0x20000160) returns 0x00 (0000ms, 14315ms total)
T06D0 791:138 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 14315ms total)
T06D0 791:138 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 14315ms total)
T06D0 791:138 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 14315ms total)
T06D0 791:138 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 14315ms total)
T06D0 791:138 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 14315ms total)
T06D0 791:138 JLINK_WriteReg(R15 (PC), 0x20000038) returns 0x00 (0000ms, 14315ms total)
T06D0 791:138 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 14315ms total)
T06D0 791:138 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 14315ms total)
T06D0 791:138 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 14315ms total)
T06D0 791:138 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 14315ms total)
T06D0 791:138 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) -- CPU_ReadMem(2 bytes @ 0x20000000) returns 0x0000000E (0001ms, 14316ms total)
T06D0 791:139 JLINK_Go() -- CPU_WriteMem(2 bytes @ 0x20000000) (0002ms, 14318ms total)
T06D0 791:141 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0004ms, 14322ms total)
T06D0 791:145 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 14318ms total)
T06D0 791:145 JLINK_ClrBPEx(BPHandle = 0x0000000E) returns 0x00 (0000ms, 14318ms total)
T06D0 791:145 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 14318ms total)
T06D0 791:145 JLINK_WriteReg(R0, 0xFFFFFFFF) returns 0x00 (0000ms, 14318ms total)
T06D0 791:145 JLINK_WriteReg(R1, 0x08000000) returns 0x00 (0000ms, 14318ms total)
T06D0 791:145 JLINK_WriteReg(R2, 0x00000A6C) returns 0x00 (0000ms, 14318ms total)
T06D0 791:145 JLINK_WriteReg(R3, 0x04C11DB7) returns 0x00 (0000ms, 14318ms total)
T06D0 791:145 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 14318ms total)
T06D0 791:145 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 14318ms total)
T06D0 791:145 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 14318ms total)
T06D0 791:145 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 14318ms total)
T06D0 791:145 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 14318ms total)
T06D0 791:145 JLINK_WriteReg(R9, 0x20000160) returns 0x00 (0000ms, 14318ms total)
T06D0 791:145 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 14318ms total)
T06D0 791:145 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 14318ms total)
T06D0 791:145 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 14318ms total)
T06D0 791:145 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 14318ms total)
T06D0 791:145 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 14318ms total)
T06D0 791:145 JLINK_WriteReg(R15 (PC), 0x20000002) returns 0x00 (0000ms, 14318ms total)
T06D0 791:145 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 14318ms total)
T06D0 791:145 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 14318ms total)
T06D0 791:145 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 14318ms total)
T06D0 791:145 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 14318ms total)
T06D0 791:145 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x0000000F (0000ms, 14318ms total)
T06D0 791:145 JLINK_Go() (0002ms, 14320ms total)
T06D0 791:147 JLINK_IsHalted() returns FALSE (0000ms, 14320ms total)
T06D0 791:153 JLINK_IsHalted() returns FALSE (0000ms, 14320ms total)
T06D0 791:155 JLINK_IsHalted() returns FALSE (0000ms, 14320ms total)
T06D0 791:157 JLINK_IsHalted() returns FALSE (0000ms, 14320ms total)
T06D0 791:159 JLINK_IsHalted() returns FALSE (0000ms, 14320ms total)
T06D0 791:163 JLINK_IsHalted() returns FALSE (0000ms, 14320ms total)
T06D0 791:165 JLINK_IsHalted() returns FALSE (0000ms, 14320ms total)
T06D0 791:167 JLINK_IsHalted() returns FALSE (0000ms, 14320ms total)
T06D0 791:169 JLINK_IsHalted() returns FALSE (0000ms, 14320ms total)
T06D0 791:171 JLINK_IsHalted() returns FALSE (0000ms, 14320ms total)
T06D0 791:177 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0004ms, 14324ms total)
T06D0 791:181 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 14320ms total)
T06D0 791:181 JLINK_ClrBPEx(BPHandle = 0x0000000F) returns 0x00 (0000ms, 14320ms total)
T06D0 791:181 JLINK_ReadReg(R0) returns 0x48624F75 (0000ms, 14320ms total)
T06D0 791:181 JLINK_WriteReg(R0, 0x00000003) returns 0x00 (0001ms, 14321ms total)
T06D0 791:182 JLINK_WriteReg(R1, 0x08000000) returns 0x00 (0000ms, 14321ms total)
T06D0 791:182 JLINK_WriteReg(R2, 0x00000A6C) returns 0x00 (0000ms, 14321ms total)
T06D0 791:182 JLINK_WriteReg(R3, 0x04C11DB7) returns 0x00 (0000ms, 14321ms total)
T06D0 791:182 JLINK_WriteReg(R4, 0x00000000) returns 0x00 (0000ms, 14321ms total)
T06D0 791:182 JLINK_WriteReg(R5, 0x00000000) returns 0x00 (0000ms, 14321ms total)
T06D0 791:182 JLINK_WriteReg(R6, 0x00000000) returns 0x00 (0000ms, 14321ms total)
T06D0 791:182 JLINK_WriteReg(R7, 0x00000000) returns 0x00 (0000ms, 14321ms total)
T06D0 791:182 JLINK_WriteReg(R8, 0x00000000) returns 0x00 (0000ms, 14321ms total)
T06D0 791:182 JLINK_WriteReg(R9, 0x20000160) returns 0x00 (0000ms, 14321ms total)
T06D0 791:182 JLINK_WriteReg(R10, 0x00000000) returns 0x00 (0000ms, 14321ms total)
T06D0 791:182 JLINK_WriteReg(R11, 0x00000000) returns 0x00 (0000ms, 14321ms total)
T06D0 791:182 JLINK_WriteReg(R12, 0x00000000) returns 0x00 (0000ms, 14321ms total)
T06D0 791:182 JLINK_WriteReg(R13 (SP), 0x20001000) returns 0x00 (0000ms, 14321ms total)
T06D0 791:182 JLINK_WriteReg(R14, 0x20000001) returns 0x00 (0000ms, 14321ms total)
T06D0 791:182 JLINK_WriteReg(R15 (PC), 0x2000006A) returns 0x00 (0000ms, 14321ms total)
T06D0 791:182 JLINK_WriteReg(XPSR, 0x01000000) returns 0x00 (0000ms, 14321ms total)
T06D0 791:182 JLINK_WriteReg(MSP, 0x20001000) returns 0x00 (0000ms, 14321ms total)
T06D0 791:182 JLINK_WriteReg(PSP, 0x20001000) returns 0x00 (0000ms, 14321ms total)
T06D0 791:182 JLINK_WriteReg(CFBP, 0x00000000) returns 0x00 (0000ms, 14321ms total)
T06D0 791:182 JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2) returns 0x00000010 (0000ms, 14321ms total)
T06D0 791:182 JLINK_Go() (0001ms, 14322ms total)
T06D0 791:183 JLINK_IsHalted() -- CPU_ReadMem(2 bytes @ 0x20000000) returns TRUE (0004ms, 14326ms total)
T06D0 791:187 JLINK_ReadReg(R15 (PC)) returns 0x20000000 (0000ms, 14322ms total)
T06D0 791:187 JLINK_ClrBPEx(BPHandle = 0x00000010) returns 0x00 (0000ms, 14322ms total)
T06D0 791:187 JLINK_ReadReg(R0) returns 0x00000000 (0000ms, 14322ms total)
T06D0 791:243 JLINK_WriteMemEx(0x20000000, 0x0002 Bytes, ..., AccessWidth = 33554432) - Data: FE E7Mis-aligned memory write: Address: 0x20000000, NumBytes: 2, Alignment: 2 (Halfword-aligned)
***** Mis-aligned memory write: Address: 0x20000000, NumBytes: 2, Alignment: 2 (Halfword-aligned) -- CPU_WriteMem(2 bytes @ 0x20000000) returns 0x02 (0005ms, 14327ms total)
T06D0 791:544 JLINK_Close() >0x80 JTAG> >0x08 JTAG> (0003ms, 14330ms total)
T06D0 791:544 (0003ms, 14330ms total)
T06D0 791:544 Closed (0003ms, 14330ms total)

851
steper/stm32/Listings/MG955.map Normal file
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@ -0,0 +1,851 @@
Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed]
==============================================================================
Section Cross References
main.o(i.GPIO_Configuration) refers to stm32f10x_gpio.o(i.GPIO_Init) for GPIO_Init
main.o(i.RCC_Configuration) refers to system_stm32f10x.o(i.SystemInit) for SystemInit
main.o(i.RCC_Configuration) refers to stm32f10x_rcc.o(i.RCC_APB2PeriphClockCmd) for RCC_APB2PeriphClockCmd
main.o(i.main) refers to main.o(i.RCC_Configuration) for RCC_Configuration
main.o(i.main) refers to main.o(i.GPIO_Configuration) for GPIO_Configuration
main.o(i.main) refers to stm32f10x_tim.o(i.TIM_TimeBaseInit) for TIM_TimeBaseInit
main.o(i.main) refers to stm32f10x_tim.o(i.TIM_OC1Init) for TIM_OC1Init
main.o(i.main) refers to stm32f10x_tim.o(i.TIM_OC2Init) for TIM_OC2Init
main.o(i.main) refers to stm32f10x_tim.o(i.TIM_OC3Init) for TIM_OC3Init
main.o(i.main) refers to stm32f10x_tim.o(i.TIM_OC4Init) for TIM_OC4Init
main.o(i.main) refers to stm32f10x_tim.o(i.TIM_Cmd) for TIM_Cmd
main.o(i.main) refers to stm32f10x_tim.o(i.TIM_CtrlPWMOutputs) for TIM_CtrlPWMOutputs
main.o(i.main) refers to main.o(i.sleep1sec) for sleep1sec
main.o(i.main) refers to main.o(.bss) for TIM_TimeBaseStructure
main.o(i.main) refers to main.o(.data) for CCR1_Val
stm32f10x_gpio.o(i.GPIO_AFIODeInit) refers to stm32f10x_rcc.o(i.RCC_APB2PeriphResetCmd) for RCC_APB2PeriphResetCmd
stm32f10x_gpio.o(i.GPIO_DeInit) refers to stm32f10x_rcc.o(i.RCC_APB2PeriphResetCmd) for RCC_APB2PeriphResetCmd
stm32f10x_rcc.o(i.RCC_GetClocksFreq) refers to stm32f10x_rcc.o(.data) for APBAHBPrescTable
stm32f10x_rcc.o(i.RCC_WaitForHSEStartUp) refers to stm32f10x_rcc.o(i.RCC_GetFlagStatus) for RCC_GetFlagStatus
stm32f10x_tim.o(i.TIM_DeInit) refers to stm32f10x_rcc.o(i.RCC_APB2PeriphResetCmd) for RCC_APB2PeriphResetCmd
stm32f10x_tim.o(i.TIM_DeInit) refers to stm32f10x_rcc.o(i.RCC_APB1PeriphResetCmd) for RCC_APB1PeriphResetCmd
stm32f10x_tim.o(i.TIM_ETRClockMode1Config) refers to stm32f10x_tim.o(i.TIM_ETRConfig) for TIM_ETRConfig
stm32f10x_tim.o(i.TIM_ETRClockMode2Config) refers to stm32f10x_tim.o(i.TIM_ETRConfig) for TIM_ETRConfig
stm32f10x_tim.o(i.TIM_ICInit) refers to stm32f10x_tim.o(i.TI1_Config) for TI1_Config
stm32f10x_tim.o(i.TIM_ICInit) refers to stm32f10x_tim.o(i.TIM_SetIC1Prescaler) for TIM_SetIC1Prescaler
stm32f10x_tim.o(i.TIM_ICInit) refers to stm32f10x_tim.o(i.TI2_Config) for TI2_Config
stm32f10x_tim.o(i.TIM_ICInit) refers to stm32f10x_tim.o(i.TIM_SetIC2Prescaler) for TIM_SetIC2Prescaler
stm32f10x_tim.o(i.TIM_ICInit) refers to stm32f10x_tim.o(i.TI3_Config) for TI3_Config
stm32f10x_tim.o(i.TIM_ICInit) refers to stm32f10x_tim.o(i.TIM_SetIC3Prescaler) for TIM_SetIC3Prescaler
stm32f10x_tim.o(i.TIM_ICInit) refers to stm32f10x_tim.o(i.TI4_Config) for TI4_Config
stm32f10x_tim.o(i.TIM_ICInit) refers to stm32f10x_tim.o(i.TIM_SetIC4Prescaler) for TIM_SetIC4Prescaler
stm32f10x_tim.o(i.TIM_ITRxExternalClockConfig) refers to stm32f10x_tim.o(i.TIM_SelectInputTrigger) for TIM_SelectInputTrigger
stm32f10x_tim.o(i.TIM_PWMIConfig) refers to stm32f10x_tim.o(i.TI1_Config) for TI1_Config
stm32f10x_tim.o(i.TIM_PWMIConfig) refers to stm32f10x_tim.o(i.TIM_SetIC1Prescaler) for TIM_SetIC1Prescaler
stm32f10x_tim.o(i.TIM_PWMIConfig) refers to stm32f10x_tim.o(i.TI2_Config) for TI2_Config
stm32f10x_tim.o(i.TIM_PWMIConfig) refers to stm32f10x_tim.o(i.TIM_SetIC2Prescaler) for TIM_SetIC2Prescaler
stm32f10x_tim.o(i.TIM_TIxExternalClockConfig) refers to stm32f10x_tim.o(i.TI2_Config) for TI2_Config
stm32f10x_tim.o(i.TIM_TIxExternalClockConfig) refers to stm32f10x_tim.o(i.TI1_Config) for TI1_Config
stm32f10x_tim.o(i.TIM_TIxExternalClockConfig) refers to stm32f10x_tim.o(i.TIM_SelectInputTrigger) for TIM_SelectInputTrigger
gpio_stm32f10x.o(i.GPIO_PinConfigure) refers to gpio_stm32f10x.o(i.GPIO_GetPortClockState) for GPIO_GetPortClockState
gpio_stm32f10x.o(i.GPIO_PinConfigure) refers to gpio_stm32f10x.o(i.GPIO_PortClock) for GPIO_PortClock
startup_stm32f10x_md.o(STACK) refers (Special) to heapauxi.o(.text) for __use_two_region_memory
startup_stm32f10x_md.o(HEAP) refers (Special) to heapauxi.o(.text) for __use_two_region_memory
startup_stm32f10x_md.o(RESET) refers (Special) to heapauxi.o(.text) for __use_two_region_memory
startup_stm32f10x_md.o(RESET) refers to startup_stm32f10x_md.o(STACK) for __initial_sp
startup_stm32f10x_md.o(RESET) refers to startup_stm32f10x_md.o(.text) for Reset_Handler
startup_stm32f10x_md.o(.text) refers (Special) to heapauxi.o(.text) for __use_two_region_memory
startup_stm32f10x_md.o(.text) refers to system_stm32f10x.o(i.SystemInit) for SystemInit
startup_stm32f10x_md.o(.text) refers to __main.o(!!!main) for __main
startup_stm32f10x_md.o(.text) refers to startup_stm32f10x_md.o(HEAP) for Heap_Mem
startup_stm32f10x_md.o(.text) refers to startup_stm32f10x_md.o(STACK) for Stack_Mem
system_stm32f10x.o(i.SetSysClock) refers to system_stm32f10x.o(i.SetSysClockTo72) for SetSysClockTo72
system_stm32f10x.o(i.SystemCoreClockUpdate) refers to system_stm32f10x.o(.data) for SystemCoreClock
system_stm32f10x.o(i.SystemInit) refers to system_stm32f10x.o(i.SetSysClock) for SetSysClock
__main.o(!!!main) refers to __rtentry.o(.ARM.Collect$$rtentry$$00000000) for __rt_entry
__rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) for __rt_entry_li
__rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) for __rt_entry_main
__rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000C) for __rt_entry_postli_1
__rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$00000009) for __rt_entry_postsh_1
__rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$00000002) for __rt_entry_presh_1
__rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry4.o(.ARM.Collect$$rtentry$$00000004) for __rt_entry_sh
__rtentry2.o(.ARM.Collect$$rtentry$$00000008) refers to boardinit2.o(.text) for _platform_post_stackheap_init
__rtentry2.o(.ARM.Collect$$rtentry$$0000000A) refers to libinit.o(.ARM.Collect$$libinit$$00000000) for __rt_lib_init
__rtentry2.o(.ARM.Collect$$rtentry$$0000000B) refers to boardinit3.o(.text) for _platform_post_lib_init
__rtentry2.o(.ARM.Collect$$rtentry$$0000000D) refers to main.o(i.main) for main
__rtentry2.o(.ARM.Collect$$rtentry$$0000000D) refers to exit.o(.text) for exit
__rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$00000001) for .ARM.Collect$$rtentry$$00000001
__rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$00000008) for .ARM.Collect$$rtentry$$00000008
__rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) for .ARM.Collect$$rtentry$$0000000A
__rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000B) for .ARM.Collect$$rtentry$$0000000B
__rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) for .ARM.Collect$$rtentry$$0000000D
__rtentry4.o(.ARM.Collect$$rtentry$$00000004) refers to sys_stackheap_outer.o(.text) for __user_setup_stackheap
__rtentry4.o(.ARM.exidx) refers to __rtentry4.o(.ARM.Collect$$rtentry$$00000004) for .ARM.Collect$$rtentry$$00000004
sys_stackheap_outer.o(.text) refers to libspace.o(.text) for __user_perproc_libspace
sys_stackheap_outer.o(.text) refers to startup_stm32f10x_md.o(.text) for __user_initial_stackheap
exit.o(.text) refers to rtexit.o(.ARM.Collect$$rtexit$$00000000) for __rt_exit
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000002E) for __rt_lib_init_alloca_1
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000002C) for __rt_lib_init_argv_1
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001B) for __rt_lib_init_atexit_1
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000021) for __rt_lib_init_clock_1
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000032) for __rt_lib_init_cpp_1
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000030) for __rt_lib_init_exceptions_1
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000002) for __rt_lib_init_fp_1
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001F) for __rt_lib_init_fp_trap_1
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000023) for __rt_lib_init_getenv_1
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000A) for __rt_lib_init_heap_1
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000011) for __rt_lib_init_lc_collate_1
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000013) for __rt_lib_init_lc_ctype_1
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000015) for __rt_lib_init_lc_monetary_1
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000017) for __rt_lib_init_lc_numeric_1
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000019) for __rt_lib_init_lc_time_1
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000004) for __rt_lib_init_preinit_1
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000E) for __rt_lib_init_rand_1
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000033) for __rt_lib_init_return
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001D) for __rt_lib_init_signal_1
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000025) for __rt_lib_init_stdio_1
libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000C) for __rt_lib_init_user_alloc_1
libspace.o(.text) refers to libspace.o(.bss) for __libspace_start
rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for __rt_exit_exit
rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for __rt_exit_ls
rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000002) for __rt_exit_prels_1
rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for __rt_exit_exit
rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for __rt_exit_ls
rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000002) for __rt_exit_prels_1
rtexit.o(.ARM.exidx) refers to rtexit.o(.ARM.Collect$$rtexit$$00000000) for .ARM.Collect$$rtexit$$00000000
libinit2.o(.ARM.Collect$$libinit$$00000010) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F
libinit2.o(.ARM.Collect$$libinit$$00000012) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F
libinit2.o(.ARM.Collect$$libinit$$00000014) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F
libinit2.o(.ARM.Collect$$libinit$$00000016) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F
libinit2.o(.ARM.Collect$$libinit$$00000018) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F
libinit2.o(.ARM.Collect$$libinit$$00000026) refers to argv_veneer.o(.emb_text) for __ARM_argv_veneer
libinit2.o(.ARM.Collect$$libinit$$00000027) refers to argv_veneer.o(.emb_text) for __ARM_argv_veneer
rtexit2.o(.ARM.Collect$$rtexit$$00000003) refers to libshutdown.o(.ARM.Collect$$libshutdown$$00000000) for __rt_lib_shutdown
rtexit2.o(.ARM.Collect$$rtexit$$00000004) refers to sys_exit.o(.text) for _sys_exit
rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000001) for .ARM.Collect$$rtexit$$00000001
rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for .ARM.Collect$$rtexit$$00000003
rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for .ARM.Collect$$rtexit$$00000004
argv_veneer.o(.emb_text) refers to no_argv.o(.text) for __ARM_get_argv
sys_exit.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting
sys_exit.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function
_get_argv_nomalloc.o(.text) refers (Special) to hrguard.o(.text) for __heap_region$guard
_get_argv_nomalloc.o(.text) refers to defsig_rtmem_outer.o(.text) for __rt_SIGRTMEM
_get_argv_nomalloc.o(.text) refers to sys_command.o(.text) for _sys_command_string
libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000002) for __rt_lib_shutdown_cpp_1
libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000007) for __rt_lib_shutdown_fp_trap_1
libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F) for __rt_lib_shutdown_heap_1
libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000010) for __rt_lib_shutdown_return
libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A) for __rt_lib_shutdown_signal_1
libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000004) for __rt_lib_shutdown_stdio_1
libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C) for __rt_lib_shutdown_user_alloc_1
sys_command.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting
sys_command.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function
defsig_rtmem_outer.o(.text) refers to defsig_rtmem_inner.o(.text) for __rt_SIGRTMEM_inner
defsig_rtmem_outer.o(.text) refers to defsig_exit.o(.text) for __sig_exit
defsig_rtmem_formal.o(.text) refers to rt_raise.o(.text) for __rt_raise
rt_raise.o(.text) refers to __raise.o(.text) for __raise
rt_raise.o(.text) refers to sys_exit.o(.text) for _sys_exit
defsig_exit.o(.text) refers to sys_exit.o(.text) for _sys_exit
defsig_rtmem_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
__raise.o(.text) refers to defsig.o(CL$$defsig) for __default_signal_handler
defsig_general.o(.text) refers to sys_wrch.o(.text) for _ttywrch
sys_wrch.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting
sys_wrch.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function
defsig.o(CL$$defsig) refers to defsig_rtmem_inner.o(.text) for __rt_SIGRTMEM_inner
defsig_abrt_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
defsig_fpe_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
defsig_rtred_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
defsig_stak_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
defsig_pvfn_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
defsig_cppl_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
defsig_segv_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display
defsig_other.o(.text) refers to defsig_general.o(.text) for __default_signal_display
==============================================================================
Removing Unused input sections from the image.
Removing main.o(.rev16_text), (4 bytes).
Removing main.o(.revsh_text), (4 bytes).
Removing main.o(.rrx_text), (6 bytes).
Removing misc.o(.rev16_text), (4 bytes).
Removing misc.o(.revsh_text), (4 bytes).
Removing misc.o(.rrx_text), (6 bytes).
Removing misc.o(i.NVIC_Init), (112 bytes).
Removing misc.o(i.NVIC_PriorityGroupConfig), (20 bytes).
Removing misc.o(i.NVIC_SetVectorTable), (20 bytes).
Removing misc.o(i.NVIC_SystemLPConfig), (32 bytes).
Removing misc.o(i.SysTick_CLKSourceConfig), (40 bytes).
Removing stm32f10x_gpio.o(.rev16_text), (4 bytes).
Removing stm32f10x_gpio.o(.revsh_text), (4 bytes).
Removing stm32f10x_gpio.o(.rrx_text), (6 bytes).
Removing stm32f10x_gpio.o(i.GPIO_AFIODeInit), (20 bytes).
Removing stm32f10x_gpio.o(i.GPIO_DeInit), (200 bytes).
Removing stm32f10x_gpio.o(i.GPIO_ETH_MediaInterfaceConfig), (12 bytes).
Removing stm32f10x_gpio.o(i.GPIO_EXTILineConfig), (64 bytes).
Removing stm32f10x_gpio.o(i.GPIO_EventOutputCmd), (12 bytes).
Removing stm32f10x_gpio.o(i.GPIO_EventOutputConfig), (32 bytes).
Removing stm32f10x_gpio.o(i.GPIO_PinLockConfig), (18 bytes).
Removing stm32f10x_gpio.o(i.GPIO_PinRemapConfig), (144 bytes).
Removing stm32f10x_gpio.o(i.GPIO_ReadInputData), (8 bytes).
Removing stm32f10x_gpio.o(i.GPIO_ReadInputDataBit), (18 bytes).
Removing stm32f10x_gpio.o(i.GPIO_ReadOutputData), (8 bytes).
Removing stm32f10x_gpio.o(i.GPIO_ReadOutputDataBit), (18 bytes).
Removing stm32f10x_gpio.o(i.GPIO_ResetBits), (4 bytes).
Removing stm32f10x_gpio.o(i.GPIO_SetBits), (4 bytes).
Removing stm32f10x_gpio.o(i.GPIO_StructInit), (16 bytes).
Removing stm32f10x_gpio.o(i.GPIO_Write), (4 bytes).
Removing stm32f10x_gpio.o(i.GPIO_WriteBit), (10 bytes).
Removing stm32f10x_rcc.o(.rev16_text), (4 bytes).
Removing stm32f10x_rcc.o(.revsh_text), (4 bytes).
Removing stm32f10x_rcc.o(.rrx_text), (6 bytes).
Removing stm32f10x_rcc.o(i.RCC_ADCCLKConfig), (24 bytes).
Removing stm32f10x_rcc.o(i.RCC_AHBPeriphClockCmd), (32 bytes).
Removing stm32f10x_rcc.o(i.RCC_APB1PeriphClockCmd), (32 bytes).
Removing stm32f10x_rcc.o(i.RCC_APB1PeriphResetCmd), (32 bytes).
Removing stm32f10x_rcc.o(i.RCC_APB2PeriphResetCmd), (32 bytes).
Removing stm32f10x_rcc.o(i.RCC_AdjustHSICalibrationValue), (24 bytes).
Removing stm32f10x_rcc.o(i.RCC_BackupResetCmd), (12 bytes).
Removing stm32f10x_rcc.o(i.RCC_ClearFlag), (20 bytes).
Removing stm32f10x_rcc.o(i.RCC_ClearITPendingBit), (12 bytes).
Removing stm32f10x_rcc.o(i.RCC_ClockSecuritySystemCmd), (12 bytes).
Removing stm32f10x_rcc.o(i.RCC_DeInit), (76 bytes).
Removing stm32f10x_rcc.o(i.RCC_GetClocksFreq), (212 bytes).
Removing stm32f10x_rcc.o(i.RCC_GetFlagStatus), (60 bytes).
Removing stm32f10x_rcc.o(i.RCC_GetITStatus), (24 bytes).
Removing stm32f10x_rcc.o(i.RCC_GetSYSCLKSource), (16 bytes).
Removing stm32f10x_rcc.o(i.RCC_HCLKConfig), (24 bytes).
Removing stm32f10x_rcc.o(i.RCC_HSEConfig), (76 bytes).
Removing stm32f10x_rcc.o(i.RCC_HSICmd), (12 bytes).
Removing stm32f10x_rcc.o(i.RCC_ITConfig), (32 bytes).
Removing stm32f10x_rcc.o(i.RCC_LSEConfig), (52 bytes).
Removing stm32f10x_rcc.o(i.RCC_LSICmd), (12 bytes).
Removing stm32f10x_rcc.o(i.RCC_MCOConfig), (12 bytes).
Removing stm32f10x_rcc.o(i.RCC_PCLK1Config), (24 bytes).
Removing stm32f10x_rcc.o(i.RCC_PCLK2Config), (24 bytes).
Removing stm32f10x_rcc.o(i.RCC_PLLCmd), (12 bytes).
Removing stm32f10x_rcc.o(i.RCC_PLLConfig), (28 bytes).
Removing stm32f10x_rcc.o(i.RCC_RTCCLKCmd), (12 bytes).
Removing stm32f10x_rcc.o(i.RCC_RTCCLKConfig), (16 bytes).
Removing stm32f10x_rcc.o(i.RCC_SYSCLKConfig), (24 bytes).
Removing stm32f10x_rcc.o(i.RCC_USBCLKConfig), (12 bytes).
Removing stm32f10x_rcc.o(i.RCC_WaitForHSEStartUp), (56 bytes).
Removing stm32f10x_rcc.o(.data), (20 bytes).
Removing stm32f10x_tim.o(.rev16_text), (4 bytes).
Removing stm32f10x_tim.o(.revsh_text), (4 bytes).
Removing stm32f10x_tim.o(.rrx_text), (6 bytes).
Removing stm32f10x_tim.o(i.TI1_Config), (128 bytes).
Removing stm32f10x_tim.o(i.TI2_Config), (152 bytes).
Removing stm32f10x_tim.o(i.TI3_Config), (144 bytes).
Removing stm32f10x_tim.o(i.TI4_Config), (152 bytes).
Removing stm32f10x_tim.o(i.TIM_ARRPreloadConfig), (24 bytes).
Removing stm32f10x_tim.o(i.TIM_BDTRConfig), (32 bytes).
Removing stm32f10x_tim.o(i.TIM_BDTRStructInit), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_CCPreloadControl), (24 bytes).
Removing stm32f10x_tim.o(i.TIM_CCxCmd), (30 bytes).
Removing stm32f10x_tim.o(i.TIM_CCxNCmd), (30 bytes).
Removing stm32f10x_tim.o(i.TIM_ClearFlag), (6 bytes).
Removing stm32f10x_tim.o(i.TIM_ClearITPendingBit), (6 bytes).
Removing stm32f10x_tim.o(i.TIM_ClearOC1Ref), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_ClearOC2Ref), (24 bytes).
Removing stm32f10x_tim.o(i.TIM_ClearOC3Ref), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_ClearOC4Ref), (24 bytes).
Removing stm32f10x_tim.o(i.TIM_CounterModeConfig), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_DMACmd), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_DMAConfig), (10 bytes).
Removing stm32f10x_tim.o(i.TIM_DeInit), (488 bytes).
Removing stm32f10x_tim.o(i.TIM_ETRClockMode1Config), (54 bytes).
Removing stm32f10x_tim.o(i.TIM_ETRClockMode2Config), (32 bytes).
Removing stm32f10x_tim.o(i.TIM_ETRConfig), (28 bytes).
Removing stm32f10x_tim.o(i.TIM_EncoderInterfaceConfig), (66 bytes).
Removing stm32f10x_tim.o(i.TIM_ForcedOC1Config), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_ForcedOC2Config), (26 bytes).
Removing stm32f10x_tim.o(i.TIM_ForcedOC3Config), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_ForcedOC4Config), (26 bytes).
Removing stm32f10x_tim.o(i.TIM_GenerateEvent), (4 bytes).
Removing stm32f10x_tim.o(i.TIM_GetCapture1), (6 bytes).
Removing stm32f10x_tim.o(i.TIM_GetCapture2), (6 bytes).
Removing stm32f10x_tim.o(i.TIM_GetCapture3), (6 bytes).
Removing stm32f10x_tim.o(i.TIM_GetCapture4), (8 bytes).
Removing stm32f10x_tim.o(i.TIM_GetCounter), (6 bytes).
Removing stm32f10x_tim.o(i.TIM_GetFlagStatus), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_GetITStatus), (34 bytes).
Removing stm32f10x_tim.o(i.TIM_GetPrescaler), (6 bytes).
Removing stm32f10x_tim.o(i.TIM_ICInit), (172 bytes).
Removing stm32f10x_tim.o(i.TIM_ICStructInit), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_ITConfig), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_ITRxExternalClockConfig), (24 bytes).
Removing stm32f10x_tim.o(i.TIM_InternalClockConfig), (12 bytes).
Removing stm32f10x_tim.o(i.TIM_OC1FastConfig), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_OC1NPolarityConfig), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_OC1PolarityConfig), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_OC1PreloadConfig), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_OC2FastConfig), (26 bytes).
Removing stm32f10x_tim.o(i.TIM_OC2NPolarityConfig), (26 bytes).
Removing stm32f10x_tim.o(i.TIM_OC2PolarityConfig), (26 bytes).
Removing stm32f10x_tim.o(i.TIM_OC2PreloadConfig), (26 bytes).
Removing stm32f10x_tim.o(i.TIM_OC3FastConfig), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_OC3NPolarityConfig), (26 bytes).
Removing stm32f10x_tim.o(i.TIM_OC3PolarityConfig), (26 bytes).
Removing stm32f10x_tim.o(i.TIM_OC3PreloadConfig), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_OC4FastConfig), (26 bytes).
Removing stm32f10x_tim.o(i.TIM_OC4PolarityConfig), (26 bytes).
Removing stm32f10x_tim.o(i.TIM_OC4PreloadConfig), (26 bytes).
Removing stm32f10x_tim.o(i.TIM_OCStructInit), (20 bytes).
Removing stm32f10x_tim.o(i.TIM_PWMIConfig), (124 bytes).
Removing stm32f10x_tim.o(i.TIM_PrescalerConfig), (6 bytes).
Removing stm32f10x_tim.o(i.TIM_SelectCCDMA), (24 bytes).
Removing stm32f10x_tim.o(i.TIM_SelectCOM), (24 bytes).
Removing stm32f10x_tim.o(i.TIM_SelectHallSensor), (24 bytes).
Removing stm32f10x_tim.o(i.TIM_SelectInputTrigger), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_SelectMasterSlaveMode), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_SelectOCxM), (82 bytes).
Removing stm32f10x_tim.o(i.TIM_SelectOnePulseMode), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_SelectOutputTrigger), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_SelectSlaveMode), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_SetAutoreload), (4 bytes).
Removing stm32f10x_tim.o(i.TIM_SetClockDivision), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_SetCompare1), (4 bytes).
Removing stm32f10x_tim.o(i.TIM_SetCompare2), (4 bytes).
Removing stm32f10x_tim.o(i.TIM_SetCompare3), (4 bytes).
Removing stm32f10x_tim.o(i.TIM_SetCompare4), (6 bytes).
Removing stm32f10x_tim.o(i.TIM_SetCounter), (4 bytes).
Removing stm32f10x_tim.o(i.TIM_SetIC1Prescaler), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_SetIC2Prescaler), (26 bytes).
Removing stm32f10x_tim.o(i.TIM_SetIC3Prescaler), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_SetIC4Prescaler), (26 bytes).
Removing stm32f10x_tim.o(i.TIM_TIxExternalClockConfig), (62 bytes).
Removing stm32f10x_tim.o(i.TIM_TimeBaseStructInit), (18 bytes).
Removing stm32f10x_tim.o(i.TIM_UpdateDisableConfig), (24 bytes).
Removing stm32f10x_tim.o(i.TIM_UpdateRequestConfig), (24 bytes).
Removing gpio_stm32f10x.o(.rev16_text), (4 bytes).
Removing gpio_stm32f10x.o(.revsh_text), (4 bytes).
Removing gpio_stm32f10x.o(.rrx_text), (6 bytes).
Removing gpio_stm32f10x.o(i.GPIO_AFConfigure), (156 bytes).
Removing gpio_stm32f10x.o(i.GPIO_GetPortClockState), (152 bytes).
Removing gpio_stm32f10x.o(i.GPIO_PinConfigure), (120 bytes).
Removing gpio_stm32f10x.o(i.GPIO_PortClock), (316 bytes).
Removing system_stm32f10x.o(.rev16_text), (4 bytes).
Removing system_stm32f10x.o(.revsh_text), (4 bytes).
Removing system_stm32f10x.o(.rrx_text), (6 bytes).
Removing system_stm32f10x.o(i.SystemCoreClockUpdate), (164 bytes).
Removing system_stm32f10x.o(.data), (20 bytes).
165 unused section(s) (total 5876 bytes) removed from the image.
==============================================================================
Image Symbol Table
Local Symbols
Symbol Name Value Ov Type Size Object(Section)
../clib/angel/boardlib.s 0x00000000 Number 0 boardinit2.o ABSOLUTE
../clib/angel/boardlib.s 0x00000000 Number 0 boardinit3.o ABSOLUTE
../clib/angel/boardlib.s 0x00000000 Number 0 boardinit1.o ABSOLUTE
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Global Symbols
Symbol Name Value Ov Type Size Object(Section)
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__ARM_exceptions_init - Undefined Weak Reference
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__rt_locale - Undefined Weak Reference
__sigvec_lookup - Undefined Weak Reference
_atexit_init - Undefined Weak Reference
_call_atexit_fns - Undefined Weak Reference
_clock_init - Undefined Weak Reference
_fp_trap_init - Undefined Weak Reference
_fp_trap_shutdown - Undefined Weak Reference
_get_lc_collate - Undefined Weak Reference
_get_lc_ctype - Undefined Weak Reference
_get_lc_monetary - Undefined Weak Reference
_get_lc_numeric - Undefined Weak Reference
_get_lc_time - Undefined Weak Reference
_getenv_init - Undefined Weak Reference
_handle_redirection - Undefined Weak Reference
_init_alloc - Undefined Weak Reference
_init_user_alloc - Undefined Weak Reference
_initio - Undefined Weak Reference
_rand_init - Undefined Weak Reference
_signal_finish - Undefined Weak Reference
_signal_init - Undefined Weak Reference
_terminate_alloc - Undefined Weak Reference
_terminate_user_alloc - Undefined Weak Reference
_terminateio - Undefined Weak Reference
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Reset_Handler 0x08000189 Thumb Code 8 startup_stm32f10x_md.o(.text)
NMI_Handler 0x08000191 Thumb Code 2 startup_stm32f10x_md.o(.text)
HardFault_Handler 0x08000193 Thumb Code 2 startup_stm32f10x_md.o(.text)
MemManage_Handler 0x08000195 Thumb Code 2 startup_stm32f10x_md.o(.text)
BusFault_Handler 0x08000197 Thumb Code 2 startup_stm32f10x_md.o(.text)
UsageFault_Handler 0x08000199 Thumb Code 2 startup_stm32f10x_md.o(.text)
SVC_Handler 0x0800019b Thumb Code 2 startup_stm32f10x_md.o(.text)
DebugMon_Handler 0x0800019d Thumb Code 2 startup_stm32f10x_md.o(.text)
PendSV_Handler 0x0800019f Thumb Code 2 startup_stm32f10x_md.o(.text)
SysTick_Handler 0x080001a1 Thumb Code 2 startup_stm32f10x_md.o(.text)
ADC1_2_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
CAN1_RX1_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
CAN1_SCE_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
DMA1_Channel1_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
DMA1_Channel2_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
DMA1_Channel3_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
DMA1_Channel4_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
DMA1_Channel5_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
DMA1_Channel6_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
DMA1_Channel7_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
EXTI0_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
EXTI15_10_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
EXTI1_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
EXTI2_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
EXTI3_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
EXTI4_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
EXTI9_5_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
FLASH_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
I2C1_ER_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
I2C1_EV_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
I2C2_ER_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
I2C2_EV_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
PVD_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
RCC_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
RTCAlarm_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
RTC_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
SPI1_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
SPI2_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
TAMPER_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
TIM1_BRK_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
TIM1_CC_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
TIM1_TRG_COM_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
TIM1_UP_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
TIM2_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
TIM3_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
TIM4_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
USART1_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
USART2_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
USART3_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
USBWakeUp_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
USB_HP_CAN1_TX_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
USB_LP_CAN1_RX0_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
WWDG_IRQHandler 0x080001a3 Thumb Code 0 startup_stm32f10x_md.o(.text)
__user_initial_stackheap 0x080001a5 Thumb Code 0 startup_stm32f10x_md.o(.text)
__use_two_region_memory 0x080001c9 Thumb Code 2 heapauxi.o(.text)
__rt_heap_escrow$2region 0x080001cb Thumb Code 2 heapauxi.o(.text)
__rt_heap_expand$2region 0x080001cd Thumb Code 2 heapauxi.o(.text)
__user_setup_stackheap 0x080001cf Thumb Code 74 sys_stackheap_outer.o(.text)
exit 0x08000219 Thumb Code 18 exit.o(.text)
__user_libspace 0x0800022d Thumb Code 8 libspace.o(.text)
__user_perproc_libspace 0x0800022d Thumb Code 0 libspace.o(.text)
__user_perthread_libspace 0x0800022d Thumb Code 0 libspace.o(.text)
_sys_exit 0x08000235 Thumb Code 8 sys_exit.o(.text)
__I$use$semihosting 0x08000241 Thumb Code 0 use_no_semi.o(.text)
__use_no_semihosting_swi 0x08000241 Thumb Code 2 use_no_semi.o(.text)
__semihosting_library_function 0x08000243 Thumb Code 0 indicate_semi.o(.text)
GPIO_Configuration 0x08000245 Thumb Code 48 main.o(i.GPIO_Configuration)
GPIO_Init 0x0800027d Thumb Code 278 stm32f10x_gpio.o(i.GPIO_Init)
RCC_APB2PeriphClockCmd 0x08000395 Thumb Code 26 stm32f10x_rcc.o(i.RCC_APB2PeriphClockCmd)
RCC_Configuration 0x080003b5 Thumb Code 18 main.o(i.RCC_Configuration)
SystemInit 0x080004b1 Thumb Code 78 system_stm32f10x.o(i.SystemInit)
TIM_Cmd 0x08000511 Thumb Code 24 stm32f10x_tim.o(i.TIM_Cmd)
TIM_CtrlPWMOutputs 0x08000529 Thumb Code 30 stm32f10x_tim.o(i.TIM_CtrlPWMOutputs)
TIM_OC1Init 0x08000549 Thumb Code 132 stm32f10x_tim.o(i.TIM_OC1Init)
TIM_OC2Init 0x080005e1 Thumb Code 154 stm32f10x_tim.o(i.TIM_OC2Init)
TIM_OC3Init 0x08000685 Thumb Code 150 stm32f10x_tim.o(i.TIM_OC3Init)
TIM_OC4Init 0x08000725 Thumb Code 114 stm32f10x_tim.o(i.TIM_OC4Init)
TIM_TimeBaseInit 0x080007a1 Thumb Code 122 stm32f10x_tim.o(i.TIM_TimeBaseInit)
main 0x08000845 Thumb Code 442 main.o(i.main)
sleep1sec 0x08000a21 Thumb Code 30 main.o(i.sleep1sec)
Region$$Table$$Base 0x08000a40 Number 0 anon$$obj.o(Region$$Table)
Region$$Table$$Limit 0x08000a60 Number 0 anon$$obj.o(Region$$Table)
CCR1_Val 0x20000000 Data 2 main.o(.data)
CCR2_Val 0x20000002 Data 2 main.o(.data)
CCR3_Val 0x20000004 Data 2 main.o(.data)
CCR4_Val 0x20000006 Data 2 main.o(.data)
down 0x20000008 Data 4 main.o(.data)
TIM_TimeBaseStructure 0x2000000c Data 10 main.o(.bss)
TIM_OCInitStructure 0x20000016 Data 16 main.o(.bss)
__libspace_start 0x20000028 Data 96 libspace.o(.bss)
__temporary_stack_top$libspace 0x20000088 Data 0 libspace.o(.bss)
==============================================================================
Memory Map of the image
Image Entry point : 0x08000189
Load Region LR_1 (Base: 0x08000000, Size: 0x00000a6c, Max: 0xffffffff, ABSOLUTE)
Execution Region ER_RO (Exec base: 0x08000000, Load base: 0x08000000, Size: 0x00000a60, Max: 0xffffffff, ABSOLUTE)
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
0x08000000 0x08000000 0x000000ec Data RO 1087 RESET startup_stm32f10x_md.o
0x080000ec 0x080000ec 0x00000008 Code RO 1142 * !!!main c_w.l(__main.o)
0x080000f4 0x080000f4 0x00000034 Code RO 1299 !!!scatter c_w.l(__scatter.o)
0x08000128 0x08000128 0x0000001a Code RO 1301 !!handler_copy c_w.l(__scatter_copy.o)
0x08000142 0x08000142 0x00000002 PAD
0x08000144 0x08000144 0x0000001c Code RO 1303 !!handler_zi c_w.l(__scatter_zi.o)
0x08000160 0x08000160 0x00000002 Code RO 1169 .ARM.Collect$$libinit$$00000000 c_w.l(libinit.o)
0x08000162 0x08000162 0x00000000 Code RO 1176 .ARM.Collect$$libinit$$00000002 c_w.l(libinit2.o)
0x08000162 0x08000162 0x00000000 Code RO 1178 .ARM.Collect$$libinit$$00000004 c_w.l(libinit2.o)
0x08000162 0x08000162 0x00000000 Code RO 1181 .ARM.Collect$$libinit$$0000000A c_w.l(libinit2.o)
0x08000162 0x08000162 0x00000000 Code RO 1183 .ARM.Collect$$libinit$$0000000C c_w.l(libinit2.o)
0x08000162 0x08000162 0x00000000 Code RO 1185 .ARM.Collect$$libinit$$0000000E c_w.l(libinit2.o)
0x08000162 0x08000162 0x00000000 Code RO 1188 .ARM.Collect$$libinit$$00000011 c_w.l(libinit2.o)
0x08000162 0x08000162 0x00000000 Code RO 1190 .ARM.Collect$$libinit$$00000013 c_w.l(libinit2.o)
0x08000162 0x08000162 0x00000000 Code RO 1192 .ARM.Collect$$libinit$$00000015 c_w.l(libinit2.o)
0x08000162 0x08000162 0x00000000 Code RO 1194 .ARM.Collect$$libinit$$00000017 c_w.l(libinit2.o)
0x08000162 0x08000162 0x00000000 Code RO 1196 .ARM.Collect$$libinit$$00000019 c_w.l(libinit2.o)
0x08000162 0x08000162 0x00000000 Code RO 1198 .ARM.Collect$$libinit$$0000001B c_w.l(libinit2.o)
0x08000162 0x08000162 0x00000000 Code RO 1200 .ARM.Collect$$libinit$$0000001D c_w.l(libinit2.o)
0x08000162 0x08000162 0x00000000 Code RO 1202 .ARM.Collect$$libinit$$0000001F c_w.l(libinit2.o)
0x08000162 0x08000162 0x00000000 Code RO 1204 .ARM.Collect$$libinit$$00000021 c_w.l(libinit2.o)
0x08000162 0x08000162 0x00000000 Code RO 1206 .ARM.Collect$$libinit$$00000023 c_w.l(libinit2.o)
0x08000162 0x08000162 0x00000000 Code RO 1208 .ARM.Collect$$libinit$$00000025 c_w.l(libinit2.o)
0x08000162 0x08000162 0x00000000 Code RO 1212 .ARM.Collect$$libinit$$0000002C c_w.l(libinit2.o)
0x08000162 0x08000162 0x00000000 Code RO 1214 .ARM.Collect$$libinit$$0000002E c_w.l(libinit2.o)
0x08000162 0x08000162 0x00000000 Code RO 1216 .ARM.Collect$$libinit$$00000030 c_w.l(libinit2.o)
0x08000162 0x08000162 0x00000000 Code RO 1218 .ARM.Collect$$libinit$$00000032 c_w.l(libinit2.o)
0x08000162 0x08000162 0x00000002 Code RO 1219 .ARM.Collect$$libinit$$00000033 c_w.l(libinit2.o)
0x08000164 0x08000164 0x00000002 Code RO 1239 .ARM.Collect$$libshutdown$$00000000 c_w.l(libshutdown.o)
0x08000166 0x08000166 0x00000000 Code RO 1252 .ARM.Collect$$libshutdown$$00000002 c_w.l(libshutdown2.o)
0x08000166 0x08000166 0x00000000 Code RO 1254 .ARM.Collect$$libshutdown$$00000004 c_w.l(libshutdown2.o)
0x08000166 0x08000166 0x00000000 Code RO 1257 .ARM.Collect$$libshutdown$$00000007 c_w.l(libshutdown2.o)
0x08000166 0x08000166 0x00000000 Code RO 1260 .ARM.Collect$$libshutdown$$0000000A c_w.l(libshutdown2.o)
0x08000166 0x08000166 0x00000000 Code RO 1262 .ARM.Collect$$libshutdown$$0000000C c_w.l(libshutdown2.o)
0x08000166 0x08000166 0x00000000 Code RO 1265 .ARM.Collect$$libshutdown$$0000000F c_w.l(libshutdown2.o)
0x08000166 0x08000166 0x00000002 Code RO 1266 .ARM.Collect$$libshutdown$$00000010 c_w.l(libshutdown2.o)
0x08000168 0x08000168 0x00000000 Code RO 1144 .ARM.Collect$$rtentry$$00000000 c_w.l(__rtentry.o)
0x08000168 0x08000168 0x00000000 Code RO 1146 .ARM.Collect$$rtentry$$00000002 c_w.l(__rtentry2.o)
0x08000168 0x08000168 0x00000006 Code RO 1158 .ARM.Collect$$rtentry$$00000004 c_w.l(__rtentry4.o)
0x0800016e 0x0800016e 0x00000000 Code RO 1148 .ARM.Collect$$rtentry$$00000009 c_w.l(__rtentry2.o)
0x0800016e 0x0800016e 0x00000004 Code RO 1149 .ARM.Collect$$rtentry$$0000000A c_w.l(__rtentry2.o)
0x08000172 0x08000172 0x00000000 Code RO 1151 .ARM.Collect$$rtentry$$0000000C c_w.l(__rtentry2.o)
0x08000172 0x08000172 0x00000008 Code RO 1152 .ARM.Collect$$rtentry$$0000000D c_w.l(__rtentry2.o)
0x0800017a 0x0800017a 0x00000002 Code RO 1173 .ARM.Collect$$rtexit$$00000000 c_w.l(rtexit.o)
0x0800017c 0x0800017c 0x00000000 Code RO 1221 .ARM.Collect$$rtexit$$00000002 c_w.l(rtexit2.o)
0x0800017c 0x0800017c 0x00000004 Code RO 1222 .ARM.Collect$$rtexit$$00000003 c_w.l(rtexit2.o)
0x08000180 0x08000180 0x00000006 Code RO 1223 .ARM.Collect$$rtexit$$00000004 c_w.l(rtexit2.o)
0x08000186 0x08000186 0x00000002 PAD
0x08000188 0x08000188 0x00000040 Code RO 1088 * .text startup_stm32f10x_md.o
0x080001c8 0x080001c8 0x00000006 Code RO 1140 .text c_w.l(heapauxi.o)
0x080001ce 0x080001ce 0x0000004a Code RO 1160 .text c_w.l(sys_stackheap_outer.o)
0x08000218 0x08000218 0x00000012 Code RO 1162 .text c_w.l(exit.o)
0x0800022a 0x0800022a 0x00000002 PAD
0x0800022c 0x0800022c 0x00000008 Code RO 1170 .text c_w.l(libspace.o)
0x08000234 0x08000234 0x0000000c Code RO 1231 .text c_w.l(sys_exit.o)
0x08000240 0x08000240 0x00000002 Code RO 1242 .text c_w.l(use_no_semi.o)
0x08000242 0x08000242 0x00000000 Code RO 1244 .text c_w.l(indicate_semi.o)
0x08000242 0x08000242 0x00000002 PAD
0x08000244 0x08000244 0x00000038 Code RO 4 i.GPIO_Configuration main.o
0x0800027c 0x0800027c 0x00000116 Code RO 148 i.GPIO_Init stm32f10x_gpio.o
0x08000392 0x08000392 0x00000002 PAD
0x08000394 0x08000394 0x00000020 Code RO 272 i.RCC_APB2PeriphClockCmd stm32f10x_rcc.o
0x080003b4 0x080003b4 0x00000012 Code RO 5 i.RCC_Configuration main.o
0x080003c6 0x080003c6 0x00000008 Code RO 1095 i.SetSysClock system_stm32f10x.o
0x080003ce 0x080003ce 0x00000002 PAD
0x080003d0 0x080003d0 0x000000e0 Code RO 1096 i.SetSysClockTo72 system_stm32f10x.o
0x080004b0 0x080004b0 0x00000060 Code RO 1098 i.SystemInit system_stm32f10x.o
0x08000510 0x08000510 0x00000018 Code RO 496 i.TIM_Cmd stm32f10x_tim.o
0x08000528 0x08000528 0x0000001e Code RO 498 i.TIM_CtrlPWMOutputs stm32f10x_tim.o
0x08000546 0x08000546 0x00000002 PAD
0x08000548 0x08000548 0x00000098 Code RO 525 i.TIM_OC1Init stm32f10x_tim.o
0x080005e0 0x080005e0 0x000000a4 Code RO 530 i.TIM_OC2Init stm32f10x_tim.o
0x08000684 0x08000684 0x000000a0 Code RO 535 i.TIM_OC3Init stm32f10x_tim.o
0x08000724 0x08000724 0x0000007c Code RO 540 i.TIM_OC4Init stm32f10x_tim.o
0x080007a0 0x080007a0 0x000000a4 Code RO 567 i.TIM_TimeBaseInit stm32f10x_tim.o
0x08000844 0x08000844 0x000001dc Code RO 6 i.main main.o
0x08000a20 0x08000a20 0x0000001e Code RO 7 i.sleep1sec main.o
0x08000a3e 0x08000a3e 0x00000002 PAD
0x08000a40 0x08000a40 0x00000020 Data RO 1297 Region$$Table anon$$obj.o
Execution Region ER_RW (Exec base: 0x20000000, Load base: 0x08000a60, Size: 0x0000000c, Max: 0xffffffff, ABSOLUTE)
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
0x20000000 0x08000a60 0x0000000c Data RW 9 .data main.o
Execution Region ER_ZI (Exec base: 0x2000000c, Load base: 0x08000a6c, Size: 0x0000067c, Max: 0xffffffff, ABSOLUTE)
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
0x2000000c - 0x0000001a Zero RW 8 .bss main.o
0x20000026 0x08000a6c 0x00000002 PAD
0x20000028 - 0x00000060 Zero RW 1171 .bss c_w.l(libspace.o)
0x20000088 - 0x00000200 Zero RW 1086 HEAP startup_stm32f10x_md.o
0x20000288 - 0x00000400 Zero RW 1085 STACK startup_stm32f10x_md.o
==============================================================================
Image component sizes
Code (inc. data) RO Data RW Data ZI Data Debug Object Name
580 42 0 12 26 237697 main.o
64 26 236 0 1536 804 startup_stm32f10x_md.o
278 0 0 0 0 2184 stm32f10x_gpio.o
32 6 0 0 0 601 stm32f10x_rcc.o
818 92 0 0 0 5526 stm32f10x_tim.o
328 28 0 0 0 2049 system_stm32f10x.o
----------------------------------------------------------------------
2108 194 268 12 1564 248861 Object Totals
0 0 32 0 0 0 (incl. Generated)
8 0 0 0 2 0 (incl. Padding)
----------------------------------------------------------------------
Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name
8 0 0 0 0 68 __main.o
0 0 0 0 0 0 __rtentry.o
12 0 0 0 0 0 __rtentry2.o
6 0 0 0 0 0 __rtentry4.o
52 8 0 0 0 0 __scatter.o
26 0 0 0 0 0 __scatter_copy.o
28 0 0 0 0 0 __scatter_zi.o
18 0 0 0 0 80 exit.o
6 0 0 0 0 152 heapauxi.o
0 0 0 0 0 0 indicate_semi.o
2 0 0 0 0 0 libinit.o
2 0 0 0 0 0 libinit2.o
2 0 0 0 0 0 libshutdown.o
2 0 0 0 0 0 libshutdown2.o
8 4 0 0 96 68 libspace.o
2 0 0 0 0 0 rtexit.o
10 0 0 0 0 0 rtexit2.o
12 4 0 0 0 68 sys_exit.o
74 0 0 0 0 80 sys_stackheap_outer.o
2 0 0 0 0 68 use_no_semi.o
----------------------------------------------------------------------
280 16 0 0 96 584 Library Totals
8 0 0 0 0 0 (incl. Padding)
----------------------------------------------------------------------
Code (inc. data) RO Data RW Data ZI Data Debug Library Name
272 16 0 0 96 584 c_w.l
----------------------------------------------------------------------
280 16 0 0 96 584 Library Totals
----------------------------------------------------------------------
==============================================================================
Code (inc. data) RO Data RW Data ZI Data Debug
2388 210 268 12 1660 248557 Grand Totals
2388 210 268 12 1660 248557 ELF Image Totals
2388 210 268 12 0 0 ROM Totals
==============================================================================
Total RO Size (Code + RO Data) 2656 ( 2.59kB)
Total RW Size (RW Data + ZI Data) 1672 ( 1.63kB)
Total ROM Size (Code + RO Data + RW Data) 2668 ( 2.61kB)
==============================================================================

240
steper/stm32/MG955.uvoptx Normal file
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@ -0,0 +1,240 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj; *.o</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>Target 1</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>12000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>0</RunSim>
<RunTarget>1</RunTarget>
<RunAbUc>0</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\Listings\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>18</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf>
<nTsel>4</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>Segger\JL2CM3.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMRTXEVENTFLAGS</Key>
<Name>-L70 -Z18 -C0 -M0 -T1</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGTARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMDBGFLAGS</Key>
<Name></Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGUARM</Key>
<Name>d</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>JL2CM3</Key>
<Name>-U20080643 -O14 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight JTAG-DP") -D00(3BA00477) -L00(4) -N01("ST TMC") -D01(16410041) -L01(5) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM))</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>1</periodic>
<aLwin>1</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>1</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<bAutoGenD>0</bAutoGenD>
<LntExFlags>0</LntExFlags>
<pMisraName></pMisraName>
<pszMrule></pszMrule>
<pSingCmds></pSingCmds>
<pMultCmds></pMultCmds>
<pMisraNamep></pMisraNamep>
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>1</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
</DebugDescription>
</TargetOption>
</Target>
<Group>
<GroupName>src</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\main.c</PathWithFileName>
<FilenameWithoutPath>main.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>::CMSIS</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>1</RteFlg>
</Group>
<Group>
<GroupName>::Device</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>1</RteFlg>
</Group>
</ProjectOpt>

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steper/stm32/MG955.uvprojx Normal file
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>Target 1</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>STM32F103RB</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32F1xx_DFP.2.2.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x5000) IROM(0x08000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM))</FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile>$$Device:STM32F103RB$Device\Include\stm32f10x.h</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:STM32F103RB$SVD\STM32F103xx.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\Objects\</OutputDirectory>
<OutputName>MG955</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\Listings\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments> -REMAP</SimDllArguments>
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM3</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments></TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>-1</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3></Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M3"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>0</RvdsVP>
<RvdsMve>0</RvdsMve>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x5000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x20000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x20000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x5000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>1</uC99>
<uGnu>1</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>0</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x08000000</TextAddressRange>
<DataAddressRange>0x20000000</DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>src</GroupName>
<Files>
<File>
<FileName>main.c</FileName>
<FileType>1</FileType>
<FilePath>.\main.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>::CMSIS</GroupName>
</Group>
<Group>
<GroupName>::Device</GroupName>
</Group>
</Groups>
</Target>
</Targets>
<RTE>
<apis/>
<components>
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.3.0" condition="ARMv6_7_8-M Device">
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.6.0"/>
<targetInfos>
<targetInfo name="Target 1"/>
</targetInfos>
</component>
<component Cclass="Device" Cgroup="GPIO" Cvendor="Keil" Cversion="1.3" condition="STM32F1xx CMSIS">
<package name="STM32F1xx_DFP" schemaVersion="1.4.0" url="http://www.keil.com/pack/" vendor="Keil" version="2.2.0"/>
<targetInfos>
<targetInfo name="Target 1"/>
</targetInfos>
</component>
<component Cclass="Device" Cgroup="Startup" Cvendor="Keil" Cversion="1.0.0" condition="STM32F1xx CMSIS">
<package name="STM32F1xx_DFP" schemaVersion="1.4.0" url="http://www.keil.com/pack/" vendor="Keil" version="2.2.0"/>
<targetInfos>
<targetInfo name="Target 1"/>
</targetInfos>
</component>
<component Cclass="Device" Cgroup="StdPeriph Drivers" Csub="Framework" Cvendor="Keil" Cversion="3.5.1" condition="STM32F1xx STDPERIPH">
<package name="STM32F1xx_DFP" schemaVersion="1.4.0" url="http://www.keil.com/pack/" vendor="Keil" version="2.2.0"/>
<targetInfos>
<targetInfo name="Target 1"/>
</targetInfos>
</component>
<component Cclass="Device" Cgroup="StdPeriph Drivers" Csub="GPIO" Cvendor="Keil" Cversion="3.5.0" condition="STM32F1xx STDPERIPH RCC">
<package name="STM32F1xx_DFP" schemaVersion="1.4.0" url="http://www.keil.com/pack/" vendor="Keil" version="2.2.0"/>
<targetInfos>
<targetInfo name="Target 1"/>
</targetInfos>
</component>
<component Cclass="Device" Cgroup="StdPeriph Drivers" Csub="RCC" Cvendor="Keil" Cversion="3.5.0" condition="STM32F1xx STDPERIPH">
<package name="STM32F1xx_DFP" schemaVersion="1.4.0" url="http://www.keil.com/pack/" vendor="Keil" version="2.2.0"/>
<targetInfos>
<targetInfo name="Target 1"/>
</targetInfos>
</component>
<component Cclass="Device" Cgroup="StdPeriph Drivers" Csub="TIM" Cvendor="Keil" Cversion="3.5.0" condition="STM32F1xx STDPERIPH RCC">
<package name="STM32F1xx_DFP" schemaVersion="1.4.0" url="http://www.keil.com/pack/" vendor="Keil" version="2.2.0"/>
<targetInfos>
<targetInfo name="Target 1"/>
</targetInfos>
</component>
</components>
<files>
<file attr="config" category="header" name="RTE_Driver\Config\RTE_Device.h" version="1.1.2">
<instance index="0">RTE\Device\STM32F103RB\RTE_Device.h</instance>
<component Cclass="Device" Cgroup="Startup" Cvendor="Keil" Cversion="1.0.0" condition="STM32F1xx CMSIS"/>
<package name="STM32F1xx_DFP" schemaVersion="1.4.0" url="http://www.keil.com/pack/" vendor="Keil" version="2.2.0"/>
<targetInfos>
<targetInfo name="Target 1"/>
</targetInfos>
</file>
<file attr="config" category="source" condition="STM32F1xx MD ARMCC" name="Device\Source\ARM\startup_stm32f10x_md.s" version="1.0.0">
<instance index="0">RTE\Device\STM32F103RB\startup_stm32f10x_md.s</instance>
<component Cclass="Device" Cgroup="Startup" Cvendor="Keil" Cversion="1.0.0" condition="STM32F1xx CMSIS"/>
<package name="STM32F1xx_DFP" schemaVersion="1.4.0" url="http://www.keil.com/pack/" vendor="Keil" version="2.2.0"/>
<targetInfos>
<targetInfo name="Target 1"/>
</targetInfos>
</file>
<file attr="config" category="source" name="Device\StdPeriph_Driver\templates\stm32f10x_conf.h" version="3.5.0">
<instance index="0">RTE\Device\STM32F103RB\stm32f10x_conf.h</instance>
<component Cclass="Device" Cgroup="StdPeriph Drivers" Csub="Framework" Cvendor="Keil" Cversion="3.5.1" condition="STM32F1xx STDPERIPH"/>
<package name="STM32F1xx_DFP" schemaVersion="1.4.0" url="http://www.keil.com/pack/" vendor="Keil" version="2.2.0"/>
<targetInfos>
<targetInfo name="Target 1"/>
</targetInfos>
</file>
<file attr="config" category="source" name="Device\Source\system_stm32f10x.c" version="1.0.0">
<instance index="0">RTE\Device\STM32F103RB\system_stm32f10x.c</instance>
<component Cclass="Device" Cgroup="Startup" Cvendor="Keil" Cversion="1.0.0" condition="STM32F1xx CMSIS"/>
<package name="STM32F1xx_DFP" schemaVersion="1.4.0" url="http://www.keil.com/pack/" vendor="Keil" version="2.2.0"/>
<targetInfos>
<targetInfo name="Target 1"/>
</targetInfos>
</file>
</files>
</RTE>
</Project>

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--cpu Cortex-M3
".\objects\main.o"
".\objects\misc.o"
".\objects\stm32f10x_gpio.o"
".\objects\stm32f10x_rcc.o"
".\objects\stm32f10x_tim.o"
".\objects\gpio_stm32f10x.o"
".\objects\startup_stm32f10x_md.o"
".\objects\system_stm32f10x.o"
--ro-base 0x08000000 --entry 0x08000000 --rw-base 0x20000000 --entry Reset_Handler --first __Vectors --strict --summary_stderr --info summarysizes --map --load_addr_map_info --xref --callgraph --symbols
--info sizes --info totals --info unused --info veneers
--list ".\Listings\MG955.map" -o .\Objects\MG955.axf

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steper/stm32/RTE/Device/STM32F103RB/startup_stm32f10x_md.s Normal file
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;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f10x_md.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM
;* toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Configure the clock system
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM3 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
;*******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EXTI Line detect
DCD TAMPER_IRQHandler ; Tamper
DCD RTC_IRQHandler ; RTC
DCD FLASH_IRQHandler ; Flash
DCD RCC_IRQHandler ; RCC
DCD EXTI0_IRQHandler ; EXTI Line 0
DCD EXTI1_IRQHandler ; EXTI Line 1
DCD EXTI2_IRQHandler ; EXTI Line 2
DCD EXTI3_IRQHandler ; EXTI Line 3
DCD EXTI4_IRQHandler ; EXTI Line 4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_2_IRQHandler ; ADC1_2
DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
DCD TIM1_BRK_IRQHandler ; TIM1 Break
DCD TIM1_UP_IRQHandler ; TIM1 Update
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM4_IRQHandler ; TIM4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMPER_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_IRQHandler [WEAK]
EXPORT EXTI1_IRQHandler [WEAK]
EXPORT EXTI2_IRQHandler [WEAK]
EXPORT EXTI3_IRQHandler [WEAK]
EXPORT EXTI4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_2_IRQHandler [WEAK]
EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK]
EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EXTI9_5_IRQHandler [WEAK]
EXPORT TIM1_BRK_IRQHandler [WEAK]
EXPORT TIM1_UP_IRQHandler [WEAK]
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EXTI15_10_IRQHandler [WEAK]
EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBWakeUp_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USB_HP_CAN1_TX_IRQHandler
USB_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_IRQHandler
TIM1_UP_IRQHandler
TIM1_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTCAlarm_IRQHandler
USBWakeUp_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****

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/**
******************************************************************************
* @file Project/STM32F10x_StdPeriph_Template/stm32f10x_conf.h
* @author MCD Application Team
* @version V3.5.0
* @date 08-April-2011
* @brief Library configuration file.
******************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_CONF_H
#define __STM32F10x_CONF_H
/* Run Time Environment will set specific #define for each selected module below */
#include "RTE_Components.h"
#ifdef RTE_DEVICE_STDPERIPH_ADC
#include "stm32f10x_adc.h"
#endif
#ifdef RTE_DEVICE_STDPERIPH_BKP
#include "stm32f10x_bkp.h"
#endif
#ifdef RTE_DEVICE_STDPERIPH_CAN
#include "stm32f10x_can.h"
#endif
#ifdef RTE_DEVICE_STDPERIPH_CEC
#include "stm32f10x_cec.h"
#endif
#ifdef RTE_DEVICE_STDPERIPH_CRC
#include "stm32f10x_crc.h"
#endif
#ifdef RTE_DEVICE_STDPERIPH_DAC
#include "stm32f10x_dac.h"
#endif
#ifdef RTE_DEVICE_STDPERIPH_DBGMCU
#include "stm32f10x_dbgmcu.h"
#endif
#ifdef RTE_DEVICE_STDPERIPH_DMA
#include "stm32f10x_dma.h"
#endif
#ifdef RTE_DEVICE_STDPERIPH_EXTI
#include "stm32f10x_exti.h"
#endif
#ifdef RTE_DEVICE_STDPERIPH_FLASH
#include "stm32f10x_flash.h"
#endif
#ifdef RTE_DEVICE_STDPERIPH_FSMC
#include "stm32f10x_fsmc.h"
#endif
#ifdef RTE_DEVICE_STDPERIPH_GPIO
#include "stm32f10x_gpio.h"
#endif
#ifdef RTE_DEVICE_STDPERIPH_I2C
#include "stm32f10x_i2c.h"
#endif
#ifdef RTE_DEVICE_STDPERIPH_IWDG
#include "stm32f10x_iwdg.h"
#endif
#ifdef RTE_DEVICE_STDPERIPH_PWR
#include "stm32f10x_pwr.h"
#endif
#ifdef RTE_DEVICE_STDPERIPH_RCC
#include "stm32f10x_rcc.h"
#endif
#ifdef RTE_DEVICE_STDPERIPH_RTC
#include "stm32f10x_rtc.h"
#endif
#ifdef RTE_DEVICE_STDPERIPH_SDIO
#include "stm32f10x_sdio.h"
#endif
#ifdef RTE_DEVICE_STDPERIPH_SPI
#include "stm32f10x_spi.h"
#endif
#ifdef RTE_DEVICE_STDPERIPH_TIM
#include "stm32f10x_tim.h"
#endif
#ifdef RTE_DEVICE_STDPERIPH_USART
#include "stm32f10x_usart.h"
#endif
#ifdef RTE_DEVICE_STDPERIPH_WWDG
#include "stm32f10x_wwdg.h"
#endif
#ifdef RTE_DEVICE_STDPERIPH_FRAMEWORK
#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Uncomment the line below to expanse the "assert_param" macro in the
Standard Peripheral Library drivers code */
/* #define USE_FULL_ASSERT 1 */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function which reports
* the name of the source file and the source line number of the call
* that failed. If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0)
#endif /* USE_FULL_ASSERT */
#endif /* __STM32F10x_CONF_H */
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/

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/*
* Auto generated Run-Time-Environment Configuration File
* *** Do not modify ! ***
*
* Project: 'MG955'
* Target: 'Target 1'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f10x.h"
/* Keil::Device:StdPeriph Drivers:Framework:3.5.1 */
#define RTE_DEVICE_STDPERIPH_FRAMEWORK
/* Keil::Device:StdPeriph Drivers:GPIO:3.5.0 */
#define RTE_DEVICE_STDPERIPH_GPIO
/* Keil::Device:StdPeriph Drivers:RCC:3.5.0 */
#define RTE_DEVICE_STDPERIPH_RCC
/* Keil::Device:StdPeriph Drivers:TIM:3.5.0 */
#define RTE_DEVICE_STDPERIPH_TIM
#endif /* RTE_COMPONENTS_H */

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/**
******************************************************************************
* @file TIM/7PWM_Output/main.c
* @author MCD Application Team
* @version V3.1.0
* @date 06/19/2009
* @brief Main program body
******************************************************************************
* @copy
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x.h"
/** @addtogroup STM32F10x_StdPeriph_Examples
* @{
*/
/** @addtogroup TIM_7PWM_Output
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
TIM_OCInitTypeDef TIM_OCInitStructure;
uint16_t CCR1_Val = 2500;
uint16_t CCR2_Val = 2500;
uint16_t CCR3_Val = 2500;
uint16_t CCR4_Val = 2500;
int down = 1;
void sleep1sec(void){
uint16_t x = 600;
for(;x > 0;x--){
uint16_t y = 500;
for(;y > 0;y--){
}
}
}
/* Private function prototypes -----------------------------------------------*/
void RCC_Configuration(void);
void GPIO_Configuration(void);
/* Private functions ---------------------------------------------------------*/
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
/* System Clocks Configuration */
RCC_Configuration();
/* GPIO Configuration */
GPIO_Configuration();
/* TIM1 Configuration ---------------------------------------------------
Generates 7 PWM signals with 4 different duty cycles:
TIM1CLK = 72 MHz, Prescaler = 0, TIM1 counter clock = 72 MHz
TIM1 frequency = TIM1CLK/(TIM1_Period + 1) = 17.57 KHz
- TIM1 Channel1 & Channel1N duty cycle = TIM1->CCR1 / (TIM1_Period + 1) = 50%
- TIM1 Channel2 & Channel2N duty cycle = TIM1->CCR2 / (TIM1_Period + 1) = 37.5%
- TIM1 Channel3 & Channel3N duty cycle = TIM1->CCR3 / (TIM1_Period + 1) = 25%
- TIM1 Channel4 duty cycle = TIM1->CCR4 / (TIM1_Period + 1) = 12.5%
----------------------------------------------------------------------- */
/* Time Base configuration */
TIM_TimeBaseStructure.TIM_Prescaler = 72; // 1mhz
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseStructure.TIM_Period = 20000;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);
/* Channel 1, 2,3 and 4 Configuration in PWM mode */
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM2;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
TIM_OCInitStructure.TIM_Pulse = CCR1_Val;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_Low;
TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High;
TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCIdleState_Reset;
TIM_OC1Init(TIM1, &TIM_OCInitStructure);
TIM_OCInitStructure.TIM_Pulse = CCR2_Val;
TIM_OC2Init(TIM1, &TIM_OCInitStructure);
TIM_OCInitStructure.TIM_Pulse = CCR3_Val;
TIM_OC3Init(TIM1, &TIM_OCInitStructure);
TIM_OCInitStructure.TIM_Pulse = CCR4_Val;
TIM_OC4Init(TIM1, &TIM_OCInitStructure);
/* TIM1 counter enable */
TIM_Cmd(TIM1, ENABLE);
/* TIM1 Main Output Enable */
TIM_CtrlPWMOutputs(TIM1, ENABLE);
while (1)
{
sleep1sec();
if(1 == down){
CCR1_Val-=40;
CCR2_Val-=40;
CCR3_Val-=40;
CCR4_Val-=40;
/* Channel 1, 2,3 and 4 Configuration in PWM mode */
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM2;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
TIM_OCInitStructure.TIM_Pulse = CCR1_Val;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_Low;
TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High;
TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCIdleState_Reset;
TIM_OC1Init(TIM1, &TIM_OCInitStructure);
TIM_OCInitStructure.TIM_Pulse = CCR2_Val;
TIM_OC2Init(TIM1, &TIM_OCInitStructure);
TIM_OCInitStructure.TIM_Pulse = CCR3_Val;
TIM_OC3Init(TIM1, &TIM_OCInitStructure);
TIM_OCInitStructure.TIM_Pulse = CCR4_Val;
TIM_OC4Init(TIM1, &TIM_OCInitStructure);
if(CCR3_Val < 500)
down = 2;
}
else{
CCR1_Val+=40;
CCR2_Val+=40;
CCR3_Val+=40;
CCR4_Val+=40;
/* Channel 1, 2,3 and 4 Configuration in PWM mode */
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM2;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
TIM_OCInitStructure.TIM_Pulse = CCR1_Val;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_Low;
TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High;
TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCIdleState_Reset;
TIM_OC1Init(TIM1, &TIM_OCInitStructure);
TIM_OCInitStructure.TIM_Pulse = CCR2_Val;
TIM_OC2Init(TIM1, &TIM_OCInitStructure);
TIM_OCInitStructure.TIM_Pulse = CCR3_Val;
TIM_OC3Init(TIM1, &TIM_OCInitStructure);
TIM_OCInitStructure.TIM_Pulse = CCR4_Val;
TIM_OC4Init(TIM1, &TIM_OCInitStructure);
if(CCR3_Val > 2500)
down = 1;
}
}
}
/**
* @brief Configures the different system clocks.
* @param None
* @retval None
*/
void RCC_Configuration(void)
{
/* Setup the microcontroller system. Initialize the Embedded Flash Interface,
initialize the PLL and update the SystemFrequency variable. */
SystemInit();
/* TIM1, GPIOA, GPIOB, GPIOE and AFIO clocks enable */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1 | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOE|
RCC_APB2Periph_GPIOB |RCC_APB2Periph_AFIO, ENABLE);
}
/**
* @brief Configure the TIM1 Pins.
* @param None
* @retval None
*/
void GPIO_Configuration(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
#ifdef STM32F10X_CL
/* GPIOE Configuration: Channel 1/1N, 2/2N, 3/3N and 4 as alternate function push-pull */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9|GPIO_Pin_11|GPIO_Pin_13|GPIO_Pin_14|
GPIO_Pin_8|GPIO_Pin_10|GPIO_Pin_12;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOE, &GPIO_InitStructure);
/* TIM1 Full remapping pins */
GPIO_PinRemapConfig(GPIO_FullRemap_TIM1, ENABLE);
#else
/* GPIOA Configuration: Channel 1, 2 and 3 as alternate function push-pull */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/* GPIOB Configuration: Channel 1N, 2N and 3N as alternate function push-pull */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_Init(GPIOB, &GPIO_InitStructure);
#endif
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t* file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
while (1)
{}
}
#endif
/**
* @}
*/
/**
* @}
*/
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/

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/**
@page TIM_7PWM_Output TIM_7PWM_Output
@verbatim
******************** (C) COPYRIGHT 2009 STMicroelectronics *******************
* @file TIM/7PWM_Output/readme.txt
* @author MCD Application Team
* @version V3.1.0
* @date 06/19/2009
* @brief Description of the TIM 7PWM_Output example.
******************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
******************************************************************************
@endverbatim
@par Example Description
This example shows how to configure the TIM1 peripheral to generate 7 PWM signals
with 4 different duty cycles.
TIM1CLK is fixed to 72 MHz, the TIM1 Prescaler is equal to 0 so the TIM1 counter
clock used is 72 MHz.
TIM1 frequency is defined as follow:
TIM1 frequency = TIM1CLK/(TIM1_Period + 1) = 17.57 KHz.
The TIM1 CCR1 register value is equal to 0x7FF, so the TIM1 Channel 1 and TIM1
Channel 1N generate a PWM signal with a frequency equal to 17.57 KHz
and a duty cycle equal to:
TIM1 Channel1 duty cycle = TIM1_CCR1 /( TIM1_Period + 1) = 50%.
The TIM1 CCR2 register value is equal to 0x5FF, so the TIM1 Channel 2 and TIM1
Channel 2N generate a PWM signal with a frequency equal to 17.57 KHz
and a duty cycle equal to:
TIM1 Channel2 duty cycle = TIM1_CCR2 / ( TIM1_Period + 1)= 37.5%.
The TIM1 CCR3 register value is equal to 0x3FF, so the TIM1 Channel 3 and TIM1
Channel 3N generate a PWM signal with a frequency equal to 17.57 KHz
and a duty cycle equal to:
TIM1 Channel3 duty cycle = TIM1_CCR3 / ( TIM1_Period + 1) = 25%.
The TIM1 CCR4 register value is equal to 0x1FF, so the TIM1 Channel 4
generate a PWM signal with a frequency equal to 17.57 KHz
and a duty cycle equal to:
TIM1 Channel4 duty cycle = TIM1_CCR4 / ( TIM1_Period + 1) = 12.5%.
The TIM1 waveform can be displayed using an oscilloscope.
@par Directory contents
- TIM/7PWM_Output/stm32f10x_conf.h Library Configuration file
- TIM/7PWM_Output/stm32f10x_it.c Interrupt handlers
- TIM/7PWM_Output/stm32f10x_it.h Interrupt handlers header file
- TIM/7PWM_Output/main.c Main program
@par Hardware and Software environment
- This example runs on STM32F10x Connectivity line, High-Density, Medium-Density
and Low-Density Devices.
- This example has been tested with STMicroelectronics STM3210C-EVAL (STM32F10x
Connectivity line), STM3210E-EVAL (STM32F10x High-Density) and STM3210B-EVAL
(STM32F10x Medium-Density) evaluation boards and can be easily tailored to
any other supported device and development board.
- STM3210C-EVAL Set-up
- Connect the TIM1 pins(TIM1 full remapped pins) to an oscilloscope to monitor the different waveforms:
- TIM1_CH1 pin (PE.08)
- TIM1_CH1N pin (PE.09)
- TIM1_CH2 pin (PE.10)
- TIM1_CH2N pin (PE.11)
- TIM1_CH3 pin (PE.12)
- TIM1_CH3N pin (PE.13)
- TIM1_CH4 pin (PE.14)
- STM3210E-EVAL and STM3210B-EVAL Set-up
- Connect the TIM1 pins to an oscilloscope to monitor the different waveforms:
- TIM1_CH1 pin (PA.08)
- TIM1_CH1N pin (PB.13)
- TIM1_CH2 pin (PA.09)
- TIM1_CH2N pin (PB.14)
- TIM1_CH3 pin (PA.10)
- TIM1_CH3N pin (PB.15)
- TIM1_CH4 pin (PA.11)
@par How to use it ?
In order to make the program work, you must do the following:
- Create a project and setup all project configuration
- Add the required Library files:
- stm32f10x_gpio.c
- stm32f10x_rcc.c
- stm32f10x_tim.c
- system_stm32f10x.c (under Libraries\CMSIS\Core\CM3)
- Edit stm32f10x.h file to select the device you are working on.
@b Tip: You can tailor the provided project template to run this example, for
more details please refer to "stm32f10x_stdperiph_lib_um.chm" user
manual; select "Peripheral Examples" then follow the instructions
provided in "How to proceed" section.
- Link all compiled files and load your image into target memory
- Run the example
@note
- Low-density devices are STM32F101xx and STM32F103xx microcontrollers where
the Flash memory density ranges between 16 and 32 Kbytes.
- Medium-density devices are STM32F101xx and STM32F103xx microcontrollers where
the Flash memory density ranges between 32 and 128 Kbytes.
- High-density devices are STM32F101xx and STM32F103xx microcontrollers where
the Flash memory density ranges between 256 and 512 Kbytes.
- Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.
* <h3><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h3>
*/

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/**
******************************************************************************
* @file TIM/7PWM_Output/stm32f10x_conf.h
* @author MCD Application Team
* @version V3.1.0
* @date 06/19/2009
* @brief Library configuration file.
******************************************************************************
* @copy
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_CONF_H
#define __STM32F10x_CONF_H
/* Includes ------------------------------------------------------------------*/
/* Uncomment the line below to enable peripheral header file inclusion */
/* #include "stm32f10x_adc.h" */
/* #include "stm32f10x_bkp.h" */
/* #include "stm32f10x_can.h" */
/* #include "stm32f10x_crc.h" */
/* #include "stm32f10x_dac.h" */
/* #include "stm32f10x_dbgmcu.h" */
/* #include "stm32f10x_dma.h" */
/* #include "stm32f10x_exti.h" */
/* #include "stm32f10x_flash.h" */
/* #include "stm32f10x_fsmc.h" */
#include "stm32f10x_gpio.h"
/* #include "stm32f10x_i2c.h" */
/* #include "stm32f10x_iwdg.h" */
/* #include "stm32f10x_pwr.h" */
#include "stm32f10x_rcc.h"
/* #include "stm32f10x_rtc.h" */
/* #include "stm32f10x_sdio.h" */
/* #include "stm32f10x_spi.h" */
#include "stm32f10x_tim.h"
/* #include "stm32f10x_usart.h" */
/* #include "stm32f10x_wwdg.h" */
/* #include "misc.h" */ /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Uncomment the line below to expanse the "assert_param" macro in the
Standard Peripheral Library drivers code */
/* #define USE_FULL_ASSERT 1 */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0)
#endif /* USE_FULL_ASSERT */
#endif /* __STM32F10x_CONF_H */
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file TIM/7PWM_Output/stm32f10x_it.c
* @author MCD Application Team
* @version V3.1.0
* @date 06/19/2009
* @brief Main Interrupt Service Routines.
* This file provides template for all exceptions handler and peripherals
* interrupt service routine.
******************************************************************************
* @copy
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_it.h"
/** @addtogroup STM32F10x_StdPeriph_Examples
* @{
*/
/** @addtogroup TIM_7PWM_Output
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/******************************************************************************/
/* Cortex-M3 Processor Exceptions Handlers */
/******************************************************************************/
/**
* @brief This function handles NMI exception.
* @param None
* @retval None
*/
void NMI_Handler(void)
{}
/**
* @brief This function handles Hard Fault exception.
* @param None
* @retval None
*/
void HardFault_Handler(void)
{
/* Go to infinite loop when Hard Fault exception occurs */
while (1)
{}
}
/**
* @brief This function handles Memory Manage exception.
* @param None
* @retval None
*/
void MemManage_Handler(void)
{
/* Go to infinite loop when Memory Manage exception occurs */
while (1)
{}
}
/**
* @brief This function handles Bus Fault exception.
* @param None
* @retval None
*/
void BusFault_Handler(void)
{
/* Go to infinite loop when Bus Fault exception occurs */
while (1)
{}
}
/**
* @brief This function handles Usage Fault exception.
* @param None
* @retval None
*/
void UsageFault_Handler(void)
{
/* Go to infinite loop when Usage Fault exception occurs */
while (1)
{}
}
/**
* @brief This function handles Debug Monitor exception.
* @param None
* @retval None
*/
void DebugMon_Handler(void)
{}
/**
* @brief This function handles SVCall exception.
* @param None
* @retval None
*/
void SVC_Handler(void)
{}
/**
* @brief This function handles PendSV_Handler exception.
* @param None
* @retval None
*/
void PendSV_Handler(void)
{}
/**
* @brief This function handles SysTick Handler.
* @param None
* @retval None
*/
void SysTick_Handler(void)
{}
/******************************************************************************/
/* STM32F10x Peripherals Interrupt Handlers */
/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
/* available peripheral interrupt handler's name please refer to the startup */
/* file (startup_stm32f10x_xx.s). */
/******************************************************************************/
/**
* @brief This function handles PPP interrupt request.
* @param None
* @retval None
*/
/*void PPP_IRQHandler(void)
{
}*/
/**
* @}
*/
/**
* @}
*/
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file TIM/7PWM_Output/stm32f10x_it.h
* @author MCD Application Team
* @version V3.1.0
* @date 06/19/2009
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @copy
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_IT_H
#define __STM32F10x_IT_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
#endif /* __STM32F10x_IT_H */
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/