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HardwareDriver/stepper/main.cpp

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/****************************************************************************
* @file main.c
* @version V3.00
* $Revision: 6 $
* $Date: 15/09/02 10:04a $
* @brief Use ADINT interrupt to do the ADC continuous scan conversion.
* @note
* Copyright (C) 2013~2015 Nuvoton Technology Corp. All rights reserved.
*
******************************************************************************/
#include "stdio.h"
#include "M451Series.h"
#include "ssd1306.h"
#define DEBUG_ENABLE_SEMIHOST true
#define PLLCTL_SETTING CLK_PLLCTL_72MHz_HXT
#define PLL_CLOCK 72000000
/*---------------------------------------------------------------------------------------------------------*/
/* Define global variables and constants */
/*---------------------------------------------------------------------------------------------------------*/
volatile uint32_t g_u32AdcIntFlag, g_u32COVNUMFlag = 0;
/*---------------------------------------------------------------------------------------------------------*/
/* Define functions prototype */
/*---------------------------------------------------------------------------------------------------------*/
int32_t main(void);
void EADC_FunctionTest(void);
void PWMInit (){
CLK_EnableModuleClock(PWM0_MODULE);
SYS_ResetModule(PWM0_RST);
/* PWM clock frequency can be set equal or double to HCLK by choosing case 1 or case 2 */
/* case 1.PWM clock frequency is set equal to HCLK: select PWM module clock source as PCLK */
CLK_SetModuleClock(PWM0_MODULE, CLK_CLKSEL2_PWM0SEL_PCLK0, NULL);
/*---------------------------------------------------------------------------------------------------------*/
/* Init I/O Multi-function */
/*---------------------------------------------------------------------------------------------------------*/
/* Set PD multi-function pins for UART0 RXD and TXD */
SYS->GPD_MFPL &= ~(SYS_GPD_MFPL_PD0MFP_Msk | SYS_GPD_MFPL_PD1MFP_Msk);
SYS->GPD_MFPL |= (SYS_GPD_MFPL_PD0MFP_UART0_RXD | SYS_GPD_MFPL_PD1MFP_UART0_TXD);
/* Set PC multi-function pins for PWM0 Channel0~3 */
SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC0MFP_Msk));
SYS->GPC_MFPL |= SYS_GPC_MFPL_PC0MFP_PWM0_CH0;
SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC1MFP_Msk));
SYS->GPC_MFPL |= SYS_GPC_MFPL_PC1MFP_PWM0_CH1;
SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC2MFP_Msk));
SYS->GPC_MFPL |= SYS_GPC_MFPL_PC2MFP_PWM0_CH2;
SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC3MFP_Msk));
SYS->GPC_MFPL |= SYS_GPC_MFPL_PC3MFP_PWM0_CH3;
/*Set Pwm mode as complementary mode*/
PWM_ENABLE_COMPLEMENTARY_MODE(PWM0);
// PWM0 channel 0 frequency is 100Hz, duty 30%,
PWM_ConfigOutputChannel(PWM0, 0, 100, 30);
SYS_UnlockReg();
PWM_EnableDeadZone(PWM0, 0, 400);
SYS_LockReg();
// PWM0 channel 2 frequency is 300Hz, duty 50%
PWM_ConfigOutputChannel(PWM0, 2, 300, 50);
SYS_UnlockReg();
PWM_EnableDeadZone(PWM0, 2, 200);
SYS_LockReg();
// Enable output of PWM0 channel 0~3
PWM_EnableOutput(PWM0, 0xF);
// Enable PWM0 channel 0 period interrupt, use channel 0 to measure time.
//PWM_EnablePeriodInt(PWM0, 0, 0);
//NVIC_EnableIRQ(PWM0P0_IRQn);
// Start
PWM_Start(PWM0, 0xF);
}
void I2CInit(){
/* Enable I2C0 module clock */
CLK_EnableModuleClock(I2C0_MODULE);
/*---------------------------------------------------------------------------------------------------------*/
/* Init I/O Multi-function */
/*---------------------------------------------------------------------------------------------------------*/
SYS->GPD_MFPL &= ~SYS_GPD_MFPL_PD4MFP_Msk;
SYS->GPD_MFPL |= SYS_GPD_MFPL_PD4MFP_I2C0_SDA;
SYS->GPD_MFPL &= ~SYS_GPD_MFPL_PD5MFP_Msk;
SYS->GPD_MFPL |= SYS_GPD_MFPL_PD5MFP_I2C0_SCL;
I2C_Open(I2C0,100000);
printf("I2C clock %d Hz\n", I2C_GetBusClockFreq(I2C0));
I2C_SetSlaveAddr(I2C0, 0, 0x78, 0); /* Slave Address : 0x15 */
SYS_LockReg();
}
void SYS_Init(void)
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init System Clock */
/*---------------------------------------------------------------------------------------------------------*/
/* Enable HIRC clock (Internal RC 22.1184MHz) */
CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);
/* Wait for HIRC clock ready */
CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
/* Select HCLK clock source as HIRC and and HCLK source divider as 1 */
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
/* Set PLL to Power-down mode and PLLSTB bit in CLK_STATUS register will be cleared by hardware.*/
CLK_DisablePLL();
/* Enable HXT clock (external XTAL 12MHz) */
CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
/* Wait for HXT clock ready */
CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk);
/* Set core clock as PLL_CLOCK from PLL */
CLK_SetCoreClock(PLL_CLOCK);
/* Enable UART module clock */
CLK_EnableModuleClock(UART0_MODULE);
/* Select UART module clock source as HXT and UART module clock divider as 1 */
CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UARTSEL_HXT, CLK_CLKDIV0_UART(1));
/* Enable EADC module clock */
CLK_EnableModuleClock(EADC_MODULE);
/* EADC clock source is 72MHz, set divider to 8, ADC clock is 72/8 MHz */
CLK_SetModuleClock(EADC_MODULE, 0, CLK_CLKDIV0_EADC(8));
/*---------------------------------------------------------------------------------------------------------*/
/* Init I/O Multi-function */
/*---------------------------------------------------------------------------------------------------------*/
/* Set PD multi-function pins for UART0 RXD and TXD */
SYS->GPD_MFPL &= ~(SYS_GPD_MFPL_PD0MFP_Msk | SYS_GPD_MFPL_PD1MFP_Msk);
SYS->GPD_MFPL |= (SYS_GPD_MFPL_PD0MFP_UART0_RXD | SYS_GPD_MFPL_PD1MFP_UART0_TXD);
/* Configure the GPB0 - GPB3 ADC analog input pins. */
SYS->GPB_MFPL &= ~(SYS_GPB_MFPL_PB0MFP_Msk | SYS_GPB_MFPL_PB1MFP_Msk |
SYS_GPB_MFPL_PB2MFP_Msk | SYS_GPB_MFPL_PB3MFP_Msk);
SYS->GPB_MFPL |= (SYS_GPB_MFPL_PB0MFP_EADC_CH0 | SYS_GPB_MFPL_PB1MFP_EADC_CH1 |
SYS_GPB_MFPL_PB2MFP_EADC_CH2 | SYS_GPB_MFPL_PB3MFP_EADC_CH3);
/* Disable the GPB0 - GPB3 digital input path to avoid the leakage current. */
GPIO_DISABLE_DIGITAL_PATH(PB, 0xF);
I2CInit();
PWMInit();
}
void UART0_Init()
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init UART */
/*---------------------------------------------------------------------------------------------------------*/
/* Reset UART module */
SYS_ResetModule(UART0_RST);
/* Configure UART0 and set UART0 baud rate */
UART_Open(UART0, 115200);
}
unsigned int x ;
/*---------------------------------------------------------------------------------------------------------*/
/* EADC function test */
/*---------------------------------------------------------------------------------------------------------*/
void EADC_FunctionTest()
{
uint8_t u8Option, u32SAMPLECount = 0;
int32_t i32ConversionData[8] = {0};
printf("\n");
printf("+----------------------------------------------------------------------+\n");
printf("| ADINT trigger mode test |\n");
printf("+----------------------------------------------------------------------+\n");
printf("\nIn this test, software will get 2 cycles of conversion result from the specified channels.\n");
/* Set the ADC internal sampling time, input mode as single-end and enable the A/D converter */
EADC_Open(EADC, EADC_CTL_DIFFEN_SINGLE_END);
EADC_SetInternalSampleTime(EADC, 6);
/* Configure the sample 4 module for analog input channel 0 and enable ADINT0 trigger source */
EADC_ConfigSampleModule(EADC, 4, EADC_ADINT0_TRIGGER, 0);
/* Configure the sample 5 module for analog input channel 1 and enable ADINT0 trigger source */
EADC_ConfigSampleModule(EADC, 5, EADC_ADINT0_TRIGGER, 1);
/* Configure the sample 6 module for analog input channel 2 and enable ADINT0 trigger source */
EADC_ConfigSampleModule(EADC, 6, EADC_ADINT0_TRIGGER, 2);
/* Configure the sample 7 module for analog input channel 3 and enable ADINT0 trigger source */
EADC_ConfigSampleModule(EADC, 7, EADC_ADINT0_TRIGGER, 3);
/* Clear the A/D ADINT0 interrupt flag for safe */
EADC_CLR_INT_FLAG(EADC, 0x1);
/* Enable the sample module 7 interrupt */
EADC_ENABLE_INT(EADC, 0x1);//Enable sample module A/D ADINT0 interrupt.
EADC_ENABLE_SAMPLE_MODULE_INT(EADC, 0, (0x1 << 7));//Enable sample module 7 interrupt.
//NVIC_EnableIRQ(ADC00_IRQn);
while(1)
{
/* Reset the ADC indicator and trigger sample module 7 to start A/D conversion */
g_u32AdcIntFlag = 0;
g_u32COVNUMFlag = 0;
EADC_START_CONV(EADC, (0x1 << 7));
/* Disable the sample module 7 interrupt */
//EADC_DISABLE_SAMPLE_MODULE_INT(EADC, 0, (0x1 << 7));
/* Get the conversion result of the sample module */
for(u32SAMPLECount = 0; u32SAMPLECount < 4; u32SAMPLECount++)
i32ConversionData[u32SAMPLECount] = EADC_GET_CONV_DATA(EADC, (u32SAMPLECount + 4));
x = EADC_GET_DATA_VALID_FLAG(EADC, 0xF0);
/* Wait conversion done */
while(EADC_GET_DATA_VALID_FLAG(EADC, 0xF0) != 0xF0){
x = EADC_GET_DATA_VALID_FLAG(EADC, 0xF0);
x++;
}
/* Get the conversion result of the sample module */
for(u32SAMPLECount = 4; u32SAMPLECount < 8; u32SAMPLECount++)
i32ConversionData[u32SAMPLECount] = EADC_GET_CONV_DATA(EADC, u32SAMPLECount);
char dat[36] = {0};
sprintf(dat,"pwm freq:%d",EADC_GET_CONV_DATA(EADC, 4)/41);
PWM_ConfigOutputChannel(PWM0, 2, EADC_GET_CONV_DATA(EADC, 4)/41, 50);
print_Line(0, dat);
for(g_u32COVNUMFlag = 0; (g_u32COVNUMFlag) < 8; g_u32COVNUMFlag++)
printf("Conversion result of channel %d: 0x%X (%d)\n", (g_u32COVNUMFlag % 4), i32ConversionData[g_u32COVNUMFlag], i32ConversionData[g_u32COVNUMFlag]);
}
}
/**
* @brief PWM0 IRQ Handler
*
* @param None
*
* @return None
*
* @details ISR to handle PWM0 interrupt event
*/
void PWM0P0_IRQHandler(void)
{
static uint32_t cnt;
static uint32_t out;
// Channel 0 frequency is 100Hz, every 1 second enter this IRQ handler 100 times.
if(++cnt == 100)
{
if(out)
PWM_EnableOutput(PWM0, PWM_CH_0_MASK | PWM_CH_1_MASK | PWM_CH_2_MASK | PWM_CH_3_MASK);
else
PWM_DisableOutput(PWM0, PWM_CH_0_MASK | PWM_CH_1_MASK | PWM_CH_2_MASK | PWM_CH_3_MASK);
out ^= 1;
cnt = 0;
}
// Clear channel 0 period interrupt flag
PWM_ClearPeriodIntFlag(PWM0, 0);
}
/*---------------------------------------------------------------------------------------------------------*/
/* EADC interrupt handler */
/*---------------------------------------------------------------------------------------------------------*/
void ADC00_IRQHandler(void)
{
g_u32AdcIntFlag = 1;
EADC_CLR_INT_FLAG(EADC, 0x1); /* Clear the A/D ADINT0 interrupt flag */
}
/*---------------------------------------------------------------------------------------------------------*/
/* Main Function */
/*---------------------------------------------------------------------------------------------------------*/
int32_t main(void)
{
/* Unlock protected registers */
SYS_UnlockReg();
/* Init System, IP clock and multi-function I/O */
SYS_Init();
/* Lock protected registers */
SYS_LockReg();
/* Init UART0 for printf */
UART0_Init();
/*---------------------------------------------------------------------------------------------------------*/
/* SAMPLE CODE */
/*---------------------------------------------------------------------------------------------------------*/
clear_LCD();
Init_LCD();
printf("\nSystem clock rate: %d Hz", SystemCoreClock);
/* EADC function test */
EADC_FunctionTest();
/* Reset EADC module */
SYS_ResetModule(EADC_RST);
/* Disable EADC IP clock */
CLK_DisableModuleClock(EADC_MODULE);
/* Disable External Interrupt */
NVIC_DisableIRQ(ADC00_IRQn);
printf("Exit EADC sample code\n");
while(1);
}
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